Abstract: Embodiments of the disclosure provide an integrated circuit (IC) structure with a niobium-based silicide layer. An IC structure according to the disclosure includes a transistor on a substrate, the transistor including a gate structure above the substrate and a source/drain (S/D) region on the substrate adjacent the gate structure. A niobium-based silicide layer is on at least an upper surface the S/D region of the transistor, and extends across substantially an entire width of the S/D region. An S/D contact to the S/D region is in contact with the niobium-based silicide layer.

Abstract: A calibration system for multi-sensor extrinsic calibration in a vehicle includes one or more calibration targets provided around an external environment within a threshold distance of the vehicle. Each of the one or more calibration targets includes a combination of sensor targets configured to be measured by and used for calibrating a pair of sensors selected from the group consisting of a first sensor, a second sensor or a third sensor. The system also includes a vehicle placement section configured to accommodate the vehicle on the vehicle placement section for detection of the one or more calibration targets.

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a scheme of active and dummy fin structures and methods of manufacture. The structure includes: an active fin structure; at least one dummy fin structure running along at least one side of the active fin structure along its length; a fin cut separating the at least one dummy fin structure along its longitudinal axes; and a gate structure extending over the active fin structure and the fin cut.

Abstract: A transistor device that includes a single semiconductor structure having an outer perimeter and a vertical height, wherein the single semiconductor structure is at least partially defined by a trench formed in a semiconductor substrate and a first layer of material positioned on the bottom surface of the trench and around the outer perimeter of the single semiconductor structure. The device also includes a second layer of material positioned on the first layer of material and around the outer perimeter of the single semiconductor structure, a gap between the outer perimeter of the single semiconductor structure and both the first and second layers of material (when considered collectively) and an insulating sidewall spacer positioned in the gap, wherein the insulating sidewall spacer has a vertical height that is less than the vertical height of the single semiconductor structure.

Abstract: An ultrasonic electronic cigarette is disclosed. The electronic cigarette includes an atomizer (1) and a battery assembly (2) detachably connected to each other. The atomizer (1) comprises an ultrasonic atomization sheet (3), and the battery assembly (2) comprises a first battery electrode (4) and a second battery electrode (5) for supplying power to the atomizer (1). When the atomizer (1) is connected to the battery assembly (2), a first pole of the ultrasonic atomization sheet (3) is electrically connected to the first battery electrode (4), and a second pole of the ultrasonic atomization sheet (3) is electrically connected to the second battery electrode (5).

Abstract: Methods, systems, and devices for wireless communication are described. A device may tailor its operations to different configurations or conditions by adjusting procedures associated with a radio link control (RLC) layer by reference to a value defined at a medium access control (MAC) layer. The device may, for example, receive from a network a value for a timer associated with the retransmission of RLC packet data units (PDUs). The device may adjust the timer value based on a radio resource configuration or channel conditions, such as a number of RLC PDUs discarded or retransmitted in an interval defined by one or more MAC layer operations. In some examples, a ratio of discarded and retransmitted RLC PDUs and an interval for hybrid automatic repeat request (HARQ) retransmissions is used as basis for determining channel conditions and thus for selecting a timer value for RLC PDU retransmission.

Abstract: Extrinsic calibration of a Light Detection and Ranging (LiDAR) sensor and a camera can comprise constructing a first plurality of reconstructed calibration targets in a three-dimensional space based on physical calibration targets detected from input from the LiDAR and a second plurality of reconstructed calibration targets in the three-dimensional space based on physical calibration targets detected from input from the camera. Reconstructed calibration targets in the first and second plurality of reconstructed calibration targets can be matched and a six-degree of freedom rigid body transformation of the LiDAR and camera can be computed based on the matched reconstructed calibration targets. A projection of the LiDAR to the camera can be computed based on the computed six-degree of freedom rigid body transformation.

Abstract: Disclosed are an ultrasonic atomization piece, an electronic cigarette atomization core and an electronic cigarette atomizer. The ultrasonic atomization piece includes a piezoelectric ceramic main body; one surface of the piezoelectric ceramic main body is in contact with a positive electrode conducting layer, and the other surface of the piezoelectric ceramic main body is in contact with a negative electrode conducting layer, the negative electrode conducting layer extends to the surface of the piezoelectric ceramic main body on which the positive electrode conducting layer is located along a side edge of the piezoelectric ceramic main body, and a plurality of convex point areas, which cover the edge of the positive electrode conducting layer are provided on an edge of the negative conductive layer.

Abstract: An electronic cigarette atomizer, including a shell; one end of the shell is in fixed connection with a suction nozzle; an ultrasonic atomization piece is fixed in the shell; the ultrasonic atomization piece is in contact with a liquid guide body; the liquid guide body is communicated with a liquid storage cavity; an atomization outlet of the ultrasonic atomization piece is communicated with an airflow passage; solid perfume are provided on the airflow passage; the solid perfume are in contact with a heating device; and a tail end of the airflow passage is communicated with the suction nozzle. The ultrasonic atomization piece is adopted to atomize the tobacco tar to produce smoke, meanwhile the solid perfume are heated by the heating device to produce fragrance, finally the smoke is mixed with the fragrance, in this case, the mixed smoke has the fragrance of the real cigarette.

Abstract: A gate cut isolation including an air gap and an IC including the same are disclosed. A method of forming the gate cut isolation may include forming an opening in a dummy gate that extends over a plurality of spaced active regions, the opening positioned between and spaced from a pair of active regions. The opening is filled with a fill material, and the dummy gate is removed. A metal gate is formed in a space vacated by the dummy gate on each side of the fill material, and the fill material is removed to form a preliminary gate cut opening. A liner is deposited in the preliminary gate cut opening, creating a gate cut isolation opening, which is then sealed by depositing a sealing layer. The sealing layer closes an upper end of the gate cut isolation opening and forms the gate cut isolation including an air gap.

Abstract: A method of manufacturing a compressor stator having: a first stator blade with a first leading edge and a first trailing edge; a second stator blade disposed a circumferential distance from the first stator blade, the second stator blade having a second leading edge disposed an axial distance from the first leading edge and a second trailing edge disposed an axial distance from the first trailing edge; the method comprising: using additive manufacturing to deposit and fuse together progressive layers of metal material commencing at a substrate to form the first stator blade, the second stator blade, at least one intermediate support structure disposed between the first stator blade and the second stator blade, and at least one primary support structure disposed between the substrate and at least one of: the first stator blade; and the second stator blade; and removing the primary support structure and the intermediate support structure.

Abstract: Methods of forming interconnects and structures for interconnects. A hardmask layer is patterned to form a plurality of first trenches arranged with a first pattern, and sidewall spacers are formed inside the first trenches on respective sidewalls of the hardmask layer bordering the first trenches. An etch mask is formed over the hardmask layer. The etch mask includes an opening exposing a portion of the hardmask layer between a pair of the sidewall spacers. The portion of the hardmask layer exposed by the opening in the etch mask is removed to define a second trench in the hardmask layer.

Abstract: Structures including static random access memory bit cells and methods of forming a structure including static random access memory bit cells. A first bit cell includes a first plurality of semiconductor fins, and a second bit cell includes a second plurality of semiconductor fins. A deep trench isolation region is laterally positioned between the first plurality of semiconductor fins of the first bit cell and the second plurality of semiconductor fins of the second bit cell.

Abstract: Embodiments of the present disclosure are directed to calibrating an imaging and ranging subsystem. Sensor data indicative of one or more targets from the imaging and ranging subsystem, location data defining a geographical location of the imaging and ranging subsystem, orientation data defining an orientation of the imaging and ranging subsystem and stored translation and rotation values of the imaging and ranging subsystem are received. Estimated Doppler values for the target are provided by the sensor data and theoretical Doppler values for the targets are also calculated. The estimated Doppler values are compared to the theoretical Doppler values to determine if calibration of the imaging and ranging subsystem is required. If calibration is necessary, correction translation and correction rotation values are calculated in order to calculate updated translation and rotation values used to calibrate the imaging and ranging subsystem.

Abstract: Assemblies and methods for directing a flow of air through a compressor section of a gas turbine engine are disclosed. A method includes receiving the flow of air over a strut extending radially across a substantially annular gas path of the gas turbine engine, and at least partially confining and modifying a strut wake generated in the flow of air by the strut using one or more variable orientation guide vanes.

Abstract: A diffuser pipe has a tubular body with a first portion extending from an inlet of the diffuser pipe, a second portion extending along a generally axial direction relative to a center axis, and a bend portion fluidly connecting the first and second portions. An exit segment of the second portion defines a pipe outlet. The exit segment is curved radially outwardly relative to the center axis. A compressor diffuser, a gas turbine engine, and a method of supplying air from a compressor section to a combustor of the gas turbine engine are also disclosed.

Abstract: A serial management interface master device includes an input/output pin and a controller including an error code calculator. The controller is configured to output a first access frame on the input/output pin to cause data to be written to a first register of a serial management interface slave device connected to the input/output pin; cause the error code calculator to generate first error code bits based on the first access frame sent to the serial management interface slave device; and output a second access frame including the first error code bits to the serial management interface slave device on the input/output pin to cause the first error code bits to be written to a second register of the serial management interface slave device.

Abstract: The present invention relates to a polypeptide comprising 7 ?-strands A, B, C, D, E, F, and G sequentially connected together by connecting chains of amino acids, and a first ?-helix sequentially located on the EF chain between ?-strands E and F, wherein the ?-strands are arranged so as to form a first ?-sheet comprising ?-strands A, B, D, and E, and a second ?-sheet comprising ?-strands C, F and G, said first and second ?-sheets being covalently bonded together so as to form a first Ig domain; wherein the EF chain between ?-strands E and F comprises the sequence X1-X2-X3-X4-K5H6 (SEQ ID NO:98), and X1, X3 and X4 are each independently any amino acid residue, characterized in that X2 is selected from the group consisting of A, G, I, V, L, R, S, T, Q, P, N, M, H, W, and pharmaceutically acceptable salts, stereoisomers, tautomers, solvates, and prodrugs thereof

Abstract: The present disclosure generally relates to semiconductor structures and, more particularly, to single fin structures and methods of manufacture. The structure includes: an active single fin structure; a plurality of dummy fin structures on opposing sides of the active single fin structure; source and drain regions formed on the active single fin structure and the dummy fin structures; recessed shallow trench isolation (STI) regions between the dummy fin structures and the active single fin structure and below a surface of the dummy fin structures; and contacts formed on the source and drain regions of the active single fin structure with a spacing of at least two dummy fin structures on opposing sides of the contacts.

Abstract: Structures including static random access memory bit cells and methods of forming a structure including static random access memory bit cells. A first bit cell includes a first plurality of semiconductor fins, and a second bit cell includes a second plurality of semiconductor fins. A deep trench isolation region is laterally positioned between the first plurality of semiconductor fins of the first bit cell and the second plurality of semiconductor fins of the second bit cell.