Abstract: A system includes a processor in a lid portion of a computing device. The processor is communicatively coupled to a plurality of input/output (I/O) devices according to a plurality of I/O communication protocols via a first number of wires. The system includes a first memory coupled to the processor to store instructions that can be executed by the processor and cause the processor to receive, from a first I/O device of the plurality of I/O devices, a first message according to a first I/O communication protocol of the plurality of I/O communication protocols, convert the first message to a second message according to a host communication protocol, and send the second message over a bus containing a second number of wires traversing a hinge movably coupling the lid portion to a base portion of the computing device. The second number of wires is less than the first number of wires.

Abstract: Half Quad Photodiode (QPD) for improving QPD channel imbalance. In one embodiment, an image sensor includes a plurality of pixels arranged in rows and columns of a pixel array that is disposed in a semiconductor material. Each pixel includes a plurality of subpixels. Each subpixel comprises a plurality of first photodiodes, a plurality of second photodiodes and a plurality of third photodiodes. The plurality of pixels are configured to receive incoming light through an illuminated surface of the semiconductor material. A plurality of small microlenses are individually distributed over individual first photodiodes and individual second photodiodes of each subpixel. A plurality of large microlenses are each distributed over a plurality of third photodiodes of each subpixel. A diameter of the small microlenses is smaller than a diameter of the large microlenses.

Abstract: Provided are a protein comprising a PD-L1 binding moiety linked to a TGF R binding moiety, an IL-1 binding moiety, an immunostimulating polypeptide (such as soluble LAG3 or soluble CD4) or a CD47 binding moiety, and a pharmaceutical preparation thereof, a preparation method thereof and the use thereof.

Abstract: A method, apparatus and computer program product are provided for generating a registered certified seal, sealing an asset, and verifying a sealed asset. In an example embodiment, a method is provided for receiving a request to generate a registered certified seal from an entity, accessing certifier entity data via a uniform resource locator of a certification authority identified by a certifying certificate, and verifying a digitally signed entity certifying certificate. The method further comprises upon verifying the digitally signed entity certifying certificate, receiving seal data comprising a seal data key for a certified seal, and saving the seal data for the entity within a digital seal registry, wherein the digital seal registry is searchable based at least in part on at least a portion of the seal data key.

Abstract: The present invention provides a surge protective device and a corresponding module. According to an aspect of the invention a surge protective device (1) comprises a base part (2) which is arranged to be fixed on a mounting rail. The base part (2) includes at least a first elongated plug-in section (P1) including at least a first to fourth mating contacts (M1-M4). An elongated first module (PM1) is arranged in the first plug-in section (P1) and includes a first and a second protective circuit component (OV1, OV2) adjacently arranged in longitudinal direction and fixedly mechanically connected to each other. The first module (PM1) includes at least a first to fourth contact pin (C1-C4) inserted in the first to fourth mating contacts (M1-M4), wherein the first and second contact pin (C1, C2) are electrically connected to the first protective circuit component (OV1) and the third and fourth contact pin (C3, C4) are electrically connected to the second protective circuit component (OV2).

Abstract: A method, apparatus and computer program product are provided for generating a registered certified seal, sealing an asset, and verifying a sealed asset. In an example embodiment, a method is provided for receiving a request to generate a registered certified seal from an entity, accessing certifier entity data via a uniform resource locator of a certification authority identified by a certifying certificate, and verifying a digitally signed entity certifying certificate. The method further comprises upon verifying the digitally signed entity certifying certificate, receiving seal data comprising a seal data key for a certified seal, and saving the seal data for the entity within a digital seal registry, wherein the digital seal registry is searchable based at least in part on at least a portion of the seal data key.

Abstract: The present disclosure provides herein conjugates of anti-CLDN18.2 antibodies or antigen-binding fragments thereof with radionuclides, the pharmaceutical composition containing the same and the uses thereof in imaging, patient screening, treatment process monitoring and efficacy evaluation.

Abstract: Provided are anti-MASP-2 antibodies or antigen-binding fragments thereof, isolated polynucleotides encoding the same, pharmaceutical compositions comprising the same, and the uses thereof.

Abstract: The present disclosure provides herein anti-gremlin1 antibodies or antigen-binding fragments thereof, isolated polynucleotides encoding the same, pharmaceutical compositions comprising the same, and the uses thereof.

Abstract: Provided are anti-hVEGFR2 antibodies or antigen-binding fragments thereof, isolated polynucleotides encoding the same, pharmaceutical compositions comprising the same, and the uses thereof.

Abstract: A system includes a processor in a lid portion of a computing device. The processor is communicatively coupled to a plurality of input/output (I/O) devices according to a plurality of I/O communication protocols via a first number of wires. The system includes a first memory coupled to the processor to store instructions that can be executed by the processor and cause the processor to receive, from a first I/O device of the plurality of I/O devices, a first message according to a first I/O communication protocol of the plurality of I/O communication protocols, convert the first message to a second message according to a host communication protocol, and send the second message over a bus containing a second number of wires traversing a hinge movably coupling the lid portion to a base portion of the computing device. The second number of wires is less than the first number of wires.

Abstract: A method, apparatus and computer program product are provided for generating a registered certified seal, sealing an asset, and verifying a sealed asset. In an example embodiment, a method is provided for receiving a request to generate a registered certified seal from an entity, accessing certifier entity data via a uniform resource locator of a certification authority identified by a certifying certificate, and verifying a digitally signed entity certifying certificate. The method further comprises upon verifying the digitally signed entity certifying certificate, receiving seal data comprising a seal data key for a certified seal, and saving the seal data for the entity within a digital seal registry, wherein the digital seal registry is searchable based at least in part on at least a portion of the seal data key.

Abstract: Provided are proteins comprising a PD-L1-binding moiety linked to a TGF?-binding moiety, IL-1-binding moiety, immunostimulatory polypeptides (e.g., soluble LAG3 or soluble CD4) or CD47-binding moiety, isolated polynucleotides encoding the same, pharmaceutical compositions comprising the same and the uses thereof.

Abstract: Image sensors for Phase-Detection Auto Focus (PDAF) are provided. An image sensor includes a pixel including a plurality of photodiodes disposed in a semiconductor material according to an arrangement. The arrangement defines a first image subpixel comprising a plurality of first photodiodes, a second image subpixel comprising a plurality of second photodiodes, and a third image subpixel including a plurality of third photodiodes, and a phase detection subpixel comprising a first photodiode, a second photodiode, or a third photodiodes. The pixel can include a plurality of first micro-lenses disposed individually overlying at least a subset of the plurality of photodiodes of the first, second and third image subpixels. The pixel can also include a second micro-lens disposed overlying the phase detection subpixel, a first micro-lens of the first micro-lenses having a first radius less than a second radius of the second micro-lens.

Abstract: Half Quad Photodiode (QPD) for improving QPD channel imbalance. In one embodiment, an image sensor includes a plurality of pixels arranged in rows and columns of a pixel array that is disposed in a semiconductor material. Each pixel includes a plurality of subpixels. Each subpixel comprises a plurality of first photodiodes, a plurality of second photodiodes and a plurality of third photodiodes. The plurality of pixels are configured to receive incoming light through an illuminated surface of the semiconductor material. A plurality of small microlenses are individually distributed over individual first photodiodes and individual second photodiodes of each subpixel. A plurality of large microlenses are each distributed over a plurality of third photodiodes of each subpixel. A diameter of the small microlenses is smaller than a diameter of the large microlenses.