Abstract: A display panel is provided. The display panel includes a base substrate and a plurality of sub-pixels, each of at least part of the sub-pixels includes a pixel driving circuit and a light-emitting device, the pixel driving circuit includes a first metal pattern, an active pattern and a second metal pattern, and the light-emitting device includes an electrode pattern electrically connected to the second metal pattern, the at least part of the sub-pixels includes a first color sub-pixel and a second color sub-pixel, in the first color sub-pixel, a ratio of an overlapping area of the active pattern and the first metal pattern to an area of the electrode pattern is X1, in the second color sub-pixel, a ratio of an overlapping area of the active pattern and the first metal pattern to an area of the electrode pattern is X2, and ½?X1/X2<1.

Abstract: A display substrate is provided, including: a base substrate; pixel units arranged in an array in a display region, each pixel unit includes sub-pixels each including a sub-pixel opening defined by a pixel defining layer on the base substrate; sub-pixel lenses arranged in an array on a side of the pixel defining layer away from the base substrate. Each pixel unit includes at least two sub-pixels having a same color, an orthographic projection of the sub-pixel opening on the base substrate is parallelogram, and is located within that of the corresponding sub-pixel lens on the base substrate which is circle. Adjacent side edges of two adjacent sub-pixel openings are arranged parallel to each other and spaced apart by a first distance D1, and closest points between adjacent sub-pixel lenses are spaced apart by a second distance D2 less than the first distance D1.

Abstract: A pixel arrangement structure, a display substrate, and a display device. The pixel arrangement structure includes a plurality of pixel sets; each pixel set comprises a first sub-pixel, a second sub-pixel, a third sub-pixel, and a fourth sub-pixel; in the pixel set, a line connecting the center of the second sub-pixel and the center of the third sub-pixel is a first line segment; the first sub-pixel and the fourth sub-pixel are located between the second sub-pixel and the third sub-pixel and are respectively disposed at two sides of the first line segment; a line connecting the center of the first sub-pixel and the center of the fourth sub-pixel is a second line segment, and the length of the second line segment is shorter than the length of the first line segment.

Abstract: A pixel arrangement structure, a display substrate, and a display device. In the pixel arrangement structure, a shape of the first sub-pixel includes a first main body portion and a first protrusion, a size of the first protrusion in the first direction is smaller than a size of the first main body portion, a shape of the second sub-pixel includes a second main body portion and a second protrusion, a size of the second protrusion in the first direction is smaller than a size of the second main body portion, in each of the plurality of pixel groups, a virtual straight line passing through a bottom edge of the first main body portion away from the first protrusion and extending in the first direction is overlapped with the second protrusion of the second sub-pixel, and not overlapped with the second main body portion of the second sub-pixel.

Abstract: A display substrate, a preparation method thereof, a display panel, and a display device are provided. The display substrate includes a base substrate and a repeating unit, the repeating unit includes a plurality of sub-pixels including a first sub-pixel and a second sub-pixel, a color of light emitted by a light-emitting element of the first sub-pixel is identical to a color of light emitted by a light-emitting element of the second sub-pixel, a shape of a first light-emitting voltage application electrode of the light-emitting element of the first sub-pixel is different from a shape of a first light-emitting voltage application electrode of the light-emitting element of the second sub-pixel.

Abstract: A display substrate includes an underlayer substrate and a circuit structure layer. The circuit structure layer is located in a display area of the underlayer substrate. The circuit structure layer includes at least one first circuit area and at least one second circuit area. The first circuit area includes at least one first gate drive circuit; the second circuit area includes at least one second gate drive circuit. The first gate drive circuit is cascaded with the second gate drive circuit. The first gate drive circuit includes a plurality of cascaded first gate drive units, and the second gate drive circuit includes a plurality of cascaded second gate drive units. A plurality of first gate drive units are sequentially arranged in a second direction, and a plurality of second gate drive units are sequentially arranged in the second direction.

Abstract: The present disclosure provides a display panel and a display apparatus, and belongs to the field of display technology. The display panel includes a plurality of pixel units each including a plurality of subpixels. At least one subpixel in at least one pixel unit is adjacent to at least two support parts, an angle is formed between connection lines respectively connecting centers of the at least two support parts adjacent to the at least one subpixel and a center of the subpixel, and two angles adjacent in a first direction have different orientations.

Abstract: A method includes: a processor that obtains several lines of data in to-be-displayed display data to generate a data block; generates a synchronization flag corresponding to the data block; encapsulates the data block and the synchronization flag corresponding to the data block to obtain a data packet corresponding to the data block; and sends all data packets corresponding to the display data to the display system. The display system sequentially parses all the data packets sent by the processor to obtain a synchronization flag associated with each data packet, and determines a display location of each data block on a display panel based on the synchronization flag to display the display data.

Abstract: Provided are a display substrate and a display device. The display substrate includes a driving transistor and a storage capacitor, the storage capacitor includes a first electrode plate and a second electrode plate, the second electrode plate is arranged in a same layer as the channel of the driving transistor, the second electrode plate is closer to the base substrate than the first electrode plate, an orthographic projection of the second electrode plate on the base substrate overlaps with an orthographic projection of the pixel opening on the base substrate, the display substrate satisfies a following relationship: a value range of (W*L+S2)*M1/M2 is [0.014, 0.133], and a value range of S2/(W*L) is [2.82, 28.

Abstract: A display panel includes a base substrate, and a pixel definition layer and pixels that are disposed on the base substrate. The pixel definition layer includes first pixel openings, second pixel openings and third pixel openings. The pixels are arranged in M rows and N columns. A pixel includes a first sub-pixel located at a first pixel opening, a second sub-pixel located at a second pixel opening, and a third sub-pixel located at a third pixel opening. The first sub-pixel, the second sub-pixel and the third sub-pixel emit light of different colors and are sequentially arranged in a third direction. In the third direction, two adjacent sub-pixels that emit light of a same color are separated by at least two sub-pixels that emit light of another colors, and the at least two sub-pixels emit light of colors that are different from each other.

Abstract: A display substrate and a display apparatus. The display apparatus comprises a base substrate and, disposed on the base substrate, a plurality of light-emitting elements and a pixel defining pattern. The light-emitting elements comprise a light-emitting functional layer, a first electrode and a second electrode; the pixel defining pattern comprises a plurality of openings and a defining part surrounding the plurality of openings, and the light-emitting elements are at least partially located in the openings.

Abstract: Provided are a display substrate and a display device. The display substrate includes: a base substrate and a plurality of sub-pixels on the base substrate; each sub-pixel includes: a pixel circuit including a storage capacitor including a first electrode plate and a second electrode plate; a light-emitting element; and a pixel definition layer. The sub-pixels include a plurality of openings, orthographic projections of the opening and the second electrode plate on the base substrate are overlapped; the second electrode plate includes a first edge and a second edge extending in the first direction; the opening includes a first edge and a second edge extending in the first direction; the first edge of the second electrode plate is closer to the first edge of the opening; the second edge of the second electrode plates is closer to the second edge of the opening.

Abstract: The embodiments of the present disclosure provide an array substrate and a display device. The array substrate includes a plurality of first sub-pixel rows, each of which includes a plurality of first sub-pixels and a plurality of second sub-pixels alternately arranged in a first direction; and a plurality of second sub-pixel rows, each of which includes a plurality of third sub-pixels and a plurality of fourth sub-pixels alternately arranged in the first direction, the plurality of first sub-pixel rows and the plurality of second sub-pixel rows are alternately arranged along a second direction, and in each of the first sub-pixel rows, an included angle between a connection line of a center of one of the first sub-pixels and a center of one of the second sub-pixels which are adjacent to each other and the first direction is less than 20 degrees.

Abstract: A display panel, including: a substrate; a pixel defining layer; a plurality of light-emitting devices each including a light-emitting functional layer and first and second electrodes; a supplementary electrode on a side of the second electrode away from the substrate, where an orthographic projection of the supplementary electrode on the substrate covers orthographic projections of light-emitting functional layers and/or second electrodes and/or first electrodes of the light-emitting devices of certain colors on the substrate; a supplementary electrode mutual repulsion layer on a side of the second electrode away from the substrate, where an orthographic projection of the supplementary electrode mutual repulsion layer on the substrate is complementary in pattern with the orthographic projection of the supplementary electrode on the substrate; and an encapsulation layer on a side of the supplementary electrode and the supplementary electrode mutual repulsion layer away from the substrate, and configured to en

Abstract: A grid-driving-circuit array is applied to a display panel, the display panel is delimited into a plurality of active areas, and each of the active areas includes multiple rows of pixel units and multiple rows of grid lines. The multiple groups of grid driving units supply grid driving signals to the plurality of active areas, and each of the groups of grid driving units includes one or more grid driving circuits. The one or more grid driving circuits are configured for supplying the grid driving signals to the grid lines within the active area corresponding to the one or more grid driving circuits. One or more multiplexers, wherein each of the multiplexers includes a plurality of frame-starting-up-signal outputting units, each of the frame-starting-up-signal outputting units of the multiplexer is configured for supplying a frame starting-up signal to one of the grid driving circuits.

Abstract: A data transmission cable (100) includes: a signal bundle (110), where the signal bundle (110) includes at least three signal cables, the at least three signal cables are disposed at intervals, pairwise signal cables form a differential pair signal cable, and the differential pair signal cable is used to transmit a differential data signal; a ground cable (120), where the ground cable (120) encircles and covers the signal bundle (110), and the ground cable (120) is used to transmit a ground signal and isolate the signal bundle (110) from a signal bundle (110) of another data transmission cable (100); and a filling medium (130), where the filling medium (130) is disposed in space on an inner side of the ground cable (120) except the signal cable, so that a problem that a MIPI bus has poor transmission quality and a short transmission distance can be resolved.

Abstract: A display substrate includes an underlayer substrate and a circuit structure layer. The circuit structure layer is located in a display area of the underlayer substrate. The circuit structure layer includes at least one first circuit area and at least one second circuit area. The first circuit area includes at least one first gate drive circuit; the second circuit area includes at least one second gate drive circuit. The first gate drive circuit is cascaded with the second gate drive circuit. The first gate drive circuit includes a plurality of cascaded first gate drive units, and the second gate drive circuit includes a plurality of cascaded second gate drive units. A plurality of first gate drive units are sequentially arranged in a second direction, and a plurality of second gate drive units are sequentially arranged in the second direction.

Abstract: A electronic device includes a plurality of first photosensitive chips, one first fusion chip, and one processing chip. Each first photosensitive chip is connected to the first fusion chip by a respective data transmission channel and is configured both to generate a MIPI protocol-based data stream and to transmit said data stream to the first fusion chip by the respective data transmission channel. The first fusion chip is connected to the processing chip by a data transmission channel and is configured to converge data streams received via a plurality of data transmission channels connected to the plurality of first photosensitive chips, to obtain a first high-speed convergent data, and to send the first high-speed convergent data to the processing chip. The processing chip is configured to receive the high-speed convergent data stream and obtain an image by using the received data stream.

Abstract: The invention relates to the technical field of vehicle charging, and particularly provides a vehicle charging port mounting assembly and a vehicle. The invention aims to solve the problem that existing charging port components have a poor design of mounting structure and thus cannot well meet the usage requirements. To this end, the vehicle charging port mounting assembly of the invention comprises a body side outer panel, a charging port component, a charging port mounting component, a rear wheel cover outer panel and a rear wheel cover outer panel reinforcing plate, wherein the charging port mounting component comprises a mounting bracket and an accommodation support member which is provided with an accommodation chamber, the mounting bracket being disposed in the accommodation chamber and fixedly connected to the accommodation support member, and the accommodation support member being disposed between the body side outer panel and the rear wheel cover outer panel.

Abstract: An array substrate and a display device are provided. The array substrate includes a plurality of sub-pixel repeating units, each sub-pixel repeating unit includes four first color sub-pixels, two second color sub-pixels and two third color sub-pixels, in each sub-pixel repeating unit, the shape of each first color sub-pixel is an axisymmetric figure, centers of the four first color sub-pixels are located on a same virtual line, a center of one of the two second color sub-pixels and a center of one of the two third color sub-pixels are located on a first side of the virtual line, a center of the other one of the two second color sub-pixels and a center of the other one of the two third color sub-pixels are located on a second side of the virtual line.