Abstract: A shift register, a method for driving the same, a gate driving circuit and a display device are provided. The shift register includes an input sub-circuit, a pull-down control sub-circuit, an output sub-circuit and a reset sub-circuit. The pull-down control sub-circuit is connected to a first signal input terminal, a pull-up node, a pull-down node and a first power terminal, and is configured to supply a first voltage signal of the first power terminal to the pull-down node under the control of the first input signal and a potential of the pull-up node. The output sub-circuit is connected to the first node and a second clock signal terminal, and is configured to output a second clock signal of the second clock signal terminal to a first output terminal and a second output terminal under the control of the potential of the pull-up node.

Abstract: A shift register unit, a gate driving circuit, a display device, and a driving method are provided. The shift register unit includes an input circuit, an output circuit, a first node control circuit, and a second node control circuit. The input circuit is configured to provide an input signal to a first node in response to a first control signal; the output circuit is configured to output an output signal at an output terminal under control of a level of the first node; the first node control circuit is configured to reset the first node under control of a level of a second node; and the second node control circuit is connected to the second node, and is configured to provide a third control signal to the second node in response to a second control signal to control the level of the second node.

Abstract: The present disclosure provides a fingerprint recognition substrate, including: an electrode driving circuit, a signal line extending in a first direction, and a gate line extending in a second direction, where the electrode driving circuit is connected to the signal line and the gate line; and a functional electrode layer comprising a first electrode connected to the electrode driving circuit and a second electrode extending in the second direction, where a mutual capacitance is formed by the first electrode and the second electrode, and where multiple ones of the first electrode disposed in a same column along the first direction are connected a same one of the signal line through the electrode driving circuit, respectively.

Abstract: A shift register unit, a gate driving circuit, a display device, and a driving method are provided. The shift register unit includes an input circuit, an output circuit, a first node control circuit, and a second node control circuit. The input circuit is configured to provide an input signal to a first node in response to a first control signal; the output circuit is configured to output an output signal at an output terminal under control of a level of the first node; the first node control circuit is configured to reset the first node under control of a level of a second node; and the second node control circuit is connected to the second node, and is configured to provide a third control signal to the second node in response to a second control signal to control the level of the second node.

Abstract: A shift register, a method for driving the same, a gate drive circuit and a display device are provided. The shift register includes a write circuit, a pull-down control circuit and an output circuit. The write circuit is configured to write a write signal provided by a write signal input terminal to a pull-up node. The pull-down control circuit is configured to write a first operating voltage provided by a first power supply terminal to a pull-down node, and write a first clock signal to the pull-down node. The output circuit is configured to write a drive signal provided by a drive signal input terminal to a drive signal output terminal, and write a second operating voltage provided by a second power supply terminal to the drive signal output terminal.

Abstract: A switching element, a manufacturing method thereof, an array substrate and a display device are provided. The switching element includes: a base substrate; a first thin-film transistor (TFT), disposed on the base substrate; and a second TFT, disposed on the first TFT, wherein the first TFT includes a first electrode and a second electrode, and the first TFT and the second TFT share the first electrode and the second electrode.

Abstract: A shift register and a driving method thereof, a gate drive circuit and a display device are provided. The shift register may comprise a transmission sub-circuit, a storage sub-circuit and an output control sub-circuit. The shift register may further comprise an output buffer sub-circuit and a reset sub-circuit. The gate drive circuit may comprise a plurality of cascaded shift registers as described above. The display device may comprise the gate drive circuit. The present disclosure guarantees the working stability, use reliability and display effect of a display panel.

Abstract: The disclosure relates to a shift register unit, a driving method of shift register units, a gate driving circuit and a display panel. The shift register unit includes: an input module, a pull-up module, a storage capacitor, an output module configured to transmit a first voltage signal to a signal output terminal under the control of the first voltage signal; and an output control module configured to transmit the first voltage signal or a second power signal to the signal output terminal under the control of the voltage signal of the pull-up node and a first selection signal, and to transmit the first voltage signal or the second power signal to the signal output terminal under the control of the voltage signal of the pull-up node and a second selection signal.

Abstract: The present disclosure provides a shift register unit. The shift register unit includes an input module, an output module and an output control module. The input module is connected to an input signal terminal, a first power supply signal terminal and a pull-up node, and is configured to transmit a first power supply signal to the pull-up node. The output module is connected to the pull-up node, a clock signal terminal and an output control node, and is configured to transmit a clock signal to the output control node. The output control module is connected to the output control node, the clock signal terminal and a signal output terminal, and is configured to transmit a signal of the output control node to the signal output terminal under the control of the clock signal.

Abstract: The present disclosure relates to the field of display technologies and provides a shift register unit. The shift register unit includes an input circuit, a pull-up circuit, an output circuit, an auxiliary circuit, a pull-down circuit, a first storage capacitor, and a second storage capacitor. The auxiliary circuit is coupled to a first clock signal terminal, a second clock signal terminal, an input terminal and a first output terminal. The second storage capacitor is coupled between a first node and a pull-up node.

Abstract: The present disclosure relates to a mask and a manufacturing method thereof as well as a display device, the mask includes a transmittable substrate and a mask pattern formed on the transmittable substrate, wherein a transmittance of the transmittable substrate decreases gradually from the edge to the center.

Abstract: A shift register and a method for driving the same, a gate driving circuit and a display device. The shift register includes: an input sub-circuit configured to provide a signal at the signal input terminal to the pull-up node under control of the first clock signal terminal; an output sub-circuit configured to provide a clock signal at the second clock signal terminal to the signal output terminal under control of the pull-up node; and a pull-down sub-circuit configured to provide a signal at the power supply terminal to the signal output terminal under control of the third clock signal terminal.

Abstract: A display substrate and a display device. The display substrate includes a signal line, an electro-static lead-out line, and an electro-static discharge unit including a first thin film transistor, a third thin film transistor and a fourth thin film transistor; a drain electrode and a gate electrode of the first thin film transistor are connected to the signal line; a source electrode of the first thin film transistor, a gate electrode of the third thin film transistor and a gate electrode of the fourth thin film transistor are connected to a first node; a drain electrode of the third thin film transistor and a drain electrode of the fourth thin film transistor are connected to the signal line; a source electrode of the third thin film transistor and a source electrode of the fourth thin film transistor are connected to the electro-static lead-out line.

Abstract: The embodiments of the present application disclose a shift register unit and a method for driving the same, a gate driving circuit and a method for driving the same, and a display apparatus. The shift register unit comprises an input sub-circuit connected to an input signal terminal and a pull-up control node, and configured to charge the pull-up control node under control of an input signal; and an output sub-circuit connected to the pull-up control node, a clock signal terminal, a first voltage terminal, and an output signal terminal, and configured to output a first constant voltage to the output signal terminal under control of a clock signal and the pull-up control node.

Abstract: A fabrication method of a mask and a mask, a display panel and a touch panel are provided. The fabrication method of the mask includes: providing a substrate; forming a photoresist material layer on the substrate; and performing at least two scanning exposure processes on the photoresist material layer by using a scanning beam, wherein, each of the at least two scanning exposure processes is performed along a first direction parallel to a surface where the substrate is located, the scanning beam in each of the at least two scanning exposure processes scans the photoresist material layer in a scanning region having a preset width, at least one pair of adjacent scanning regions partially overlap with each other, and a partially overlapping region of the at least one pair of adjacent scanning regions is located in a first region of the mask.

Abstract: A shift register and a driving method thereof, a gate drive circuit and a display device are provided. The shift register may comprise a transmission sub-circuit, a storage sub-circuit and an output control sub-circuit. The shift register may further comprise an output buffer sub-circuit and a reset sub-circuit. The gate drive circuit may comprise a plurality of cascaded shift registers as described above. The display device may comprise the gate drive circuit. The present disclosure guarantees the working stability, use reliability and display effect of a display panel.

Abstract: According to one aspect of this disclosure, a scanning trigger unit includes a clock signal terminal, a first signal input terminal, a fixed level signal terminal, a first input sub-circuit, an output sub-circuit, a first holding sub-circuit, and a signal output terminal. The first input sub-circuit is connected to the first signal input terminal and a control node, and is configured to provide a first valid signal to the control node; the output sub-circuit is connected to the fixed level signal terminal, the clock signal terminal, and the control node, and is configured to provide a second valid signal to the signal output terminal; and the first holding sub-circuit is connected to the fixed level signal terminal and the signal output terminal, and is configured to hold the second valid signal at the signal output terminal for a predetermined time.

Abstract: A shift register includes a first input sub-circuit, a first output sub-circuit, and a second output sub-circuit. The first input sub-circuit is connected to a first input terminal, a pull-up node, and a first control terminal, and the first input sub-circuit is configured to output a voltage of the first control terminal to the pull-up node under control of a voltage of the first input terminal. The first output sub-circuit is connected to the pull-up node, a clock signal terminal, and an output terminal, and the first output sub-circuit is configured to output a first level of the clock signal terminal to the output terminal under control of a voltage of the pull-up node. The second output sub-circuit is connected to the output terminal, a second output control terminal, and a first voltage terminal, and the second output sub-circuit is configured to output a voltage of the first voltage terminal to the output terminal under control of a voltage of the second output control terminal.

Abstract: A test device and a test method are provided. The test device can comprise a movable probe platform, a plurality of signal access points, and a plurality of test probes fixed on the movable probe platform. Each of the plurality of signal access points is correspondingly coupled to one test probe for accessing a corresponding test signal. The plurality of the test probes are configured to contact with test pads on a panel to be tested, and to transmit test signals accessed from the plurality of the signal access points to the test pads, so as to perform an electrical test to the panel to be tested.

Abstract: A shift register circuit includes an input terminal, a reset terminal, a first scan voltage terminal, a second scan voltage terminal, a first reference voltage terminal, a second reference voltage terminal, a clock terminal, an output terminal, an input circuit, a first control circuit, a second control circuit, and an output circuit. The first control circuit is configured to supply a second reference voltage applied at the second reference voltage terminal to a first node and bring the second reference voltage terminal into conduction with the output terminal in response to a second node being at an active potential. The second control circuit is configured to supply a first reference voltage applied at the first reference voltage terminal to the first node and bring the first reference voltage terminal into conduction with the output terminal in response to a third node being at an active potential.