Abstract: A wrinkle detection method includes: rotating a region, in a face image, in which a wrinkle needs to be detected, to obtain a plurality of to-be-detected images; determining wrinkle points from all pixel points based on grayscale values of the pixel points in each of the to-be-detected images with different angles; determining at least one wrinkle line based on the wrinkle points; and then displaying, by the electronic device, the wrinkle line in the region in which the wrinkle needs to be detected, where each wrinkle line indicates one wrinkle in each of the to-be-detected images.

Abstract: The present invention discloses a flue gas low-temperature adsorption denitrification method, including: pressurizing a flue gas that has been subjected to dust removal and desulfurization, precooling the pressurized flue gas, cooling the precooled flue gas to a temperature lower than room temperature by a flue gas cooling system, flowing the flue gas at the temperature lower than room temperature into a low-temperature denitrification system, performing physical adsorption denitrification in the low-temperature denitrification system, precooling the flue gas that has been subjected to dust removal and desulfurization with the denitrificated flue gas, and flowing the heat-absorbed clean flue gas into a chimney to be discharged.

Abstract: The present application discloses a semiconductor device and a manufacturing method thereof. The manufacturing method comprises manufacturing a semiconductor material layer comprising two laminated semiconductor layers between which an etching transition layer is provided; and etching a part of one of semiconductor layers located in a selected region until etching is stopped after reaching or entering the etching transition layer, subjecting the part of the etching transition layer located in the selected region to thermal decomposition through thermal treatment to be completely removed, and realizing termination of thermal decomposition on another semiconductor layer, so as to precisely form a trench structure in the semiconductor material layer.

Abstract: The present disclosure relates to an application of anemoside B4 in preparation of drug for treatment or prevention of psoriasis. Anemoside B4 has therapeutic effect on 5% imiquimod-induced psoriatic lesions in mice. Its possible mechanism may be inhibiting inflammation reactions, regulating immune function and inhibiting angiogenesis, and the therapeutic effect may be realized by inhibiting the release of IL-12, IL-17, IL-6 and IL-1? in skin tissue. This study of the present disclosure laid a theoretical foundation for the subsequent development of anemoside B4 into an anti-psoriasis drug of traditional Chinese medicine.

Abstract: The present disclosure relates to an application of anemoside B4 in preparation of drug for treatment or prevention of psoriasis. Anemoside B4 has therapeutic effect on 5% imiquimod-induced psoriatic lesions in mice. Its possible mechanism may be inhibiting inflammation reactions, regulating immune function and inhibiting angiogenesis, and the therapeutic effect may be realized by inhibiting the release of IL-12, IL-17, IL-6 and IL-1? in skin tissue. This study of the present disclosure laid a theoretical foundation for the subsequent development of anemoside B4 into an anti-psoriasis drug of traditional Chinese medicine.

Abstract: Disclosed are a special robot with complex terrain adaptive function and a motion and operation method thereof. The special robot comprises a crawler chassis, a shock absorption suspension assembly, a suspension adaptive adjustment assembly and an electronic control assembly. The present disclosure achieves an adaptive angle adjustment on the left and right sides of the shock absorption suspension assembly, including the independent pitch angle and roller angle adjustment on the left and right sides of the shock absorption suspension assembly by the configuration of structures such as the suspension adaptive adjustment assembly and then achieves the adaptability of the robot on complex and tough pavement conditions by the combination with a sensor for pavement perception, which ensures walking performance and attachment ability of mechanisms, further improves the load-bearing performance of the crawler robot, ensures the safety, stability and adaptability of the mobile platform.

Abstract: A group III nitride enhancement-mode HEMT based on a composite barrier layer structure and a manufacturing method thereof are provided. The HEMT includes first and second semiconductors respectively serving as a channel layer and a barrier layer, a third semiconductor serving as a p-type layer, a source, a drain and a gate, wherein a recessed structure is formed in the region of the barrier layer corresponding to the gate, which is matched with the third semiconductor and the gate to form a p-type gate, and the second semiconductor includes first and second structure layers successively arranged on the first semiconductor; relative to the selected etching reagent, the first structure layer has higher etching resistance than the second structure layer.

Abstract: Disclosed are a special robot with complex terrain adaptive function and a motion and operation method thereof. The special robot comprises a crawler chassis, a shock absorption suspension assembly, a suspension adaptive adjustment assembly and an electronic control assembly. The present disclosure achieves an adaptive angle adjustment on the left and right sides of the shock absorption suspension assembly, including the independent pitch angle and roller angle adjustment on the left and right sides of the shock absorption suspension assembly by the configuration of structures such as the suspension adaptive adjustment assembly and then achieves the adaptability of the robot on complex and tough pavement conditions by the combination with a sensor for pavement perception, which ensures walking performance and attachment ability of mechanisms, further improves the load-bearing performance of the crawler robot, ensures the safety, stability and adaptability of the mobile platform.

Abstract: A data optimization method and an integral prestack depth migration method are provided, including acquiring a target matrix to be optimized; generating a first sequence according to the target matrix; rarefying the first sequence according to a preset grid density to obtain a value position of each element of a second sequence, and working out a value of each element of the second sequence on the basis of the principle of least squares; performing interpolation on the second sequence to obtain a third sequence; calculating a target matrix corresponding to the third sequence; calculating an error between the target matrix to be optimized and the target matrix corresponding to the third sequence; recording, when the error is less than the first error threshold, the target matrix corresponding to the above second sequence as an optimized target matrix of the target matrix to be optimized.

Abstract: The present application discloses a semiconductor device and a manufacturing method thereof. The manufacturing method comprises manufacturing a semiconductor material layer comprising two laminated semiconductor layers between which an etching transition layer is provided; and etching a part of one of semiconductor layers located in a selected region until etching is stopped after reaching or entering the etching transition layer, subjecting the part of the etching transition layer located in the selected region to thermal decomposition through thermal treatment to be completely removed, and realizing termination of thermal decomposition on another semiconductor layer, so as to precisely form a trench structure in the semiconductor material layer.

Abstract: A test circuitry and a method for testing the same and a test system are provided. The test circuitry includes: a test signal input end, configured to input an initial test signal; a signal output end, configured to output a target test signal; and a signal shaping circuitry coupled to the test signal input end and the signal output end, configured to remove a noise signal from the initial test signal to obtain the target test signal.

Abstract: The present disclosure relates to a method and system for performing aging process on the transistor in the display panel. A method for performing aging process on a transistor in a display panel, comprising: obtaining an initial characteristic curve of the transistor; determining an initial cutoff voltage range of the transistor according to the obtained initial characteristic curve; determining a gate-source voltage and a drain-source voltage required by the transistor according to the initial cutoff voltage range, so as to increase an cutoff voltage range of the transistor; and performing aging process on the transistor according to the determined required gate-source voltage and drain-source voltage.

Abstract: The present disclosure belongs to the field of display technology, and particularly relates to a test circuit, a display substrate, a test method of a display substrate and a display apparatus. The test circuit includes a signal generating device and a plurality of output channels that are mutually independent. Each output channel includes a signal line configured to transmit a test signal. The signal generating device is coupled to the plurality of output channels, and is configured to provide, to each of at least one of the plurality of output channels, the test signal corresponding to an impedance of the signal line in the output channel, and provide the test signal to the signal line in the output channel.

Abstract: A group III nitride enhancement-mode HEMT based on a composite barrier layer structure and a manufacturing method thereof are provided. The HEMT includes first and second semiconductors respectively serving as a channel layer and a barrier layer, a third semiconductor serving as a p-type layer, a source, a drain and a gate, wherein a recessed structure is formed in the region of the barrier layer corresponding to the gate, which is matched with the third semiconductor and the gate to form a p-type gate, and the second semiconductor includes first and second structure layers successively arranged on the first semiconductor; relative to the selected etching reagent, the first structure layer has higher etching resistance than the second structure layer.

Abstract: A data optimization method and an integral prestack depth migration method are provided, including acquiring a target matrix to be optimized; generating a first sequence according to the target matrix; rarefying the first sequence according to a preset grid density to obtain a value position of each element of a second sequence, and working out a value of each element of the second sequence on the basis of the principle of least squares; performing interpolation on the second sequence to obtain a third sequence; calculating a target matrix corresponding to the third sequence; calculating an error between the target matrix to be optimized and the target matrix corresponding to the third sequence; recording, when the error is less than the first error threshold, the target matrix corresponding to the above second sequence as an optimized target matrix of the target matrix to be optimized.

Abstract: The present application discloses a nitride semiconductor light-emitting device and a manufacture method thereof. The nitride semiconductor light-emitting device includes an epitaxial structure, wherein the epitaxial structure has a first face and a second face opposite to the first face, the first face is a (0001) nitrogen face and located at the n type side of the epitaxial structure, the second face is located at the p type side of the epitaxial structure, the n type side of the epitaxial structure is electrically contacted with an n type electrode, the p type side is electrically contacted with a p type electrode, and a ridge waveguide structure is formed on the first face.

Abstract: A set of measurement voltages having different voltage values are subsequently inputted to a measurement voltage input terminal of the pixel driving circuit, a light emitting state of a light emitting device under each measurement voltage is detected, and it is determined whether a storage capacitor in the pixel driving circuit is normal based on the light emitting state of the light emitting device.

Abstract: The present application discloses a nitride semiconductor light-emitting device and a manufacture method thereof. The nitride semiconductor light-emitting device includes an epitaxial structure, wherein the epitaxial structure has a first face and a second face opposite to the first face, the first face is a (0001) nitrogen face and located at the n type side of the epitaxial structure, the second face is located at the p type side of the epitaxial structure, the n type side of the epitaxial structure is electrically contacted with an n type electrode, the p type side is electrically contacted with a p type electrode, and a ridge waveguide structure is formed on the first face.

Abstract: A test circuitry and a method for testing the same and a test system are provided. The test circuitry includes: a test signal input end, configured to input an initial test signal; a signal output end, configured to output a target test signal; and a signal shaping circuitry coupled to the test signal input end and the signal output end, configured to remove a noise signal from the initial test signal to obtain the target test signal.

Abstract: The present application discloses a circuit board and a method for manufacturing the same, and a terminal test device. The circuit board includes a base substrate, and a plurality of conductive lines on the base substrate, each of the plurality of conductive lines having one end configured to be connected with a signal output bus of a signal generator and the other end configured to be connected with a terminal. A fuse is connected in series in each conductive line, and a breaking current IT of the fuse, a maximum operating current I of the conductive line and a fault current IF of the conductive line satisfy: I<IT?IF, where the breaking current IT of the fuse is a minimum current that causes the fuse to open.