Patents by Inventor Hongyong Zhang

Hongyong Zhang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6297518
    Abstract: A structure for reducing the OFF current of an active matrix display. In the active matrix display, plural TFTs are connected in series with each one pixel electrode. Of these TFTs connected in series, at least one TFT excluding the TFTs located at opposite ends is maintained in conduction. Alternatively, at least one capacitor is connected between the junction of the drain and source of each TFT connected in series and an AC grounded point. Thus, the amount of electric charge released from auxiliary capacitors during cutoff of the TFTs is reduced.
    Type: Grant
    Filed: June 26, 1998
    Date of Patent: October 2, 2001
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Hongyong Zhang
  • Publication number: 20010023091
    Abstract: In producing a semiconductor device such as a thin film transistor (TFT), a silicon semiconductor film is formed on a substrate having an insulating surface, such as a glass substrate, and then a silicon nitride film is formed on the silicon semiconductor film. After that, a hydrogen ion, fluorine ion, or chlorine ion is introduced into the silicon semiconductor film through the silicon nitride film, and then the silicon semiconductor film into which an ion is introduced is heated in an atmosphere containing hydrogen, fluorine, chlorine or these mixture, to neutralize dangling bonds in the silicon semiconductor film and reduce levels in the silicon semiconductor film.
    Type: Application
    Filed: December 19, 2000
    Publication date: September 20, 2001
    Inventors: Naoaki Yamaguchi, Hongyong Zhang, Satoshi Teramoto, Hideto Ohnuma
  • Publication number: 20010023089
    Abstract: A method for improving the reliability and yield of a thin film transistor by controlling the crystallinity thereof. The method comprises the steps of forming a gate electrode on an island amorphous silicon film, injecting an impurity using the gate electrode as a mask, forming a coating film containing at least one of nickel, iron, cobalt, platinum and palladium so that it adheres to parts of the impurity regions, and annealing it at a temperature lower than the crystallization temperature of pure amorphous silicon to advance the crystallization starting therefrom and to crystallize the impurity regions and channel forming region.
    Type: Application
    Filed: May 4, 2001
    Publication date: September 20, 2001
    Inventors: Shunpei Yamazaki, Yasuhiko Takemura, Hongyong Zhang
  • Publication number: 20010022364
    Abstract: In order to obtain a thin-film transistor having high characteristics using a metal element for accelerating the crystallization of silicon, a nickel element is selectively added to the surface of an amorphous silicon film (103) in regions (101) and (102) and regions (108) to (110), and a heat treatment is carried out to grow crystals (horizontal growth) in directions parallel to the substrate as indicated by arrows (104) to (107). At this point, the regions (108) to (110) having a width of 5 &mgr;m or less serve as stopper regions so that horizontal growth starting from the regions (101) and (102) stops there. In this way, the horizontal growth regions can be formed with high controllability. Then a circuit such as a shift register can be constructed with a region having the same crystal growth form.
    Type: Application
    Filed: March 12, 2001
    Publication date: September 20, 2001
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Hongyong Zhang
  • Publication number: 20010021566
    Abstract: In an anodic oxidization method of the invention for anodizing areas including and surrounding a plurality of gate electrodes connected to a current supply line by respective gate connecting lines, the current supply line supplies currents to the gate electrodes in a manner that the densities of anodizing currents flowing through corresponding parts of any two parallel-running neighboring gate electrodes arranged in a semiconductor island area become substantially equal to each other. No leakage current flows from one gate electrode to another because the anodizing currents are supplied in such a way that no potential difference occurs between any two neighboring gate electrodes during anodic oxidization as a result of differences in current path length. This makes it possible to prevent crystal defects and partial anodization imperfections which could potentially be caused by leakage currents.
    Type: Application
    Filed: October 20, 1998
    Publication date: September 13, 2001
    Inventors: HONGYONG ZHANG, HIDEKI UOCHI, YOSUKE TSUKAMOTO, YUTAKA TAKAFUJI, YASUSHI KUBOTA
  • Patent number: 6288764
    Abstract: A configuration is provided in which a sealing material 104 is provided on a peripheral driving circuit. With this configuration, layers 240 and 237 made of a resin material are provided under the sealing material 104. This makes it possible to moderate the application of a local stress to the peripheral driving circuit due to the presence of a filler 103 included in the sealing material 104. Thus, breakage of the peripheral driving circuit can be avoided.
    Type: Grant
    Filed: June 20, 1997
    Date of Patent: September 11, 2001
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hongyong Zhang, Shunpei Yamazaki, Satoshi Teramoto, Yoshiharu Hirakata
  • Patent number: 6288388
    Abstract: There is provided a laminated type photoelectric converter whose sensitivity is enhanced uniformly. In the photoelectric converter in which a photoelectric conversion device is laminated above a signal transfer device, the sensitivity is enhanced by providing bends on a lower electrode of the photoelectric conversion device and by confining light uniformly.
    Type: Grant
    Filed: September 24, 1998
    Date of Patent: September 11, 2001
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hongyong Zhang, Masayuki Sakakura
  • Patent number: 6285042
    Abstract: A process for fabricating a highly stable and reliable semiconductor, comprising: coating the surface of an amorphous silicon film with a solution containing a catalyst element capable of accelerating the crystallization of the amorphous silicon film, and heat treating the amorphous silicon film thereafter to crystallize the film.
    Type: Grant
    Filed: September 12, 1997
    Date of Patent: September 4, 2001
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hisashi Ohtani, Akiharu Miyanaga, Takeshi Fukunaga, Hongyong Zhang
  • Publication number: 20010018224
    Abstract: TFTs of peripheral logic circuits and TFTs of an active matrix circuit (pixel circuit) are formed on a single substrate by using a crystalline silicon film. The crystalline silicon film is obtained by introducing a catalyst element, such as nickel, for accelerating crystallization into an amorphous silicon film and heating it. In doing so, the catalyst element is introduced into regions for the peripheral logic circuits in a non-selective manner, and is selectively introduced into regions for the active matrix circuit. As a result, vertical crystal growth and lateral crystal growth are effected in the former regions and the latter regions, respectively. Particularly in the latter regions, the off-current and its variation can be reduced.
    Type: Application
    Filed: January 7, 2001
    Publication date: August 30, 2001
    Inventor: Hongyong Zhang
  • Publication number: 20010014517
    Abstract: There is provided a method for eliminating influence of nickel element from a crystal silicon film obtained by utilizing nickel. A mask made of a silicon oxide film is formed on an amorphous silicon film. Then, the nickel element is held selectively on the surface of the amorphous silicon film by utilizing the mask. Next, a heat treatment is implemented to grow crystal. This crystal growth occurs with the diffusion of the nickel element. Next, phosphorus is doped to a region by using the mask. Then, another heat treatment is implemented to remove the nickel element from the pattern under the mask through the course reverse to the previous course in diffusing the nickel element in growing crystal. Then, the silicon film is patterned by utilizing the mask again to form a pattern. Thus, the pattern of the active layer which has high crystallinity and from which the influence of the nickel element is removed may be obtained without increasing masks in particular (i.e. without complicating the process).
    Type: Application
    Filed: March 14, 2001
    Publication date: August 16, 2001
    Inventors: Hongyong Zhang, Hideto Ohnuma
  • Publication number: 20010014496
    Abstract: A method of manufacturing a semiconductor device comprises the steps of forming a first insulating film on a semiconductor layer, forming a gate electrode on the insulating film, pattering the first insulating film into a second insulating film so that a portion of the semiconductor layer is exposed while the second insulating film has extensions which extend beyond the side edges of the gate electrode, and performing ion introduction for forming impurity regions using the gate electrode and extensions of the gate insulating film as a mask. The condition of the ion introduction is varied in order to control the regions of the semiconductor layer to be added with the impurity and the concentration of the impurity therein.
    Type: Application
    Filed: February 9, 2001
    Publication date: August 16, 2001
    Inventors: Hongyong Zhang, Naoki Yamaguchi, Yasuhiko Takemura
  • Publication number: 20010013909
    Abstract: A structure is provided which avoids overlap of a pixel electrode and an intersecting portion of a gate line and a data line. For example, the pixel electrode is patterned such that its corner portion is intentionally cut out to avoid the intersecting portion. With this structure, the capacitance of a storage capacitor that is formed by an overlapping portion of the pixel electrode and a black matrix can be increased while short-circuiting in a third interlayer insulating film that is interposed between the pixel electrode and the black matrix is prevented.
    Type: Application
    Filed: April 23, 2001
    Publication date: August 16, 2001
    Applicant: Semiconductor Energy Laboratory Co., Ltd., Japanese corporation
    Inventors: Hongyong Zhang, Takeshi Fukunaga
  • Patent number: 6274861
    Abstract: In an active matrix display device integrated with peripheral drive circuits, an image sensor is provided on the same substrate as a pixel matrix and peripheral drive circuits. The image sensor is formed on the substrate having pixel electrodes, pixel TFTs connected to the pixel electrodes and CMOS-TFTs for driving the pixel TFTs. The light receiving unit of the image sensor has light receiving elements having a photoelectric conversion layer and light receiving TFTs. These TFTs are produced in the same step. The lower electrode and transparent electrode of the light receiving element are produced by patterning the same film as the light shielding film and the pixel electrodes arranged in the pixel matrix.
    Type: Grant
    Filed: June 9, 2000
    Date of Patent: August 14, 2001
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hongyong Zhang, Masayuki Sakakura
  • Patent number: 6271066
    Abstract: A semiconductor material and a method for forming the same, said semiconductor material having fabricated by a process comprising irradiating a laser beam or a high intensity light equivalent to a laser beam to an amorphous silicon film containing therein carbon, nitrogen, and oxygen each at a concentration of 5×1019 atoms·cm−3 or lower, preferably 1×1019 atoms·cm−3 or lower, without melting the amorphous silicon film. The present invention provides thin film semiconductors having high mobility at an excellent reproducibility, said semiconductor materials being useful for fabricating compact thin film semiconductor devices such as thin film transistors improved in device characteristics.
    Type: Grant
    Filed: July 23, 1993
    Date of Patent: August 7, 2001
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hongyong Zhang, Naoto Kusumoto, Yasuhiko Takemura
  • Patent number: 6261877
    Abstract: A method of manufacturing thin film field effect transistors is described. The channel region of the transistors is formed by depositing an amorphous semiconductor film in a first sputtering apparatus followed by thermal treatment for converting the amorphous phase to a polycrystalline phase. The gate insulating film is formed by depositing an oxide film in a second sputtering apparatus connected to the first apparatus through a gate valve. The sputtering for the deposition of the amorphous semiconductor film is carried out in an atmosphere comprising hydrogen in order to introduce hydrogen into the amorphous semiconductor film. On the other hand the gate insulating oxide film is deposited by sputtering in an atmosphere comprising oxygen.
    Type: Grant
    Filed: July 2, 1996
    Date of Patent: July 17, 2001
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hongyong Zhang, Takashi Inushima, Takeshi Fukada
  • Patent number: 6261875
    Abstract: A process for fabricating a thin film transistor, which comprises crystallizing an amorphous silicon film, forming thereon a gate insulating film and a gate electrode, implanting impurities in a self-aligned manner, adhering a coating containing a catalyst element which accelerates the crystallization of the silicon film, and annealing the resulting structure at a temperature lower than the deformation temperature of the substrate to activate the doped impurities. Otherwise, the catalyst element can be incorporated into the structure by introducing it into the impurity region by means of ion implantation and the like.
    Type: Grant
    Filed: November 2, 1999
    Date of Patent: July 17, 2001
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hongyong Zhang, Toru Takayama, Yasuhiko Takemura
  • Publication number: 20010007357
    Abstract: A method of manufacturing a semiconductor device comprises the steps of forming a first insulating film on a semiconductor layer, forming a gate electrode on the insulating film, pattering the first insulating film into a second insulating film so that a portion of the semiconductor layer is exposed while the second insulating film has extensions which extend beyond the side edges of the gate electrode, and performing ion introduction for forming impurity regions using the gate electrode and extensions of the gate insulating film as a mask. The condition of the ion introduction is varied in order to control the regions of the semiconductor layer to be added with the impurity and the concentration of the impurity therein.
    Type: Application
    Filed: January 26, 2001
    Publication date: July 12, 2001
    Inventors: Hongyong Zhang, Naoaki Yamaguchi, Yasuhiko Takemura
  • Patent number: 6259120
    Abstract: In a thin film transistor (TFT), a mask is formed on a gate electrode, and a porous anodic oxide is formed in both sides of the gate electrode using a relatively low voltage. A barrier anodic oxide is formed between the gate electrode and the porous anodic oxide and on the gate electrode using a relatively high voltage. A gate insulating film is etched using the barrier anodic oxide as a mask. The porous anodic oxide is selectively etched after etching barrier anodic oxide, to obtain a region of an active layer on which the gate insulating film is formed and the other region of the active layer on which the gate insulating film is not formed. An element including at least one of oxygen, nitrogen and carbon is introduced into the region of the active layer at high concentration in comparison with a concentration of the other region of the active layer. Further, N- or P-type impurity is introduced into the active layer.
    Type: Grant
    Filed: January 4, 1999
    Date of Patent: July 10, 2001
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hongyong Zhang, Hideto Ohnuma, Naoaki Yamaguchi, Yasuhiko Takemura
  • Patent number: 6259117
    Abstract: A structure for reducing the OFF current of an active matrix display. In the active matrix display, plural TFTs are connected in series with each one pixel electrode. Of these TFTs connected in series, at least one TFT excluding the TFTs located at opposite ends is maintained in conduction. Alternatively, at least one capacitor is connected between the junction of the drain and source of each TFT connected in series and an AC grounded point. Thus, the amount of electric charge released from auxiliary capacitors during cutoff of the TFTs is reduced.
    Type: Grant
    Filed: December 30, 1999
    Date of Patent: July 10, 2001
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yasuhiko Takemura, Toshiji Hamatani, Toshimitsu Konuma, Jun Koyama, Yuji Kawasaki, Hongyong Zhang, Shunpei Yamazaki
  • Patent number: 6255705
    Abstract: Disclosed is a small-sized, power-saving and high-performance semiconductor integrated circuit that comprises first and second transistors formed on a substrate, wherein the gate electrode in the first transistor is of crystalline silicon, and the gate electrode in the second transistor is of a combination of crystalline silicon and a substance having a higher electric conductivity than said crystalline silicon as provided on at least a part of said crystalline silicon. In the circuit, the gate electrode in the first transistor is required to be patterned in fine patterns, while that in the second transistor is required to have low electric resistance. Such different types of gate electrodes are formed on one and the same substrate in a simple process. The elements constituting the circuit all have high quality.
    Type: Grant
    Filed: September 22, 1998
    Date of Patent: July 3, 2001
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hongyong Zhang, Masayuki Sakakura, Futoshi Ishii