Patents by Inventor Hongyong Zhang

Hongyong Zhang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5990491
    Abstract: A channel forming region of a thin-film transistor is covered with an electrode and wiring line that extends from a source line. As a result, the channel forming region is prevented from being illuminated with light coming from above the thin-film transistor, whereby the characteristics of the thin-film transistor can be made stable.
    Type: Grant
    Filed: December 10, 1997
    Date of Patent: November 23, 1999
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Hongyong Zhang
  • Patent number: 5985701
    Abstract: A process reduced in mask steps for use in the fabrication of a thin film transistor having an LDD structure, comprising anodically oxidizing a gate electrode of a thin film transistor and performing ion implantation using the thus formed anodic oxide film as the mask. Also claimed is a similar process for fabricating a p-channel transistor and an n-channel transistor on a single substrate, comprising performing ion implantation of an impurity of the first conductive type to both of the transistor regions by using the anodic oxide film as a mask, and then performing ion implantation of an impurity of the second conductive type while masking one of the transistor regions with a resist.
    Type: Grant
    Filed: May 5, 1997
    Date of Patent: November 16, 1999
    Assignee: Semiconductor Energy Labaratory Co., Ltd.
    Inventors: Michiko Takei, Tatsuya Ohori, Hongyong Zhang, Hideki Uochi
  • Patent number: 5985741
    Abstract: A method for improving the reliability and yield of a thin film transistor by controlling the crystallinity thereof. The method comprises the steps of forming a gate electrode on an island amorphous silicon film, injecting an impurity using the gate electrode as a mask, forming a coating film containing at least one of nickel, iron, cobalt, platinum and palladium so that it adheres to parts of the impurity regions, and annealing it at a temperature lower than the crystallization temperature of pure amorphous silicon to advance the crystallization starting therefrom and to crystallize the impurity regions and channel forming region.
    Type: Grant
    Filed: March 20, 1997
    Date of Patent: November 16, 1999
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yasuhiko Takemura, Hongyong Zhang
  • Patent number: 5982460
    Abstract: An auxiliary capacitor for a pixel of an active matrix type liquid crystal display is provided without decreasing the aperture ratio. A transparent conductive film for a common electrode is formed under a pixel electrode constituted by a transparent conductive film with an insulation film provided therebetween. Further, the transparent conductive film for the common electrode is maintained at fixed potential, formed so as to cover a gate bus line and a source bus line, and configured such that signals on each bus line are not applied to the pixel electrode. The pixel electrode is disposed so that all edges thereof overlap the gate bus line and source bus line. As a result, each of the bus lines serves as a black matrix. Further, the pixel electrode overlaps the transparent conductive film for the common electrode to form a storage capacitor.
    Type: Grant
    Filed: June 24, 1997
    Date of Patent: November 9, 1999
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hongyong Zhang, Naoaki Yamaguchi, Yasuhiko Takemura
  • Patent number: 5977559
    Abstract: A thin-film transistor (TFT) which has a crystalline silicon active layer of excellent reliability and characteristics, and a method of fabricating such a TFT inexpensively are provided. In a TFT which has at least two low density impurity regions and a source/drain adjacent to a channel-forming region, catalyst elements which cause amorphous silicon to crystallize are included in the source/drain, and the density of said catalyst elements in the interface between the channel-forming region and the low-density impurity regions is less than that in the source/drain.
    Type: Grant
    Filed: March 26, 1998
    Date of Patent: November 2, 1999
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hongyong Zhang, Toru Takayama, Yasuhiko Takemura
  • Patent number: 5972437
    Abstract: To promote the characteristic of an interface between a gate insulating film and a semiconductor and control the threshold voltage, in forming the insulating film, a surface on which the insulating film is to be formed is previously exposed to activated oxygen and thereafter, the insulating film is formed on the surface, or in steps of manufacturing a thin film transistor, the insulating film is formed with monosilane, dinitrogen monoxide and oxygen as raw materials.
    Type: Grant
    Filed: February 13, 1997
    Date of Patent: October 26, 1999
    Assignee: Semiconductor Energy Labortory Co., Ltd.
    Inventors: Tatsuya Ohori, Michiko Takei, Hongyong Zhang, Hiroshi Kuroki
  • Patent number: 5972742
    Abstract: An improved method of forming insulated gate field effect transistors is described. In accordance with the method, gate electrodes are formed from metal such as aluminum together with wirings electrically connecting the gate electrodes. The gate electrodes are anodic oxidized by dipping them as an anode in an electrolyte to form an oxide of the metal covering them. Since the connecting wirings are covered with a suitable organic film before the anodizing, no aluminum oxide is formed thereon so that it is easy to remove the connecting wiring by usual etching.
    Type: Grant
    Filed: June 30, 1997
    Date of Patent: October 26, 1999
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hongyong Zhang, Hideki Uochi, Hiroki Adachi, Itaru Koyama, Shunpei Yamazaki
  • Patent number: 5968383
    Abstract: An excimer laser annealing apparatus with an optical system. The optical system includes a cylindrical concave lens (A), a cylindrical convex lens (B), a fly-eye lens (C) made of a cylindrical lens array provided in a lateral direction and a fly eye lens (D) made of a cylindrical lens array provided in a vertical direction. The laser light is changed from an initial gaussian distribution to a rectangular distribution by virtue of the fly-eye lenses. The laser beam then passes through cylindrical convex lenses (E and F) and is reflected by a mirror (G) and is focused on the specimen by a cylindrical lens (H). The homogenous rectangular beam created has a longer width than the specimen so that the specimen may only be moved along one direction.
    Type: Grant
    Filed: October 23, 1997
    Date of Patent: October 19, 1999
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hongyong Zhang, Hiroaki Ishihara
  • Patent number: 5966193
    Abstract: This invention is characterized by providing light shield patterning on a TFT substrate for an active matrix type liquid crystal display device. A liquid crystal display device comprising an active matrix circuit using a TFT having a top gate-type structure. The light-shield film are formed under a semiconductor layer and superposed at least one of the source bus line and the gate bus line. A capacitance is formed by the light-shield film and at least a part of the semiconductor layer with an insulating layer interposed therebetween.
    Type: Grant
    Filed: July 11, 1997
    Date of Patent: October 12, 1999
    Assignees: Semiconductor Energy Laboratory Co., Ltd., Sharp Kabushiki Kaisha
    Inventors: Hongyong Zhang, Akira Takenouchi, Tadayoshi Miyamoto, Atsushi Yoshinouchi
  • Patent number: 5962870
    Abstract: An LDD structure is manufactured to have a desired aspect ratio of the height to the width of a gate electrode. The gate electrode is first deposited on a semiconductor substrate followed by ion implantation with the gate electrode as a mask to form a pair of impurity regions. The gate electrode is then anodic oxidized to form an oxide film enclosing the electrode. With the oxide film as a mask, highly doped regions are formed by ion implantation in order to define lightly doped regions between the highly doped regions and the channel region located therebetween.
    Type: Grant
    Filed: June 6, 1995
    Date of Patent: October 5, 1999
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yasuhiko Takemura, Hongyong Zhang
  • Patent number: 5962897
    Abstract: A thin film transistor device incorporates a silicide film contacting the source and drain. The silicide layer substantially reduces parasitic resistance between the source and drain of the device, improving the performance of the TFT. The silicide layer may be formed by covering the silicon semiconductor with a metal and irradiating the metal with a laser to initiate a reaction with the adjacent silicon to produce a silicide film. The layer may also be formed by rigidly adhering a metal coating to the exposed source and drain regions using a triangular-shaped insulator, and allowing the metal to react with silicon.
    Type: Grant
    Filed: June 30, 1997
    Date of Patent: October 5, 1999
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yasuhiko Takemura, Hongyong Zhang, Satoshi Teramoto
  • Patent number: 5962872
    Abstract: In a thin film transistor (TFT), a mask is formed on a gate electrode, and a porous anodic oxide is formed in both sides of the gate electrode using a relatively low voltage. A barrier anodic oxide is formed between the gate electrode and the porous anodic oxide and on the gate electrode using a relatively high voltage. A gate insulating film is etched using the barrier anodic oxide as a mask. The porous anodic oxide is selectively etched after etching barrier anodic oxide, to obtain a region of an active layer on which the gate insulating film is formed and the other region of the active layer on which the gate insulating film is not formed. An element including at least one of oxygen, nitrogen and carbon is introduced into the region of the active layer at high concentration in comparison with a concentration of the other region of the active layer. Further, N- or P-type impurity is introduced into the active layer.
    Type: Grant
    Filed: August 7, 1997
    Date of Patent: October 5, 1999
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hongyong Zhang, Hideto Ohnuma, Naoaki Yamaguchi, Yasuhiko Takemura
  • Patent number: 5962871
    Abstract: A silicon film provided on a blocking film 102 on a substrate 101 is made amorphous by doping Si+, and in a heat-annealing process, crystallization is started in parallel to a substrate from an area 100 where nickel serving as a crystallization-promoting catalyst is introduced.
    Type: Grant
    Filed: November 5, 1996
    Date of Patent: October 5, 1999
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hongyong Zhang, Toru Takayama, Yasuhiko Takemura
  • Patent number: 5962869
    Abstract: A semiconductor material and a method for forming the same, said semiconductor material having produced by a process comprising melting a noncrystal semiconductor film containing therein carbon, nitrogen, and oxygen each at a concentration of 5.times.10.sup.19 atoms.multidot.cm.sup.-3 or lower, preferably 1.times.10.sup.19 atoms.multidot.cm.sup.-3 or lower, by irradiating a laser beam or a high intensity light equivalent to a laser beam to said noncrystal semiconductor film, and then recrystallizing the thus molten amorphous silicon film. The present invention provides thin film semiconductors having high mobility at an excellent reproducibility, said semiconductor materials being useful for fabricating thin film semiconductor devices such as thin film transistors improved in device characteristics.
    Type: Grant
    Filed: January 21, 1994
    Date of Patent: October 5, 1999
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hongyong Zhang, Naoto Kusumoto, Yasuhiko Takemura
  • Patent number: 5956009
    Abstract: There is disclosed an active matrix liquid crystal display that suppresses formation of a stripe pattern on the displayed image. An active matrix circuit, a peripheral drive circuit, and A image data signal lines for supplying image data signals are all integrated on a common substrate. The liquid crystal display includes a sampling circuit to which sampling circuit input lines are connected. These sampling circuit input lines are in contact with the image data signal lines and include dummy conducting lines extending to a buffer circuit. These dummy lines average out impedances of the individual image data signal lines, thus making uniform the amounts of image data signals lost from the image data signal lines. Thus, the formation of the stripe pattern is suppressed.
    Type: Grant
    Filed: May 30, 1997
    Date of Patent: September 21, 1999
    Assignee: Semiconductor Energy Laboratory Co.
    Inventors: Hongyong Zhang, Kenji Otsuka, Satoshi Teramoto
  • Patent number: 5956579
    Abstract: Method of fabricating semiconductor devices such as thin-film transistors by annealing a substantially amorphous silicon film at a temperature either lower than normal crystallization temperature of amorphous silicon or lower than the glass transition point of the substrate so as to crystallize the silicon film. Islands, stripes, lines, or dots of nickel, iron, cobalt, or platinum, silicide, acetate, or nitrate of nickel, iron, cobalt, or platinum, film containing various salts, particles, or clusters containing at least one of nickel, iron, cobalt, and platinum are used as starting materials for crystallization. These materials are formed on or under the amorphous silicon film.
    Type: Grant
    Filed: July 15, 1997
    Date of Patent: September 21, 1999
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yasuhiko Takemura, Hongyong Zhang, Toru Takayama, Hideki Uochi
  • Patent number: 5949107
    Abstract: A semiconductor device having CMOS circuits formed on a glass substrate. The CMOS circuits are composed of TFTs. Lightly doped regions are formed only in the N-channel TFTs. When P-channel TFTs are formed, the conductivity type of the lightly doped regions is converted by a boron ion implant. Each CMOS circuit consists of an N-channel TFT having the lightly doped regions and a P-channel TFT having no lightly doped regions.
    Type: Grant
    Filed: November 5, 1996
    Date of Patent: September 7, 1999
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Hongyong Zhang
  • Patent number: 5946561
    Abstract: Thin-film semiconductor devices such as TFTs (thin-film transistors) and methods of fabricating the same. TFTs are formed on an insulating substrate. First, a substantially amorphous semiconductor coating is formed on the substrate. A protective coating transparent to laser radiation is formed on the semiconductor coating. The laminate is irradiated with laser radiation to improve the crystallinity of the semiconductor coating. Then, the protective coating is removed to expose the surface of the semiconductor coating. A coating for forming a gate-insulating film is formed. Subsequently, gate electrodes are formed. Another method relates to fabrication of semiconductor devices such as TFTs on an insulating substrate. After forming a first coating consisting mainly of aluminum nitride, a second coating consisting principally of silicon oxide is formed. Semiconductor devices such as TFTs or semiconductor circuits are built on the second coating serving as a base layer.
    Type: Grant
    Filed: November 29, 1996
    Date of Patent: August 31, 1999
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hongyong Zhang, Yasuhiko Takemura
  • Patent number: 5946585
    Abstract: There is disclosed a method of fabricating a semiconductor device having excellent characteristics. The device comprises a substrate having an insulating surface. A hydrogen-rich region is formed inside the substrate by ion doping. Thermal processing is performed at 300 to 450.degree. C. to thermally diffuse hydrogen ions. Thus, dangling bonds and defect levels in an active layer are compensated. Since the hydrogenation from inside the semiconductor device is enabled in this way, hydrogen termination can be performed at a high efficiency.
    Type: Grant
    Filed: January 27, 1997
    Date of Patent: August 31, 1999
    Assignee: Semiconductor Energy Laboratory Co.,
    Inventors: Hongyong Zhang, Takeshi Fukunaga
  • Patent number: RE36314
    Abstract: An IGFET has differential crystallinity in offset regions near the source-channel and drain-channel boundaries. In one embodiment, an offset region with crystallinity different from that of an adjacent region is provided between the channel and at least one of the source and drain regions. An oxide film may be provided to cover the surface of the gate electrode, formed by anodizing the surface of the gate electrode, and this layer may be used as a mask when forming the crystallinity offset regions.
    Type: Grant
    Filed: June 4, 1996
    Date of Patent: September 28, 1999
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hongyong Zhang, Yasuhiko Takemura