Abstract: A method to linearize the characteristic of a Class-D amplifier is achieved, by compensating for the pulse-area-error, caused by a non-constant power-supply and similar circuit inconsistencies. A Class-D Amplifier typically converts the PDM (Pulse Density Modulated) input signal with a Sigma Delta Modulator and typically uses an H-Bridge as the Class-D power output stage. A fundamental idea is to keep the time-voltage area of every pulse constant. To achieve this, the circuit integrates the power supply voltage, starting with the PDM input pulse and stopping, when the defined time-voltage reference is reached. To compensate not only for power supply variations, but also for e.g. the voltage drop across the output devices, the integrator's input would be more directly referenced to the actual voltage across the output load.

Abstract: A method for compensating for the pulse area error of a Class-D power amplifier is achieved; especially it compensates the variations in the supply voltage and similar dependencies. A Class-D Amplifier typically gets pulse coded digital input (PCM) and may comprise a Sigma Delta Modulator to generate the signals driving the power output stage, typically an H-Bridge. A fundamental idea of this invention is to measure the real area of the output pulses, where the area is defined as the pulse duration multiplied by the pulse voltage amplitude, and to compare it with the ideal nominal pulse area. The pulse area error is calculated and then subtracted from said amplifier's input data. Key element of this invention is the “Pulse Area Compensation Function”, which calculates said real pulse area (voltage amplitude multiplied by time), compares said real pulse area with said ideal pulse area and feeds the difference into the input of said Sigma Delta Modulator.

Abstract: A battery protection circuit for use between a battery output and a load is achieved. The circuit comprises, first, a plurality of fused cells coupled in parallel between the battery output and the load. Each fused cell comprises, first, a fuse having first and second terminals where the first terminal is coupled to a battery output. Second, a means having zener effect has a p terminal and an n terminal. The p terminal is coupled to the second terminal of the fuse. Finally, a cell switch having first and second terminals completes each fused cell. The cell switch first terminal is coupled to the second terminal of the fuse, and the cell switch second terminal is coupled to the n terminal of the diode to form a cell output. Finally, the battery protection circuit comprises a shorting switch, that may comprise a MOS transistor that exhibits punch through, that is coupled between the load and each fused cell output. The current source second terminal is coupled to ground.

Abstract: A new current reference circuit is achieved. This current reference circuit is based on MOS transistors but does not depend upon the threshold voltage. The circuit comprises, first, a first MOS transistor having gate, drain, and source. A gate voltage value is coupled from the gate to the source. A second MOS transistor has gate, drain, and source. The second MOS transistor is of the same size and type as the first MOS transistor. The source is coupled to said first MOS transistor source. The gate voltage value plus a delta voltage value is coupled from the gate to the source. A means is provided for forcing a drain voltage value from the drain to the source of the first MOS transistor and from the drain to the source of the second MOS transistor. The first MOS transistor and the second MOS transistor conduct drain currents in the linear mode.

Abstract: A new current reference circuit is achieved. This current reference circuit is based on MOS transistors but does not depend upon the threshold voltage. The circuit comprises, first, a first MOS transistor having gate, drain, and source. A gate voltage value is coupled from the gate to the source. A second MOS transistor has gate, drain, and source. The second MOS transistor is of the same size and type as the first MOS transistor. The source is coupled to said first MOS transistor source. The gate voltage value plus a delta voltage value is coupled from the gate to the source. A means is provided for forcing a drain voltage value from the drain to the source of the first MOS transistor and from the drain to the source of the second MOS transistor. The first MOS transistor and the second MOS transistor conduct drain currents in the linear mode.

Abstract: An energy control circuit for a class D amplifier is achieved. The energy control circuit comprises, first, a means of generating an energy accumulation signal proportional to an output drive signal of the class D amplifier. Last, a means of receiving the energy accumulation signal and of interrupting the output drive signal when the energy accumulation signal exceeds a reference level. Single-ended and H-bridge amplifiers are achieved.

Abstract: A regulated voltage supply circuit having improved power supply rejection ratio is achieved. The circuit comprises, first, a voltage follower having an input, an output, and a power supply voltage. The input is coupled to a reference voltage. The output comprises the regulated voltage supply. Second, a means of compensating noise on the power supply voltage comprises phase shifting the power supply voltage 180 degrees and feeding back the phase shifted power supply voltage to the voltage follower input to thereby improve power supply rejection ratio. The means of compensating noise may comprise an adjustable gain. This adjustable gain may further comprise an adjustable value resistance. The adjustable gain is used in a to optimize the PSRR by testing comprising modulating noise on the power supply voltage, measuring the noise on the regulated voltage supply, and adjusting the gain.

Abstract: A new current reference circuit is achieved. This current reference circuit is based on MOS transistors but does not depend upon the threshold voltage. The circuit comprises, first, a first MOS transistor having gate, drain, and source. A gate voltage value is coupled from the gate to the source. A second MOS transistor has gate, drain, and source. The second MOS transistor is of the same size and type as the first MOS transistor. The source is coupled to said first MOS transistor source. The gate voltage value plus a delta voltage value is coupled from the gate to the source. A means is provided for forcing a drain voltage value from the drain to the source of the first MOS transistor and from the drain to the source of the second MOS transistor. The first MOS transistor and the second MOS transistor conduct drain currents in the linear mode.

Abstract: A battery protection circuit for use between a battery output and a load is achieved. The circuit comprises, first, a plurality of fused cells coupled in parallel between the battery output and the load. Each fused cell comprises, first, a fuse having first and second terminals where the first terminal is coupled to a battery output. Second, a means having zener effect has a p terminal and an n terminal. The p terminal is coupled to the second terminal of the fuse. Finally, a cell switch having first and second terminals completes each fused cell. The cell switch first terminal is coupled to the second terminal of the fuse, and the cell switch second terminal is coupled to the n terminal of the diode to form a cell output. Finally, the battery protection circuit comprises a shorting switch, that may comprise a MOS transistor that exhibits punch through, that is coupled between the load and each fused cell output. The current source second terminal is coupled to ground.

Abstract: A regulated voltage supply circuit having improved power supply rejection ratio is achieved. The circuit comprises, first, a voltage follower having an input, an output, and a power supply voltage. The input is coupled to a reference voltage. The output comprises the regulated voltage supply. Second, a means of compensating noise on the power supply voltage comprises phase shifting the power supply voltage 180 degrees and feeding back the phase shifted power supply voltage to the voltage follower input to thereby improve power supply rejection ratio. The means of compensating noise may comprise an adjustable gain. This adjustable gain may further comprise an adjustable value resistance. The adjustable gain is used in a to optimize the PSRR by testing comprising modulating noise on the power supply voltage, measuring the noise on the regulated voltage supply, and adjusting the gain.

Abstract: A new current reference circuit is achieved. This current reference circuit is based on MOS transistors but does not depend upon the threshold voltage. The circuit comprises, first, a first MOS transistor having gate, drain, and source. A gate voltage value is coupled from the gate to the source. A second MOS transistor has gate, drain, and source. The second MOS transistor is of the same size and type as the first MOS transistor. The source is coupled to said first MOS transistor source. The gate voltage value plus a delta voltage value is coupled from the gate to the source. A means is provided for forcing a drain voltage value from the drain to the source of the first MOS transistor and from the drain to the source of the second MOS transistor. The first MOS transistor and the second MOS transistor conduct drain currents in the linear mode.

Abstract: A new current sense circuit is achieved. The circuit comprises, first, an output transistor having gate, source, and drain. The drain is coupled to a load, the source is coupled to a power rail, the gate is coupled to a control voltage such that the output transistor conducts an output current. Second, a sense transistor has gate, source, and drain. The source is coupled to the power rail and the gate is coupled to the control voltage. A sensing factor comprises the output transistor size divided by the sense transistor size. Third, a means of equalizing the sense transistor drain-to-source voltage and the output transistor drain-to-source voltage is used such that the sense transistor drain current comprises the output current divided by the sensing factor. Finally, a current controlled oscillator is included. The current controlled oscillator has input and output. The input comprises the sense transistor drain current.

Abstract: A new current sense circuit has been achieved. The current sense circuit comprises, first, a first MOS transistor having a gate, a drain, and a source. The gate is coupled to a control signal. The drain is coupled to a load such that a load current flows through the first MOS transistor when the control signal is ON. A second MOS transistor has a gate, a drain, and a source. The gate is coupled to the control signal. The drain is coupled to a constant current source such that the constant current flows through the second MOS transistor when the control signal is ON. The source is coupled to the source of the first MOS transistor. The first and second MOS transistors are operating in the linear region when the control signal is ON. Finally, a means to compare the first MOS transistor drain voltage and the second MOS transistor drain voltage is provided.