Patents by Inventor Hou-Yuan Lin

Hou-Yuan Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11361698
    Abstract: An electronic device includes: a display panel and a host. The host is electrically connected to the display panel, and includes a processing unit and a graphics processing unit. The processing unit executes a driver program of the graphics processing unit and a specific program to render a display image of the specific program, wherein the display image includes a user interface. The processing unit obtains position information about a static area of the user interface. In response to the processing unit obtaining the position information about the static area of the user interface, the graphics processing unit performs a burn-in-prevention process on the static area via the driver program to generate an output image, and transmits the output image to the display panel for displaying.
    Type: Grant
    Filed: September 29, 2020
    Date of Patent: June 14, 2022
    Assignee: GIGA-BYTE TECHNOLOGY CO., LTD.
    Inventors: Hou-Yuan Lin, Ching-Hung Chao, Po-Chang Tseng, Hung-Yen Chen
  • Patent number: 11126247
    Abstract: A method for updating a power mode parameter combination, includes identifying a current hardware combination of a client host; loading and executing a current application program; loading a default profile according to the current application program to update a current power mode parameter combination of the current hardware combination; receiving a user-defined parameter combination to update the current power mode parameter combination of the current hardware combination; correlating the current application program, the current hardware combination and the updated current power mode parameter combination to generate a current profile as an updated default profile; and transmitting the current profile to a server as a candidate profile.
    Type: Grant
    Filed: September 4, 2019
    Date of Patent: September 21, 2021
    Assignee: GIGA-BYTE TECHNOLOGY CO., LTD.
    Inventors: Ching-Hung Chao, Hou-Yuan Lin, Mou-Ming Ma, Chun-Kun Lan, Po-Chang Tseng, Hung-Yen Chen, Chun-Yu Wang, Yih-Neng Lin
  • Publication number: 20210201742
    Abstract: An electronic device is provided. The electronic device includes: a display panel and a host. The host is electrically connected to the display panel, and includes a processing unit and a graphics processing unit. The processing unit executes a driver program of the graphics processing unit and a specific program to render a display image of the specific program, wherein the display image includes a user interface. The processing unit obtains position information about a static area of the user interface. In response to the processing unit obtaining the position information about the static area of the user interface, the graphics processing unit performs a burn-in-prevention process on the static area via the driver program to generate an output image, and transmits the output image to the display panel for displaying.
    Type: Application
    Filed: September 29, 2020
    Publication date: July 1, 2021
    Applicant: GIGA-BYTE TECHNOLOGY CO.,LTD.
    Inventors: Hou-Yuan LIN, Ching-Hung CHAO, Po-Chang TSENG, Hung-Yen CHEN
  • Patent number: 10922261
    Abstract: A memory clock frequency adjusting method suitable for a computer device is provided. The computer device includes a basic input output system (BIOS) and a memory. The memory clock frequency adjusting method includes following steps. A boot process of the computer device is executed, and the memory is operated at a memory clock frequency set by the BIOS. Whether the computer device is successfully booted is determined by the BIOS to decide whether the boot process of the computer device is to be re-executed. A setting of the memory clock frequency is adjusted by the BIOS when the computer device re-executes the boot process to lower the memory clock frequency, so that the memory is operated at the lowered memory clock frequency. In addition, a mainboard and a computer operating system applying the memory clock frequency adjusting method are also provided.
    Type: Grant
    Filed: April 10, 2017
    Date of Patent: February 16, 2021
    Assignee: GIGA-BYTE TECHNOLOGY CO., LTD.
    Inventors: Cho-May Chen, Hou-Yuan Lin, Sheng-Liang Kao
  • Publication number: 20200209939
    Abstract: A method for updating a power mode parameter combination, includes identifying a current hardware combination of a client host; loading and executing a current application program; loading a default profile according to the current application program to update a current power mode parameter combination of the current hardware combination; receiving a user-defined parameter combination to update the current power mode parameter combination of the current hardware combination; correlating the current application program, the current hardware combination and the updated current power mode parameter combination to generate a current profile as an updated default profile; and transmitting the current profile to a server as a candidate profile.
    Type: Application
    Filed: September 4, 2019
    Publication date: July 2, 2020
    Inventors: Ching-Hung Chao, Hou-Yuan Lin, Mou-Ming Ma, Chun-Kun Lan, Po-Chang Tseng, Hung-Yen Chen, Chun-Yu Wang, Yih-Neng Lin
  • Patent number: 10235259
    Abstract: A memory overclocking method adapted for a computer device is provided. The computer device includes a basic input output system and a memory. The memory overclocking method includes the following steps. A boot loader of the computer device is executed, and an overclocking module is executed by the basic input output system, wherein a first memory clock frequency for overclocking is preset in a serial presence detect of a memory. A second memory clock frequency by the overclocking module is generated by the overclocking module, wherein the second memory clock frequency is higher than the first memory clock frequency. Whether the second memory clock frequency meets a boot condition of the computer device is determined to decide whether to operate the memory at the second memory clock frequency. In addition, a computer device applying the memory overclocking method is also provided.
    Type: Grant
    Filed: April 7, 2017
    Date of Patent: March 19, 2019
    Assignee: GIGA-BYTE TECHNOLOGY CO., LTD.
    Inventors: Cho-May Chen, Hou-Yuan Lin, Sheng-Liang Kao
  • Publication number: 20180188769
    Abstract: A memory overclocking method adapted for a computer device is provided. The computer device includes a basic input output system and a memory. The memory overclocking method includes the following steps. A boot loader of the computer device is executed, and an overclocking module is executed by the basic input output system, wherein a first memory clock frequency for overclocking is preset in a serial presence detect of a memory. A second memory clock frequency by the overclocking module is generated by the overclocking module, wherein the second memory clock frequency is higher than the first memory clock frequency. Whether the second memory clock frequency meets a boot condition of the computer device is determined to decide whether to operate the memory at the second memory clock frequency. In addition, a computer device applying the memory overclocking method is also provided.
    Type: Application
    Filed: April 7, 2017
    Publication date: July 5, 2018
    Applicant: GIGA-BYTE TECHNOLOGY CO.,LTD.
    Inventors: Cho-May Chen, Hou-Yuan Lin, Sheng-Liang Kao
  • Publication number: 20180188770
    Abstract: A memory clock frequency adjusting method suitable for a computer device is provided. The computer device includes a basic input output system (BIOS) and a memory. The memory clock frequency adjusting method includes following steps. A boot process of the computer device is executed, and the memory is operated at a memory clock frequency set by the BIOS. Whether the computer device is successfully booted is determined by the BIOS to decide whether the boot process of the computer device is to be re-executed. A setting of the memory clock frequency is adjusted by the BIOS when the computer device re-executes the boot process to lower the memory clock frequency, so that the memory is operated at the lowered memory clock frequency. In addition, a mainboard and a computer operating system applying the memory clock frequency adjusting method are also provided.
    Type: Application
    Filed: April 10, 2017
    Publication date: July 5, 2018
    Applicant: GIGA-BYTE TECHNOLOGY CO.,LTD.
    Inventors: Cho-May Chen, Hou-Yuan Lin, Sheng-Liang Kao
  • Patent number: 9703347
    Abstract: A motherboard with backup power providing an output voltage to at least one computer information apparatus and including a first power connection unit and an Uninterruptible Power Supply (UPS) is provided. The first power connection unit is configured to receive DC power. The DC power is provided by a power supply. The UPS provides the output voltage and detects the DC power. When the DC power is stable, the UPS provides the DC power as the output voltage. When the DC power is unstable, the UPS provides battery power as the output voltage.
    Type: Grant
    Filed: July 6, 2015
    Date of Patent: July 11, 2017
    Assignee: Giga-Byte Technology Co., Ltd.
    Inventors: Hou-Yuan Lin, Tse-Hsine Liao, Hung-Cheng Chen
  • Patent number: 9529581
    Abstract: A circuit for writing program codes of a basic input/output system (BIOS) is connected to a main circuit and a BIOS. The BIOS stores a BIOS program code and has a BIOS identifier. The circuit includes a data source connection interface, a judgment trigger module and a write module. The data source connection interface stores an available BIOS program code matching with the BIOS. The judgment trigger module judges whether the BIOS is capable of, after a power-on initialization phase starts, completing loading the BIOS program code and performing system initialization in a preset time. If the BIOS is incapable of completing loading the BIOS program code and performing system initialization within the preset time, the judgment trigger module sends a trigger signal. After receiving the trigger signal, the write module downloads the available BIOS program codes according to the BIOS identifier, and writes to the BIOS, to overwrite the current data.
    Type: Grant
    Filed: April 9, 2015
    Date of Patent: December 27, 2016
    Assignee: GIGA-BYTE TECHNOLOGY CO., LTD.
    Inventors: Hou Yuan Lin, Tse Hsine Liao, Chih Wei Huang, Pi-Chiang Lin
  • Publication number: 20160274639
    Abstract: A motherboard with backup power providing an output voltage to at least one computer information apparatus and including a first power connection unit and an Uninterruptible Power Supply (UPS) is provided. The first power connection unit is configured to receive DC power. The DC power is provided by a power supply. The UPS provides the output voltage and detects the DC power. When the DC power is stable, the UPS provides the DC power as the output voltage. When the DC power is unstable, the UPS provides battery power as the output voltage.
    Type: Application
    Filed: July 6, 2015
    Publication date: September 22, 2016
    Inventors: HOU-YUAN LIN, TSE-HSINE LIAO, HUNG-CHENG CHEN
  • Patent number: 9256443
    Abstract: An electronic device having updatable BIOS is used to perform a BIOS updating method. The electronic device electrically connects to a server, in which update data is stored. The electronic device includes a Basic Input/Output System (BIOS), a network connection module and a switch. A BIOS program is stored in the BIOS, and a connecting program is stored in the network connection module for connecting to the server. When the electronic device is updating, the BIOS switches to electrically connect to the network connection module via the switch, and the network connection module connects to the server by executing the connecting program, downloads the update data applying to the BIOS, and overwrites the update data to the BIOS to update the BIOS program.
    Type: Grant
    Filed: February 21, 2013
    Date of Patent: February 9, 2016
    Assignee: GIGA-BYTE TECHNOLOGY CO., LTD.
    Inventors: Hou Yuan Lin, Wei Wen Tseng
  • Publication number: 20160026454
    Abstract: A circuit for writing program codes of a basic input/output system (BIOS) is connected to a main circuit and a BIOS. The BIOS stores a BIOS program code and has a BIOS identifier. The circuit includes a data source connection interface, a judgment trigger module and a write module. The data source connection interface stores an available BIOS program code matching with the BIOS. The judgment trigger module judges whether the BIOS is capable of, after a power-on initialization phase starts, completing loading the BIOS program code and performing system initialization in a preset time. If the BIOS is incapable of completing loading the BIOS program code and performing system initialization within the preset time, the judgment trigger module sends a trigger signal. After receiving the trigger signal, the write module downloads the available BIOS program codes according to the BIOS identifier, and writes to the BIOS, to overwrite the current data.
    Type: Application
    Filed: April 9, 2015
    Publication date: January 28, 2016
    Inventors: Hou Yuan Lin, Tse Hsine Liao, Chih Wei Huang, Pi-Chiang Lin
  • Publication number: 20140189337
    Abstract: An electronic device having updatable BIOS is used to perform a BIOS updating method. The electronic device electrically connects to a server, in which update data is stored. The electronic device includes a Basic Input/Output System (BIOS), a network connection module and a switch. A BIOS program is stored in the BIOS, and a connecting program is stored in the network connection module for connecting to the server. When the electronic device is updating, the BIOS switches to electrically connect to the network connection module via the switch, and the network connection module connects to the server by executing the connecting program, downloads the update data applying to the BIOS, and overwrites the update data to the BIOS to update the BIOS program.
    Type: Application
    Filed: February 21, 2013
    Publication date: July 3, 2014
    Applicant: GIGA-BYTE TECHNOLOGY CO., LTD.
    Inventors: Hou Yuan Lin, Wei Wen Tseng
  • Patent number: 8659863
    Abstract: A circuit protection device and a protection method thereof are provided. The circuit protection device includes a pulse width modulation unit which detects in order for a plurality of current phase of a plurality of transistors. The pulse width modulation unit decides the current phase of the transistors override a first threshold value whether. Then, the pulse width modulation unit sends a control signal to close the transistor that the current phase exceeds the first threshold value, so as to avoid the transistor burn down.
    Type: Grant
    Filed: December 18, 2011
    Date of Patent: February 25, 2014
    Assignee: Giga-Byte Technology Co., Ltd.
    Inventors: Hou Yuan Lin, Chen Shun Chen, Tse Hsine Liao, Kuei Min Chen
  • Patent number: 8526302
    Abstract: A motherboard includes at least one backup network circuit except for a network circuit used in a normal setup. The motherboard includes a first network circuit, a second network circuit, a network port, a switch circuit and a driver. The switch circuit is configured for coupling the first network circuit or the second network circuit to the network port. The driver is configured for switching the switch circuit according to states of the network port and the first network circuit.
    Type: Grant
    Filed: March 28, 2009
    Date of Patent: September 3, 2013
    Assignee: Giga-Byte Technology Co., Ltd.
    Inventors: Hou-Yuan Lin, Chen-Shun Chen, Tse-Hsine Liao
  • Patent number: 8443180
    Abstract: A method for operation system startup includes steps of switching on hardware startup; determining whether there is a trigger signal; reading an initial parameter from a storage device, and loading the initial parameter into a startup program when there is no trigger signal, executing the startup program; and entering operational system.
    Type: Grant
    Filed: July 25, 2009
    Date of Patent: May 14, 2013
    Assignee: Giga-Byte Technology Co., Ltd.
    Inventors: Hou-Yuan Lin, Chen-Shun Chen
  • Publication number: 20130027826
    Abstract: A circuit protection device and a protection method thereof are provided. The circuit protection device includes a pulse width modulation unit which detects in order for a plurality of current phase of a plurality of transistors. The pulse width modulation unit decides the current phase of the transistors override a first threshold value whether. Then, the pulse width modulation unit sends a control signal to close the transistor that the current phase exceeds the first threshold value, so as to avoid the transistor burn down.
    Type: Application
    Filed: December 18, 2011
    Publication date: January 31, 2013
    Inventors: Hou Yuan Lin, Chen Shun Chen, Tse Hsine Liao, Kuei Min Chen
  • Publication number: 20130007362
    Abstract: A system is utilized for detecting a RAID which includes a detector and a processor which electrically connects with the detector. The detector detects read/write state of a plurality of storage units, and generates a signal according to the read/write state respectively. The processor receives the signal, and determines the read/write state corresponding to the signal. When the read/write state of a first storage unit of the storage units is determined abnormal and wherein the processor sends a control signal, so as to interrupt a RAID mode of the system. Then, data stored in the first storage unit moves to the rest of the storage units according to the control signal.
    Type: Application
    Filed: January 8, 2012
    Publication date: January 3, 2013
    Inventors: Hou Yuan Lin, Han Yu Kao, Chen Shun Chen
  • Publication number: 20120311195
    Abstract: A method for switching access mode of a hard drive is provided. The method includes the following steps: detecting and writing digitally current access mode as a current registry code of a system registration information by a processing unit, then overwriting the current registry code with a new registry code that corresponds to a new access mode other than the current access mode by the processing unit, and then reloading the system registration information by the processing unit, and then changing the current access mode to the new access mode correspondingly by a Basic Input/Output System (BIOS). In addition, a system executing the method and a computer-readable medium encoded with processing instructions for implementing the method are also provided.
    Type: Application
    Filed: May 30, 2012
    Publication date: December 6, 2012
    Inventors: Shih Pin Chang, Hou Yuan Lin