Patents by Inventor Howard Heck
Howard Heck has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230246888Abstract: Embodiments of the present disclosure may relate to a controller coupled to a re-driver, where the controller has one or more sensor ports to couple with sensor devices, with circuitry coupled with the sensor ports and a re-driver port to receive operational data from the sensor ports, and based on the received operational data identify an indication of a re-driver equalizer setting to be transmitted to the re-driver device. Embodiments are used to increase the stability of the re-driver and maintain link margins a crossed varied operational conditions of the re-driver. Other embodiments may be described and/or claimed.Type: ApplicationFiled: July 15, 2020Publication date: August 3, 2023Inventors: Yang Wu, Howard Heck, Jingbo Li, Tao Xu
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Publication number: 20220336986Abstract: Methods and apparatus relating to a gold finger design for differential edge cards are described. In one embodiment, a signal finger comprises a first portion to communicate electrical signals between a signal pin of a card connector and a card; and a second portion to provide a mechanical wiping surface for the signal pin. Other embodiments are also claimed and disclosed.Type: ApplicationFiled: June 30, 2022Publication date: October 20, 2022Applicant: Intel CorporationInventors: Xiang Li, Howard Heck, Jingbo Li
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Patent number: 11347580Abstract: Techniques for encoding data are described herein. The method includes receiving a block payload at a physical layer to be transmitted via a data bus. The method includes establishing a block header comprising an arrangement of bits, the block header defining two block header types, wherein a hamming distance between block header types is at least four.Type: GrantFiled: April 13, 2021Date of Patent: May 31, 2022Assignee: Intel CorporationInventors: Huimin Chen, Andrew Martwick, Howard Heck, Robert Dunstan, Dennis Bell, Abdul Ismail
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Patent number: 11276911Abstract: In accordance with embodiments disclosed herein, there is provided a high-density low-loss cable and connector assembly. A cable assembly includes a first cable connector, a bulk cable section, and a first cable transition section. The bulk cable section includes a first plurality of conductive wires of a first wire thickness. The first cable transition section includes a second plurality of conductive wires that has a first distal end connected to the bulk cable section and a second distal end connected to the first cable connector. Each of the second plurality of conductive wires transitions from the first wire thickness at the first distal end to a second wire thickness that is less than the first wire thickness at the second distal end. Each of the second plurality of conductive wires in the first distal end is connected to a corresponding conductive wire of the first plurality of conductive wires.Type: GrantFiled: October 18, 2018Date of Patent: March 15, 2022Assignee: Intel CorporationInventors: Jingbo Li, Kai Xiao, Howard Heck, Kai Wang
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Publication number: 20220070522Abstract: Embodiments relate to a controller subsystem that includes a virtual reality (VR) subsystem to: identify data received from a peripheral device as related to an audio/visual (A/V) function of the peripheral device; direct, based on the identification that the data is related to the A/V function of the peripheral device, the data to be stored in a memory subsystem of the controller subsystem; and facilitate transmission of an indication of a storage location of the data in the memory subsystem to a host system that is communicatively coupled with the controller subsystem. The controller subsystem further includes a graphics engine to: identify, in a message received from the host system based on the transmission of the indication of the storage location of the data, instructions related to rendering the data; and generate, based on the data received from the peripheral device, rendered data. Other embodiments may be described and claimed.Type: ApplicationFiled: November 10, 2021Publication date: March 3, 2022Inventors: Lakshminarayana Pappu, Nausheen Ansari, Howard Heck, Amit Kumar Srivastava
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Publication number: 20220014304Abstract: In one embodiment, an apparatus includes: a transmitter to receive application-specific data and protocol information and to send the application-specific data and the protocol information to a destination circuit via a link; and a protocol engine coupled to the transmitter, where the protocol engine is to cause the transmitter to send the application-specific data according to a first bit error rate (BER) and send the protocol information according to a second BER, the first BER greater than the second BER. Other embodiments are described and claimed.Type: ApplicationFiled: September 23, 2021Publication date: January 13, 2022Inventors: Howard Heck, Huimin Chen, Marko Balogh
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Publication number: 20210232454Abstract: Techniques for encoding data are described herein. The method includes receiving a block payload at a physical layer to be transmitted via a data bus. The method includes establishing a block header comprising an arrangement of bits, the block header defining two block header types, wherein a hamming distance between block header types is at least four.Type: ApplicationFiled: April 13, 2021Publication date: July 29, 2021Inventors: Huimin Chen, Andrew Martwick, Howard Heck, Robert Dunstan, Dennis Bell, Abdul Ismail
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Patent number: 10997016Abstract: Techniques for encoding data are described herein. The method includes receiving a block payload at a physical layer to be transmitted via a data bus. The method includes establishing a block header comprising an arrangement of bits, the block header defining two block header types, wherein a hamming distance between block header types is at least four.Type: GrantFiled: July 9, 2019Date of Patent: May 4, 2021Assignee: INTEL CORPORATIONInventors: Huimin Chen, Andrew Martwick, Howard Heck, Robert Dunstan, Dennis Bell, Abdul Ismail
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Publication number: 20200026599Abstract: Techniques for encoding data are described herein. The method includes receiving a block payload at a physical layer to be transmitted via a data bus. The method includes establishing a block header comprising an arrangement of bits, the block header defining two block header types, wherein a hamming distance between block header types is at least four.Type: ApplicationFiled: July 9, 2019Publication date: January 23, 2020Applicant: INTEL CORPORATIONInventors: Huimin Chen, Andrew Martwick, Howard Heck, Robert Dunstan, Dennis Bell, Abdul Ismail
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Patent number: 10372527Abstract: Techniques for encoding data are described herein. The method includes receiving a block payload at a physical layer to be transmitted via a data bus. The method includes establishing a block header comprising an arrangement of bits, the block header defining two block header types, wherein a hamming distance between block header types is at least four.Type: GrantFiled: July 15, 2013Date of Patent: August 6, 2019Assignee: Intel CorporationInventors: Huimin Chen, Andrew Martwick, Howard Heck, Robert Dunstan, Dennis Bell, Abdul Hawk Ismail
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Publication number: 20190051963Abstract: In accordance with embodiments disclosed herein, there is provided a high-density low-loss cable and connector assembly. A cable assembly includes a first cable connector, a bulk cable section, and a first cable transition section. The bulk cable section includes a first plurality of conductive wires of a first wire thickness. The first cable transition section includes a second plurality of conductive wires that has a first distal end connected to the bulk cable section and a second distal end connected to the first cable connector. Each of the second plurality of conductive wires transitions from the first wire thickness at the first distal end to a second wire thickness that is less than the first wire thickness at the second distal end. Each of the second plurality of conductive wires in the first distal end is connected to a corresponding conductive wire of the first plurality of conductive wires.Type: ApplicationFiled: October 18, 2018Publication date: February 14, 2019Inventors: Jingbo LI, Kai XIAO, Howard HECK, Kai WANG
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Patent number: 10108227Abstract: Various embodiments are generally directed to an apparatus, method and other techniques to provide a interface component including a housing comprising a first shell portion and a second shell portion, the first shell portion forming an extended portion for the housing and comprising a retention track engageable a counterpart retention track. The interface component to include a printed circuit board disposed within the housing, the printed circuit board comprising a plurality of contact pins each comprising a contact hole and a retention bump and a socket to couple with a stud.Type: GrantFiled: December 24, 2015Date of Patent: October 23, 2018Assignee: INTEL CORPORATIONInventors: Khang Choong Yong, Shu Young Cheah, Wil Choon Song, Jackson Chung Peng Kong, Howard Heck
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Publication number: 20170185102Abstract: Various embodiments are generally directed to an apparatus, method and other techniques to provide a interface component including a housing comprising a first shell portion and a second shell portion, the first shell portion forming an extended portion for the housing and comprising a retention track engageable a counterpart retention track. The interface component to include a printed circuit board disposed within the housing, the printed circuit board comprising a plurality of contact pins each comprising a contact hole and a retention bump and a socket to couple with a stud.Type: ApplicationFiled: December 24, 2015Publication date: June 29, 2017Inventors: Khang Choong Yong, Shu Young Cheah, Wil Choon Song, Jackson Chung Peng Kong, Howard Heck
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Patent number: 9391378Abstract: Methods and systems to support input output (IO) communications may include an IO connector having a housing with surfaces defining a paddle card region, and a set of compressible contacts extending vertically through the housing into the paddle card region. In addition, an IO interconnect can include a cable portion and at least one end portion coupled to the cable portion. The end portion may include a paddle card having a circuit board with a set of contacts disposed on a bottom surface of the circuit board. The end portion can also include an asymmetric metal shell having a configuration that encloses at least a portion of the paddle card and exposes the set of contacts.Type: GrantFiled: December 23, 2011Date of Patent: July 12, 2016Assignee: Intel CorporationInventors: Michael Leddige, Yun Ling, Kuan-Yu Chen, Kai Wang, Xiang Li, Howard Heck
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Patent number: 9223385Abstract: The present disclosure provides techniques for increasing the power efficiency of re-drivers by providing a technique for a re-driver to recognize a variety of power states. A message generator may be located in a host device and may encode a signal indicating a change in a power state. The message may be transmitted to a message decoder located in a re-driver. The message decoder may decode the message and the re-driver may enter a power state in response to the decoded message.Type: GrantFiled: December 19, 2012Date of Patent: December 29, 2015Assignee: Intel CorporationInventors: Huimin Chen, Howard Heck
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Patent number: 9215113Abstract: Techniques for training a link are described herein. An example electronic device includes a port coupled to a link partner. The port and the link partner use closed-loop equalizer training to obtain receiver equalization coefficients for the receiver of the port and obtain transmitter equalization coefficients for the transmitter of the link partner.Type: GrantFiled: September 19, 2014Date of Patent: December 15, 2015Assignee: Intel CorporationInventors: Huimin Chen, Howard Heck, Hsiao-Ping J. Tsai
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Publication number: 20150019921Abstract: Techniques for encoding data are described herein. The method includes receiving a block payload at a physical layer to be transmitted via a data bus. The method includes establishing a block header comprising an arrangement of bits, the block header defining two block header types, wherein a hamming distance between block header types is at least four.Type: ApplicationFiled: July 15, 2013Publication date: January 15, 2015Inventors: Huimin Chen, Andrew Martwick, Howard Heck, Robert Dunstan, Dennis Bell, Abdul Hawk Ismail
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Publication number: 20140377968Abstract: Methods and systems to support input output (IO) communications may include an IO connector having a housing with surfaces defining a paddle card region, and a set of compressible contacts extending vertically through the housing into the paddle card region. In addition, an IO interconnect can include a cable portion and at least one end portion coupled to the cable portion. The end portion may include a paddle card having a circuit board with a set of contacts disposed on a bottom surface of the circuit board. The end portion can also include an asymmetric metal shell having a configuration that encloses at least a portion of the paddle card and exposes the set of contacts.Type: ApplicationFiled: December 23, 2011Publication date: December 25, 2014Inventors: Michael Leddige, Yun Ling, Kuan-Yu Chen, Kai Wang, Xiang Li, Howard Heck
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Publication number: 20140173303Abstract: The present disclosure provides techniques for increasing the power efficiency of re-drivers by providing a technique for a re-driver to recognize a variety of power states. A message generator may be located in a host device and may encode a signal indicating a change in a power state. The message may be transmitted to a message decoder located in a re-driver. The message decoder may decode the message and the re-driver may enter a power state in response to the decoded message.Type: ApplicationFiled: December 19, 2012Publication date: June 19, 2014Inventors: Huimin Chen, Howard Heck
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Patent number: 8732942Abstract: In some embodiments a high speed interconnect includes a layer of FR4 material, a trench in the layer of FR4 material, and a pair of transmission lines located near the trench. The trench is filled with a homogenous material. Other embodiments are described and claimed.Type: GrantFiled: March 26, 2008Date of Patent: May 27, 2014Assignee: Intel CorporationInventors: Stephen H. Hall, Bryce D. Horine, Gary A. Brist, Howard Heck