Abstract: A method of heating-treating a semiconductor wafer is provided. In one embodiment, a first layer is formed over a first side of a substrate. A second layer is formed over the first layer and over a second side of the substrate and the wafer is then flash annealed. In another embodiment, a first layer is formed over a first side of a substrate and over a second side of the substrate. A second layer is formed over the first layers and the wafer is then flash annealed.

Abstract: Methods and systems for lithographically exposing a substrate based on a curvature profile of the substrate.

Abstract: A method of forming a resist pattern in a semiconductor device layer includes forming a buffer layer on a semiconductor device layer and forming a resist layer on the buffer layer. A decomposing agent is released into a portion of the buffer layer by a portion of the resist layer whereupon the portion of the buffer layer and the portion of the resist layer are removed to form a process window substantially free of resist residue that can be subsequently exploited for etching of the semiconductor device layer.

Abstract: A method of heating-treating a semiconductor wafer is provided. In one embodiment, a first layer is formed over a first side of a substrate. A second layer is formed over the first layer and over a second side of the substrate and the wafer is then flash annealed. In another embodiment, a first layer is formed over a first side of a substrate and over a second side of the substrate. A second layer is formed over the first layers and the wafer is then flash annealed.

Abstract: A method for photolithography in semiconductor manufacturing includes providing a substrate for a wafer and providing a mask for exposing the wafer. The wafer is exposed by utilizing a combination of high angle illumination and focus drift exposure methods.

Abstract: A method for semiconductor manufacturing includes forming an overlay target having a pattern formed by a first mask layer and an adjacent layer. The overlay target is exposed to radiation. As a result, reflective beams can be detected from the pattern and the adjacent layer and the location of the pattern can be identified based on the reflective beams.

Abstract: A method for photolithography in semiconductor manufacturing includes providing a mask with first and second focus planes for a wafer. The wafer includes corresponding first and second wafer regions. The first wafer region receives a first image during a first exposure utilizing the first focus plane. The second wafer region receives a second image during a second exposure utilizing the second focus plane.

Abstract: System and method for improving the process performance of a contact module. A preferred embodiment comprises improving the process performance of a contact module by reducing surface variations of an interlayer dielectric. The interlayer dielectric comprises a plurality of layers, a first layer (for example, a contact etch stop layer 610) protects devices on a substrate from subsequent etching operations, while a second layer (for example, a first dielectric layer 620) covers the first layer. A third layer (for example, a second dielectric layer 630) fills gaps that may be due to the topography of the devices. A fourth layer (for example, a third dielectric layer 640), brings the interlayer dielectric layer to a desired thickness and is formed using a process that yields a very flat surface completes the interlayer dielectric. Using multiple layers permit the elimination of variations (filling gaps and leveling bumps) without resorting to chemical-mechanical polishing.