Abstract: A pixel substrate and a fabrication method thereof are provided. The method includes: forming a gate and a lower pad on a substrate; forming a gate insulating layer overlaying the gate and the lower pad; forming a channel layer and a first electrode layer on the gate insulating layer, in which the projection areas of the channel layer and the gate on the substrate are overlapped; forming an etching-barrier material layer on the substrate and simultaneously forming a contact opening at the gate insulating layer to expose the lower pad; forming a source, a drain and an upper pad on the substrate; forming a protective layer; forming a second electrode layer with multiple slits on the protective layer, in which one of the first and second electrode layers is electrically connected to the drain. The invention can simplify the process steps and reduce fabrication time.

Abstract: A pixel structure of a liquid crystal display panel includes a first substrate; a color filter layer formed on the first substrate, the color filter layer comprising a plurality of filtering areas for filtering light, and a plurality of blocking areas for blocking light; a main spacer formed on one of the blocking areas; a sub spacer formed on another one of the blocking areas; a second substrate; a thin film transistor formed on the second substrate; an insulating layer formed above the thin film transistor and the second substrate; a liquid crystal layer formed between the first substrate and the second substrate; wherein a distance from an upper surface of the insulating layer near the main spacer to the second substrate is greater than a distance from an upper surface of the insulating layer near the sub spacer to the second substrate.

Abstract: A pixel substrate and a fabrication method thereof are provided. The method includes: forming a gate and a lower pad on a substrate; forming a gate insulating layer overlaying the gate and the lower pad; forming a channel layer and a first electrode layer on the gate insulating layer, in which the projection areas of the channel layer and the gate on the substrate are overlapped; forming an etching-barrier material layer on the substrate and simultaneously forming a contact opening at the gate insulating layer to expose the lower pad; forming a source, a drain and an upper pad on the substrate; forming a protective layer; forming a second electrode layer with multiple slits on the protective layer, in which one of the first and second electrode layers is electrically connected to the drain. The invention can simplify the process steps and reduce fabrication time.

Abstract: The pixel structure includes a scan line, a data line, a thin-film transistor, a first electrode layer, a protective layer and a second electrode layer. The thin-film transistor is electrically connected to the scan line and the data line, and includes a gate, an oxide semiconductor layer, an insulating layer, a source and a drain. The first electrode layer is in the same layer as the oxide semiconductor layer, and is surrounded by the scan line and the data line. The second electrode layer is located on the first electrode layer, and the protective layer is located between the first electrode layer and the second electrode layer, wherein one of the first and second electrode layers is electrically connected to the thin-film transistor, and the other is connected to a common voltage. The second electrode layer includes a plurality of slits exposing an area of the first electrode layer.

Abstract: The pixel structure includes a scan line, a data line, a thin-film transistor, a first electrode layer, a protective layer and a second electrode layer. The thin-film transistor is electrically connected to the scan line and the data line, and includes a gate, an oxide semiconductor layer, an insulating layer, a source and a drain. The first electrode layer is in the same layer as the oxide semiconductor layer, and is surrounded by the scan line and the data line. The second electrode layer is located on the first electrode layer, and the protective layer is located between the first electrode layer and the second electrode layer, wherein one of the first and second electrode layers is electrically connected to the thin-film transistor, and the other is connected to a common voltage. The second electrode layer includes a plurality of slits exposing an area of the first electrode layer.

Abstract: A transflective type liquid crystal display comprises a first substrate with a reflective region and a transmission region. A gate region, an insulation layer and a semiconductor layer are sequentially formed on the first substrate. The semiconductor layer has a source region, a drain region and a channel region. A first dielectric layer is disposed on the semiconductor layer and has a through hole to expose a part of the drain region. A first common electrode is disposed on the first dielectric layer and the through hole to cover the exposed part of the drain region. A reflective electrode is disposed on the first dielectric layer located in the reflective region. A second dielectric layer is disposed on the first common electrode and the reflective electrode. A pixel electrode is disposed on the second dielectric layer and connected to the drain region via the through hole.

Abstract: The present invention discloses a thin film transistor array substrate comprising a plurality of thin film transistors, with each one thereof including a gate electrode, a gate insulation layer, an amorphous-oxide semiconductor layer and a pair of a source electrode and a drain electrode. The amorphous-oxide semiconductor layer comprises an amorphous-oxide semiconductor material having a-IGZO. The thin film transistor array substrate further comprises a first insulation layer and a second insulation layer disposed on the thin film transistors. Since the a-IGZO semiconductor layer and the thick insulation layer covered thereon are used in the present invention, a common electrode can overlap the scan lines or data lines to increase the aperture ratio of the pixel structure. Furthermore, the thick insulation layer can be fabricated through a coating process, so as to keep the a-IGZO semiconductor layer from damages during the fabrication processes.

Abstract: A pixel array substrate includes a substrate, a plurality of thin-film transistors disposed on the substrate, a first insulating layer covering the thin-film transistors and the substrate, a common electrode disposed on the first insulating layer, a second insulating layer covering the first insulating layer and the common electrode, and a plurality of pixel electrodes disposed on the second insulating layer. Each thin-film transistor includes a drain electrode. The first insulating layer includes a plurality of first openings exposing the drain electrodes respectively. The second insulating layer includes a plurality of second openings exposing the first openings respectively. Each pixel electrode is electrically connected to each drain electrode respectively through each first opening and each second opening. The first insulating layer includes a thickness between 1 micron and 5 microns.

Abstract: A transflective type liquid crystal display comprises a first substrate with a reflective region and a transmission region. A gate region, an insulation layer and a semiconductor layer are sequentially formed on the first substrate. The semiconductor layer has a source region, a drain region and a channel region. A first dielectric layer is disposed on the semiconductor layer and has a through hole to expose a part of the drain region. A first common electrode is disposed on the first dielectric layer and the through hole to cover the exposed part of the drain region. A reflective electrode is disposed on the first dielectric layer located in the reflective region. A second dielectric layer is disposed on the first common electrode and the reflective electrode. A pixel electrode is disposed on the second dielectric layer and connected to the drain region via the through hole.

Abstract: A liquid crystal display panel includes a color filtering substrate and an array substrate. The color filtering substrate includes a plurality of first spacers and a plurality of second spacers. The array substrate includes a plurality of cavities disposed on a surface of the array substrate facing the color filtering substrate. The cavities are disposed corresponding to the second spacers. The first spacers are physically connected to the array substrate, and the second spacers are physically spaced apart from the array substrate.

Abstract: A pixel structure of a liquid crystal display panel includes a first substrate; a color filter layer formed on the first substrate, the color filter layer comprising a plurality of filtering areas for filtering light, and a plurality of blocking areas for blocking light; a main spacer formed on one of the blocking areas; a sub spacer formed on another one of the blocking areas; a second substrate; a thin film transistor formed on the second substrate; an insulating layer formed above the thin film transistor and the second substrate; a liquid crystal layer formed between the first substrate and the second substrate; wherein a distance from an upper surface of the insulating layer near the main spacer to the second substrate is greater than a distance from an upper surface of the insulating layer near the sub spacer to the second substrate.

Abstract: A TFT array substrate includes a substrate, at least one gate line and gate electrode, a gate insulating layer, and at least one channel component, source electrode, drain electrode and data line. The gate line and gate electrode are disposed on the substrate, wherein both of the gate line and gate electrode have first and second conductive layers, the first conductive layer is formed on the substrate, the first conductive layer contains molybdenum nitride , the second conductive layer is formed on the first conductive layer, and the second conductive layer contains copper. The gate insulating layer is disposed on the gate line, gate electrode and the substrate. The channel component is disposed on the gate insulating layer. The source electrode and drain electrode are disposed on the channel component, and data line is disposed on the gate insulating layer.

Abstract: A method for manufacturing a transflective liquid crystal display panel includes providing an array substrate having a plurality of pixel regions, each of the pixel regions includes a device region, a transmission region and a reflection region defined therein; forming a first metal layer on the array substrate; patterning the first metal layer to simultaneously form a gate electrode in the device region and a plurality of metal bumps in the reflection region; forming a first insulating layer having a rough surface and covering the gate electrode and the metal bumps on the array substrate; forming a patterned semiconductor layer on the gate electrode; forming a reflective layer covering the first insulating layer and having a rough surface in the reflection region; and sequentially forming a patterned second insulating layer and a transparent pixel electrode on the array substrate.

Abstract: A TFT array substrate includes a substrate, at least one gate line and gate electrode, a gate insulating layer, and at least one channel component, source electrode, drain electrode and data line. The gate line and gate electrode are disposed on the substrate, wherein both of the gate line and gate electrode have first and second conductive layers, the first conductive layer is formed on the substrate, the first conductive layer contains molybdenum nitride , the second conductive layer is formed on the first conductive layer, and the second conductive layer contains copper. The gate insulating layer is disposed on the gate line, gate electrode and the substrate. The channel component is disposed on the gate insulating layer. The source electrode and drain electrode are disposed on the channel component, and data line is disposed on the gate insulating layer.

Abstract: A photo element includes a photo thin film transistor (TFT), a switch thin film transistor, and a compensation thin film transistor. A bias line provides a bias voltage to the photo TFT. The photo TFT generates a photo-induced current under an illuminated environment. A first switch line provides a voltage to open the switch TFT, and thus the photo-induced current is read out through a readout line. A second switch line provides compensation current to open the compensation TFT. The compensation current applies a reverse-biased stress to the photo TFT; therefore the threshold voltage and sensitivity of the photo TFT can be maintained.

Abstract: A TFT array substrate includes a substrate, at least one gate line and gate electrode, a gate insulating layer, and at least one channel component, source electrode, drain electrode and data line. The gate line and gate electrode are disposed on the substrate, wherein both of the gate line and gate electrode have first and second conductive layers, the first conductive layer is formed on the substrate, the first conductive layer contains molybdenum nitride, the second conductive layer is formed on the first conductive layer, and the second conductive layer contains copper. The gate insulating layer is disposed on the gate line, gate electrode and the substrate. The channel component is disposed on the gate insulating layer. The source electrode and drain electrode are disposed on the channel component, and data line is disposed on the gate insulating layer.

Abstract: A method for manufacturing a transflective liquid crystal display panel includes providing an array substrate having a plurality of pixel regions, each of the pixel regions includes a device region, a transmission region and a reflection region defined therein; forming a first metal layer on the array substrate; patterning the first metal layer to simultaneously form a gate electrode in the device region and a plurality of metal bumps in the reflection region; forming a first insulating layer having a rough surface and covering the gate electrode and the metal bumps on the array substrate; forming a patterned semiconductor layer on the gate electrode; forming a reflective layer covering the first insulating layer and having a rough surface in the reflection region; and sequentially forming a patterned second insulating layer and a transparent pixel electrode on the array substrate.

Abstract: A photo element includes a photo thin film transistor (TFT), a switch thin film transistor, and a compensation thin film transistor. A bias line provides a bias voltage to the photo TFT. The photo TFT generates a photo-induced current under an illuminated environment. A first switch line provides a voltage to open the switch TFT, and thus the photo-induced current is read out through a readout line. A second switch line provides compensation current to open the compensation TFT. The compensation current applies a reverse-biased stress to the photo TFT; therefore the threshold voltage and sensitivity of the photo TFT can be maintained.

Abstract: A TFT array substrate includes a substrate, at least one gate line and gate electrode, a gate insulating layer, and at least one channel component, source electrode, drain electrode and data line. The gate line and gate electrode are disposed on the substrate, wherein both of the gate line and gate electrode have first and second conductive layers, the first conductive layer is formed on the substrate, the first conductive layer contains molybdenum nitride, the second conductive layer is formed on the first conductive layer, and the second conductive layer contains copper. The gate insulating layer is disposed on the gate line, gate electrode and the substrate. The channel component is disposed on the gate insulating layer. The source electrode and drain electrode are disposed on the channel component, and data line is disposed on the gate insulating layer.