Patents by Inventor Hsin-Hsiung Huang

Hsin-Hsiung Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11959318
    Abstract: An oven includes an oven body, a heating element, a frame, and an oven door. The oven body has an inner space inside and includes a front plate, wherein the front plate has an entrance that communicates with the inner space. The heating element is adapted to heat the inner space. The frame is engaged with the oven body and has an abutted portion. The oven door is pivotally connected to the oven body and is located at the entrance. The oven door can pivot to a closed position to close the entrance and can pivot downward to an open position from the closed position to open the entrance. When the oven door is located at the open position, the second surface abuts against the abutted portion of the frame, thereby forming a platform outside the entrance for placing objects.
    Type: Grant
    Filed: May 21, 2021
    Date of Patent: April 16, 2024
    Assignee: GRAND MATE CO., LTD.
    Inventors: Chung-Chin Huang, Chin-Ying Huang, Hsin-Ming Huang, Hsing-Hsiung Huang, Yen-Jen Yeh
  • Patent number: 10276747
    Abstract: A substrate wafer composed of a hexagonal single crystal material including a C crystalline plane, an A crystalline plane, and an M-axis direction includes a top surface is a C-axis plane; a first side connecting to the aforementioned top surface and being substantially a curve line viewing from the direction perpendicular to the aforementioned C crystalline plane and including a curvature center; and a second side connecting to the aforementioned first side; and wherein there is a line segment defined by a shortest distance between the aforementioned second side and the aforementioned curvature center, and the aforementioned line segment is not parallel with the aforementioned M-axis direction.
    Type: Grant
    Filed: April 20, 2017
    Date of Patent: April 30, 2019
    Assignee: EPISTAR CORPORATION
    Inventors: Kai Shen Chen, Hsin Hsiung Huang, Wan Jung Lee, Pei Chia Chen, Yung Hsin Tai
  • Patent number: 10243099
    Abstract: A semiconductor device comprises a substrate comprising a surface area having a plurality of patterns therein, wherein the plurality of patterns comprises a plurality of first patterns and a plurality of second patterns; and a light-emitting stack formed on the substrate; wherein each of the first patterns comprises a first feature length and each of the second patterns comprises a second feature length smaller than the first feature length, and wherein, in a square area of 30 microns by 30 microns chosen from the surface area, an amount of the plurality of the first patterns is more than that of the plurality of the second patterns.
    Type: Grant
    Filed: May 16, 2017
    Date of Patent: March 26, 2019
    Assignees: Epistar Corporation, Asahi Kasei Corporation
    Inventors: Jennhwa Fu, Hsin-Hsiung Huang, Mei-Li Wang
  • Publication number: 20180337304
    Abstract: A semiconductor device comprises a substrate comprising a surface area having a plurality of patterns therein, wherein the plurality of patterns comprises a plurality of first patterns and a plurality of second patterns; and a light-emitting stack formed on the substrate; wherein each of the first patterns comprises a first feature length and each of the second patterns comprises a second feature length smaller than the first feature length, and wherein, in a square area of 30 microns by 30 microns chosen from the surface area, an amount of the plurality of the first patterns is more than that of the plurality of the second patterns.
    Type: Application
    Filed: May 16, 2017
    Publication date: November 22, 2018
    Inventors: Jennhwa FU, Hsin-Hsiung HUANG, Mei-Li WANG
  • Publication number: 20170309783
    Abstract: A substrate wafer composed of a hexagonal single crystal material including a C crystalline plane, an A crystalline plane, and an M-axis direction includes a top surface is a C-axis plane; a first side connecting to the aforementioned top surface and being substantially a curve line viewing from the direction perpendicular to the aforementioned C crystalline plane and including a curvature center; and a second side connecting to the aforementioned first side; and wherein there is a line segment defined by a shortest distance between the aforementioned second side and the aforementioned curvature center, and the aforementioned line segment is not parallel with the aforementioned M-axis direction.
    Type: Application
    Filed: April 20, 2017
    Publication date: October 26, 2017
    Inventors: Kai Shen CHEN, Hsin Hsiung HUANG, Wan Jung LEE, Pei Chia CHEN, Yung Hsin TAI
  • Publication number: 20150311400
    Abstract: A light-emitting device comprises: a conductive substrate; a conductive structure formed on the substrate, defining a first region and a second region laterally adjacent to the first region; a light-emitting structure formed on the first region; and a dielectric structure comprising a first dielectric layer and a second dielectric layer within the second region.
    Type: Application
    Filed: July 7, 2015
    Publication date: October 29, 2015
    Inventors: Cheng-Hsien LI, Chi-Hao HUANG, Hsin-Hsiung HUANG
  • Patent number: 9076923
    Abstract: A method for manufacturing a light-emitting device comprising the steps of: providing a first substrate, a chip area, and a street area; forming a light-emitting structure on the first substrate; forming a conductive structure between the first substrate and the light-emitting structure; removing a part of the light-emitting structure in the street area to expose a sidewall of the light-emitting structure in the chip area; forming a first passivation layer on the light-emitting structure in the chip area; forming a second passivation layer on the conductive structure in the street area, on the sidewalls of the light-emitting structure, and on the sidewalls of the first passivation layer; forming a through-hole in the first passivation layer, and forming an electrode in the through-hole.
    Type: Grant
    Filed: February 13, 2012
    Date of Patent: July 7, 2015
    Assignee: EPISTAR CORPORATION
    Inventors: Cheng-Hsien Li, Chi-Hao Huang, Hsin-Hsiung Huang
  • Publication number: 20140206115
    Abstract: The present application provides a method of manufacturing an optoelectronic semiconductor device, comprising the steps of: providing a substrate; forming an optoelectronic system on the substrate; forming a barrier layer on the optoelectronic system; forming an electrode on the barrier layer; and annealing the optoelectronic semiconductor device; wherein the optoelectronic semiconductor device has a first forward voltage before the annealing step and has a second forward voltage after the annealing step, and a difference between the second forward voltage and the first forward voltage is smaller than 0.2 Volt.
    Type: Application
    Filed: March 19, 2014
    Publication date: July 24, 2014
    Applicant: EPISTAR CORPORATION
    Inventors: Tz Chiang YU, Jenn Hwa FU, Hsin Hsiung HUANG
  • Patent number: 8785219
    Abstract: The present application provides a method of manufacturing an optoelectronic semiconductor device, comprising the steps of: providing a substrate; forming an optoelectronic system on the substrate; forming a barrier layer on the optoelectronic system; forming an electrode on the barrier layer; and annealing the optoelectronic semiconductor device; wherein the optoelectronic semiconductor device has a first forward voltage before the annealing step and has a second forward voltage after the annealing step, and a difference between the second forward voltage and the first forward voltage is smaller than 0.2 Volt.
    Type: Grant
    Filed: March 19, 2014
    Date of Patent: July 22, 2014
    Assignee: Epistar Corporation
    Inventors: Tz Chiang Yu, Jenn Hwa Fu, Hsin Hsiung Huang
  • Patent number: 8716743
    Abstract: The present application provides an optoelectronic semiconductor device, comprising: a substrate; an optoelectronic system on the substrate; a barrier layer on the optoelectronic system, wherein the barrier layer thickness is not smaller than 10 angstroms; and an electrode on the barrier layer.
    Type: Grant
    Filed: January 23, 2013
    Date of Patent: May 6, 2014
    Assignee: Epistar Corporation
    Inventors: Tz-Chiang Yu, Jenn-Hwa Fu, Hsin-Hsiung Huang
  • Publication number: 20130210178
    Abstract: A light-emitting device and method for manufacturing the same are described. A method for manufacturing a light-emitting device comprising the steps of: providing a substrate; forming a light-emitting structure on the substrate, wherein the light-emitting structure comprising a plurality of chip areas and a plurality of street areas; forming a conductive structure between the substrate and the light-emitting structure; removing a part of the light-emitting structure in the street areas to expose a sidewall in the chip areas; forming a first passivation layer on the light-emitting structure in the chip areas; and forming a second passivation layer in the street areas, the sidewalls of the light-emitting structure, and the sidewalls of the first passivation layer.
    Type: Application
    Filed: February 13, 2012
    Publication date: August 15, 2013
    Applicant: Epistar Corporation
    Inventors: Cheng-Hsien Li, Chi-Hao Huang, Hsin-Hsiung Huang
  • Publication number: 20110316001
    Abstract: A method for growing a Group III-V nitride film and a structure thereof are presented. The method is carried out by hydride vapor phase epitaxy (HVPE). The method includes the steps of, inter alia, slowly epitaxially growing a temperature ramping nitride layer on a substrate by rising a first growth temperature of 900-950° C. to a second growth temperature of 1000-1050° C. at a temperature-rising rate of 0.5-10° C./min. The lattice quality of the temperature ramping nitride layer is slowly transformed with the layer height, so that a stress induced by lattice mismatch between a sapphire substrate and a gallium nitride (GaN) layer is relieved.
    Type: Application
    Filed: September 7, 2011
    Publication date: December 29, 2011
    Applicant: NATIONAL CHIAO TUNG UNIVERSITY
    Inventors: Wei I Lee, Hsin Hsiung Huang, Kuei Ming Chen, Yen Hsien Yeh
  • Patent number: 7888270
    Abstract: The invention discloses etching method for the nitride semiconductor. Firstly dielectric layer is formed on gallium nitride. The line pattern or dot pattern is formed on the dielectric layer by using the exposure, development, and etching processes. The dielectric layer is used as the mask for the epitaxial lateral overgrowth of follow-up gallium nitride layer. The thick gallium nitride film is grown on the dielectric layer. Then the wet etching process is used to remove the dielectric layer, and the thick gallium nitride film on the dielectric layer is etched to form the specific shape as required.
    Type: Grant
    Filed: September 4, 2007
    Date of Patent: February 15, 2011
    Assignee: National Chiao Tung University
    Inventors: Wei-I Lee, Hsin-Hsiung Huang, Hung-Yu Zeng
  • Publication number: 20100252834
    Abstract: A method for growing a Group III-V nitride film and a structure thereof are presented. The method is carried out by hydride vapor phase epitaxy (HVPE). The method includes the steps of, inter alia, slowly epitaxially growing a temperature ramping nitride layer on a substrate by rising a first growth temperature of 900-950° C. to a second growth temperature of 1000-1050° C. at a temperature-rising rate of 0.5-10° C./min. The lattice quality of the temperature ramping nitride layer is slowly transformed with the layer height, so that a stress induced by lattice mismatch between a sapphire substrate and a gallium nitride (GaN) layer is relieved.
    Type: Application
    Filed: October 5, 2009
    Publication date: October 7, 2010
    Applicant: National Chiao Tung University
    Inventors: Wei I LEE, Hsin Hsiung Huang, Kuei Ming Chen, Yen Hsien Yeh
  • Publication number: 20090061636
    Abstract: The invention discloses etching method for the nitride semiconductor. Firstly dielectric layer is formed on gallium nitride. The line pattern or dot pattern is formed on the dielectric layer by using the exposure, development, and etching processes. The dielectric layer is used as the mask for the epitaxial lateral overgrowth of follow-up gallium nitride layer. The thick gallium nitride film is grown on the dielectric layer. Then the wet etching process is used to remove the dielectric layer, and the thick gallium nitride film on the dielectric layer is etched to form the specific shape as required.
    Type: Application
    Filed: September 4, 2007
    Publication date: March 5, 2009
    Applicant: National Chiao Tung University
    Inventors: Wei-I Lee, Hsin-Hsiung Huang, Hung-Yu Zeng
  • Publication number: 20070012309
    Abstract: A gas control knob includes a valve body, a valve seat mounted on the valve body, a control lever movably mounted in the valve seat and movable by a pressing action to regulate a gas flow rate of the valve body, a fixing bracket mounted on the valve body, a motor mounted on the fixing bracket, a transmission mechanism mounted on the fixing bracket and driven by the motor, and a linear displacement mechanism mounted on the fixing bracket and driven by the transmission mechanism to perform a linear motion to press the control lever to regulate the gas flow rate of the valve body automatically. Thus, the gas control knob is operated and controlled automatically, thereby facilitating a user operating the gas control knob.
    Type: Application
    Filed: July 12, 2005
    Publication date: January 18, 2007
    Inventors: Ching-Ying Huang, Hsin-Ming Huang, Hsin-Hsiung Huang, Pao-Hui Huang, Chung-Sheng Yen, Ching-Chieh Hung
  • Publication number: 20070012892
    Abstract: A gas control knob includes a main body having a gas inlet hole and a gas outlet hole, a throttling cock rotatably mounted in the main body to regulate the gas flow rate between the gas inlet hole and the gas outlet hole of the main body, a rotation lever rotatably mounted on the main body to rotate the throttling cock, and a motor mounted on a fixing bracket to drive a transmission mechanism automatically which drives a clutch mechanism to drive and rotate the rotation lever to rotate the throttling cock. Thus, the gas control knob is operated manually or automatically, thereby facilitating a user operating the gas control knob.
    Type: Application
    Filed: July 12, 2005
    Publication date: January 18, 2007
    Applicant: Chung-Chih Huang
    Inventors: Ching-Ying Huang, Hsin-Ming Huang, Hsin-Hsiung Huang, Pao-Hui Huang, Chung-Sheng Yen, Ching-Chieh Hung
  • Publication number: 20070012308
    Abstract: A gas control knob includes a valve body, a valve cap, a rotation lever, a cam, and a spring. Thus, when the rotation lever is rotated to regulate the gas flow rate, the engaging tooth of the cam is axially and reciprocally movable on the toothed face of the track of the valve cap synchronously to produce vibration and sound during rotation of the rotation lever, thereby providing a notification function to the user so as to assure the safety when using the gas stove.
    Type: Application
    Filed: July 12, 2005
    Publication date: January 18, 2007
    Applicant: Chung-Chin Huang
    Inventors: Ching-Ying Huang, Hsin-Ming Huang, Hsin-Hsiung Huang, Pao-Hui Huang, Chung-Sheng Yen, Ching-Chieh Hung
  • Publication number: 20070012310
    Abstract: A gas control knob for a gas stove includes a main body having a gas chamber connected between a gas inlet hole and a gas outlet hole, a throttling cock rotatably mounted in the main body to regulate a gas flow rate between the gas inlet hole and the gas chamber, and an electromagnetic valve mounted on the main body to control connection between the gas chamber and the gas outlet hole of the main body. Thus, the electromagnetic valve is operated to open or close the fire automatically after the rotation lever is rotated to a determined extent, thereby facilitating a user opening or closing the fire of the gas stove.
    Type: Application
    Filed: July 12, 2005
    Publication date: January 18, 2007
    Inventors: Ching-Ying Huang, Hsin-Ming Huang, Hsin-Hsiung Huang, Pao-Hui Huang, Chung-Sheng Yen, Ching-Chieh Hung
  • Patent number: 7156367
    Abstract: A gas control knob includes a main body having a gas inlet hole and a gas outlet hole, a throttling cock rotatably mounted in the main body to regulate the gas flow rate between the gas inlet hole and the gas outlet hole of the main body, a rotation lever rotatably mounted on the main body to rotate the throttling cock, and a motor mounted on a fixing bracket to drive a transmission mechanism automatically which drives a clutch mechanism to drive and rotate the rotation lever to rotate the throttling cock. Thus, the gas control knob is operated manually or automatically, thereby facilitating a user operating the gas control knob.
    Type: Grant
    Filed: July 12, 2005
    Date of Patent: January 2, 2007
    Inventors: Ching-Ying Huang, Hsin-Ming Huang, Hsin-Hsiung Huang, Pao-Hui Huang, Chung-Sheng Yen, Ching-Chieh Hung