OPTOELECTRONIC SEMICONDUCTOR DEVICE AND THE MANUFACTURING METHOD THEREOF
The present application provides a method of manufacturing an optoelectronic semiconductor device, comprising the steps of: providing a substrate; forming an optoelectronic system on the substrate; forming a barrier layer on the optoelectronic system; forming an electrode on the barrier layer; and annealing the optoelectronic semiconductor device; wherein the optoelectronic semiconductor device has a first forward voltage before the annealing step and has a second forward voltage after the annealing step, and a difference between the second forward voltage and the first forward voltage is smaller than 0.2 Volt.
Latest EPISTAR CORPORATION Patents:
This application is a continuation application of U.S. patent application Ser. No. 13/747,593, entitled “OPTOELECTRONIC SEMICONDUCTOR DEVICE AND THE MANUFACTURING METHOD THEREOF”, filed on Jan. 23, 2013, now pending, which claims the benefit of priority to U.S. Provisional Application Ser. No. 61/593,896 field Feb. 2, 2012, the contents of which is incorporated by reference herein in its entirety.
TECHNICAL FIELDThe application relates to an optoelectronic semiconductor device and the manufacturing method thereof.
BACKGROUNDThe forward voltage (Vf) of the nitride optoelectronic semiconductor device is normally increased after annealing with a high temperature (>150° C.). The main factor causes the above phenomenon is the characteristic of the contact between n-type GaN layer and n-type electrode.
SUMMARYThe present application provides a method of manufacturing an optoelectronic semiconductor device, comprising the steps of: providing a substrate; forming an optoelectronic system on the substrate; forming a barrier layer on the optoelectronic system; forming an electrode on the barrier layer; and annealing the optoelectronic semiconductor device; wherein the optoelectronic semiconductor device has a first forward voltage before the annealing step and has a second forward voltage after the annealing step, and a difference between the second forward voltage and the first forward voltage is smaller than 0.2 Volt.
The foregoing aspects and many of the attendant advantages of this application are more readily appreciated as the same become better understood by reference to the following detailed description, when taken in conjunction with the accompanying drawings, wherein:
Referring to
Following, an optoelectronic system 106 including a first conductivity type layer 102, a conversion unit 103, and a second conductivity type layer 104 is formed on the first surface 101a of the substrate 101. The first conductivity type layer 102 and the second conductivity type layer 104 are two single-layer structures or two multiple layers structures (“multiple layers” means two or more than two layers) having different electrical properties, polarities, dopants for providing electrons or holes respectively. If the first conductivity type layer 102 and the second conductivity type layer 104 are composed of the semiconductor materials, the conductivity type can be composed of any two of p-type, n-type, and i-type. The conversion unit 103 disposed between the first conductivity type layer 102 and the second conductivity type layer 104 is a region where the light energy and the electrical energy could exchange or could be induced to exchange. Specifically speaking, the optoelectronic system can be a light-emitting diode (LED), a laser diode (LD), an organic light-emitting diode, a liquid crystal display, a solar cell, or a photo diode. The conversion unit 103 transferring the electrical energy to the light energy forms a part of a light-emitting diode, a liquid crystal display, or an organic light-emitting diode. The conversion unit 103 transferring the light energy to the electrical energy forms a part of a solar cell or a photo diode. The phrase “optoelectronic system” in the specification does not require that all the sub-systems or units in the system be manufactured by semiconductor materials. Other non-semiconductor materials such as metal, oxide, insulator, and so on could also be selectively integrated in this optoelectronic system.
Taking the light-emitting diode as an example, the emission spectrum of the transferred light could be adjusted by changing the physical or chemical arrangement of one layer or more layers in the optoelectronic system. The commonly used materials contain one or more elements selected from the group consisting of Ga, Al, In, As, P, N, and Si. The conversion unit can be a single heterostructure (SH), a double heterostructure (DH), a double-side double heterostructure (DDH), or a multi-quantum well (MQW) structure. Besides, the wavelength of the emitted light could also be adjusted by changing the number of the pairs of the quantum well in a MQW structure.
A transition layer (not shown) could be optionally formed between the substrate 101 and the optoelectronic system 106. The transition layer between two material systems can be used as a buffer system. For the structure of the light-emitting diode, the transition layer is used to reduce the lattice mismatch between two material systems. On the other hand, the transition layer could also be a single layer, multiple layers, or a structure to combine two materials or two separated structures where the material of the transition layer can be organic, inorganic, metal, semiconductor, and so on, and the structure can be a reflection layer, a heat conduction layer, an electrical conduction layer, an ohmic contact layer, an anti-deformation layer, a stress release layer, a stress adjustment layer, a bonding layer, a wavelength converting layer, a mechanical fixing structure, and so on. Furthermore, the light-emitting diode structure is separated from a growth substrate (not shown) for growing the optoelectronic system 106, and bonded to the substrate 101.
Referring to
In the embodiment of the present application, an optoelectronic semiconductor device is annealed with a temperature greater than 150° C. The X-axis of the
The Vf of the Samples C or D is decreased when the annealing cycle times increased. Because the barrier layer thickness of the Samples C and D is thick enough to prevent metal such as Al in the electrode 10 from reacting with GaN in the optoelectronic system 106, AlN or AlGaN is not formed near an interface between the electrode 110 and the optoelectronic system 106. The barrier layer 109 can prevent metal such as Al or Au in the electrode 110 from diffusing into the optoelectronic system 106 so a good contact resistance between the electrode 110 and the optoelectronic system 106 of the optoelectronic semiconductor device is achieved. For example, Sample C of the optoelectronic semiconductor device has a first forward voltage 3.6 Volt at the room temperature and a second forward voltage 3.5 Volt after being annealed one time in 260° C., so the difference between the second forward voltage Vf2 and the first forward voltage Vf1 is 0.1 Volt. Sample D of the optoelectronic semiconductor device has a first forward voltage 3.78 Volt at the room temperature and a second forward voltage 3.59 Volt after being annealed one time in 260° C., so the difference between the second forward voltage Vf2 and the first forward voltage Vf1 is 0.19 Volt. In other words, the difference between the second forward voltage Vf2 and the first forward voltage Vf1 is generally smaller than 0.2 Volt.
It will be apparent to those having ordinary skill in the art that various modifications and variations can be made to the devices in accordance with the present disclosure without departing from the scope or spirit of the disclosure. In view of the foregoing, it is intended that the present disclosure covers modifications and variations of this disclosure provided they fall within the scope of the following claims and their equivalents.
Although the drawings and the illustrations above are corresponding to the specific embodiments individually, the element, the practicing method, the designing principle, and the technical theory can be referred, exchanged, incorporated, collocated, coordinated except they are conflicted, incompatible, or hard to be put into practice together.
Although the present application has been explained above, it is not the limitation of the range, the sequence in practice, the material in practice, or the method in practice. Any modification or decoration for present application is not detached from the spirit and the range of such.
Claims
1. A method of manufacturing an optoelectronic semiconductor device, comprising the steps of:
- providing a substrate;
- forming an optoelectronic system on the substrate;
- forming a barrier layer on the optoelectronic system;
- forming an electrode on the barrier layer; and
- annealing the optoelectronic semiconductor device;
- wherein the optoelectronic semiconductor device has a first forward voltage before the annealing step and has a second forward voltage after the annealing step, and a difference between the second forward voltage and the first forward voltage is smaller than 0.2 Volt.
2. The method according to claim 1, further comprising a step of patterning the optoelectronic system to forma sidewall.
3. The method according to claim 2, wherein the method of forming the barrier layer comprises physical vapor phase deposition (PVD).
4. The method according to claim 3, wherein the physical vapor phase deposition (PVD) comprises sputtering deposition.
5. The method according to claim 2, further comprising a step of forming a passivation layer on a sidewall of the optoelectronic system.
6. The method device according to claim 5, wherein the material of the passivation layer comprises single metal oxides, complex oxides, or non-conductive compound nitrides.
7. The method according to claim 6, wherein the material of the passivation layer comprises SiNX
8. The method according to claim 1, wherein the material of the barrier layer comprises metal nitride.
9. The method according to claim 8, wherein the material of the barrier layer comprises TiNx.
10. The method according to claim 1, wherein the optoelectronic system comprises a first conductivity type layer, a conversion unit, and a second conductivity type layer.
11. The method according to claim 1, wherein the material of the optoelectronic system comprises one or more elements selected from the group consisting of Ga, Al, In, As, P, N, and Si.
12. The method according to claim 1, wherein the step of annealing the optoelectronic semiconductor device is performed at an annealing temperature greater than 150° C.
13. The method according to claim 1, comprising cycling the annealing step more than one time.
14. The method according to claim 1, wherein the first forward voltage and the second forward voltage are measured under a current of 350 mA applied to the optoelectronic semiconductor device.
15. The method according to claim 1, wherein the second forward voltage is lower than the first forward voltage.
16. The method according to claim 1, wherein the thickness of the barrier layer is not less than 10 angstroms.
17. The method according to claim 1, wherein the substrate is conductive.
Type: Application
Filed: Mar 19, 2014
Publication Date: Jul 24, 2014
Applicant: EPISTAR CORPORATION (Hsinchu)
Inventors: Tz Chiang YU (Hsinchu), Jenn Hwa FU (Hsinchu), Hsin Hsiung HUANG (Hsinchu)
Application Number: 14/219,490
International Classification: H01L 33/62 (20060101); H01L 31/18 (20060101);