Patents by Inventor Hsin YU
Hsin YU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250143323Abstract: Present invention teaches the method of using a keratin hydrolysis peptide (“KHP”) solution to enhance tomato plant's growth and production yield in hot weather. By selectively choosing specific weights of feathers and water, and treating the mixture to a high-temperature high-pressure hydrolysis process, the resulting solution is confirmed to contain at least 253 peptides and then infused to the soil in which the tomato seedlings/plants are planted; the solution can also be sprayed to the leaf surface of tomato plants. Optionally, the KHP solution can be diluted by water, as disclosed in the specification, for applying to the soil around the tomato seedlings/plants and for spraying to leaf surface of tomato plants.Type: ApplicationFiled: January 31, 2024Publication date: May 8, 2025Applicant: CH Biotech R&D Co., Ltd.Inventors: Iou-Zen CHEN, Hsin-Yu CHEN, Jie-Chao YOU, Nai-Hua YE
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Publication number: 20250150200Abstract: A communication device includes: a receiving circuit, for receiving a data unit from a transmitter; a comparing circuit, coupled to the receiving circuit, for comparing a target station identity (STAID) with a STAID in the data unit, to generate a comparison result; a processing circuit, coupled to the comparing circuit, for performing a cyclic redundancy check (CRC) according to the comparison result and a check code in the data unit, to generate a check result, and for determining a frequency resource according to the check result and an extremely high throughput signal (EHT-SIG) field in the data unit; and a transmitting circuit, coupled to the processing circuit, for transmitting the frequency resource to a demodulation circuit.Type: ApplicationFiled: October 30, 2024Publication date: May 8, 2025Applicant: Realtek Semiconductor Corp.Inventors: Hsin-Chih Huang, Chi-Mao Lee, Hsin-Yu Kuo
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Patent number: 12283568Abstract: Alignment of devices formed on substrates that are to be bonded may be achieved through the use of scribe lines between the devices, where the scribe lines progressively increase or decrease in size from a center to an edge of one or more of the substrates to compensate for differences in the thermal expansion rates of the substrates. The devices on the substrates are brought into alignment as the substrates are heated during a bonding operation due to the progressively increased or decreased sizes of the scribe lines. The scribe lines may be arranged in a single direction in a substrate to compensate for thermal expansion along a single axis of the substrate or may be arranged in a plurality of directions to compensate for actinomorphic thermal expansion.Type: GrantFiled: July 5, 2023Date of Patent: April 22, 2025Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hsi-Cheng Hsu, Jui-Chun Weng, Ching-Hsiang Hu, Ji-Hong Chiang, Kuo-Hao Lee, Chia-Yu Lin, Chia-Chun Hung, Yen-Chieh Tu, Chien-Tai Su, Hsin-Yu Chen
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Patent number: 12277883Abstract: An example device includes a display component that is configured to operate at a first refresh rate or a second refresh rate. The device also includes one or more processors operable to perform operations. The operations include identifying a rate change triggering event while the display component is operating at the first refresh rate. The operations further include determining a current brightness value of the display component. The operations also include determining, based on an environmental state measurement associated with an environment around the device, a threshold brightness value. The operations additionally include transitioning the display component from the first refresh rate to the second refresh rate m response to identifying the rate change triggering event if the current brightness value of the display component meets or exceeds the threshold brightness value.Type: GrantFiled: November 29, 2023Date of Patent: April 15, 2025Assignee: Google LLCInventors: Chien-Hui Wen, Yichi Chen, Hsin-Yu Chen
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Patent number: 12279064Abstract: An image compensation circuit for controlling a luminance of a display panel is configured to: receive a plurality of image data; perform gamma tuning to convert the plurality of image data into a plurality of original gamma codes according to a plurality of first compensation values corresponding to a first operation mode; calculate a plurality of gamma difference values between the plurality of first compensation values and a plurality of second compensation values corresponding to a second operation mode; and calculate a plurality of output gamma codes corresponding to the second operation mode according to the plurality of original gamma codes by using the plurality of gamma difference values.Type: GrantFiled: February 23, 2023Date of Patent: April 15, 2025Assignee: NOVATEK Microelectronics Corp.Inventors: Wei-Jhe Ma, Feng-Ting Pai, Jun-Yu Yang, Hsin-Yu Pan
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Publication number: 20250113794Abstract: Present invention teaches the method of using a keratin hydrolysis peptide (“KHP”) solution to enhance production yield and fruit quality of cucumber by selectively choosing specific weights of feathers and water, and treating the mixture to a high-temperature high-pressure hydrolysis process, the resulting solution is confirmed to contain at least 253 peptides and, at early growth stage, applied to the soil around and/or leaf surface of the cucumber plants. Optionally, the KHP solution can be diluted by water, as disclosed in the specification, before administering as taught herein.Type: ApplicationFiled: January 3, 2024Publication date: April 10, 2025Applicant: CH Biotech R&D Co., Ltd.Inventors: Kai XIA, Hsin-Yu CHEN, Jie-Chao YOU, Nai-Hua YE
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Patent number: 12271006Abstract: Disclosed is a cost-effective method to fabricate a multifunctional collimator structure for contact image sensors to filter ambient infrared light to reduce noises. In one embodiment, an optical collimator, includes: a dielectric layer; a substrate; a plurality of via holes; and a conductive layer, wherein the dielectric layer is formed over the substrate, wherein the plurality of via holes are configured as an array along a lateral direction of a first surface of the dielectric layer, wherein each of the plurality of via holes extends through the dielectric layer and the substrate from the first surface of the dielectric layer to a second surface of the substrate in a vertical direction, and wherein the conductive layer is formed over at least one of the following: the first surface of the first dielectric layer and a portion of sidewalls of each of the plurality of via holes, and wherein the conductive layer is configured so as to allow the optical collimator to filter light in a range of wavelengths.Type: GrantFiled: August 8, 2023Date of Patent: April 8, 2025Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Hsin-Yu Chen, Yen-Chiang Liu, Jiun-Jie Chiou, Jia-Syuan Li, You-Cheng Jhang, Shin-Hua Chen, Lavanya Sanagavarapu, Han-Zong Pan, Chun-Peng Li, Chia-Chun Hung, Ching-Hsiang Hu, Wei-Ding Wu, Jui-Chun Weng, Ji-Hong Chiang, Hsi-Cheng Hsu
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Patent number: 12266648Abstract: A package structure includes an insulating encapsulation, a semiconductor die, and a filter structure. The semiconductor die is encapsulated in the insulating encapsulation. The filter structure is electrically coupled to the semiconductor die, wherein the filter structure includes a patterned metallization layer with a pattern having a double-spiral having aligned centroids thereof.Type: GrantFiled: August 2, 2023Date of Patent: April 1, 2025Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Sen-Kuei Hsu, Hsin-Yu Pan, Ming-Hsien Tsai
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Patent number: 12265045Abstract: Apparatus and method for determining a characteristic of a material within a region. One apparatus includes a first plurality of electrodes, a stimulation monitor monitoring an electrical parameter at a plurality of other electrodes of said first plurality of electrodes in response to an applied stimulation signal, a monitor, and a controller. The stimulation monitor generating a received stimulation signal for each of said plurality of other electrodes. The monitor generating a series of data values, each data value being indicative of a phase difference and/or an amplitude relationship between the applied stimulation signal and the received stimulation signal associated with one of the plurality of other electrodes, said series of data values defining an electromagnetic fingerprint.Type: GrantFiled: March 30, 2021Date of Patent: April 1, 2025Assignee: INDUSTRIAL TOMOGRAPHY SYSTEMS LTD.Inventors: Thomas David Machin, Hsin-Yu Wei
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Publication number: 20250103284Abstract: An electronic device includes a first buffer, a second buffer, and a multiplexer. The first buffer receives and stores first data when the first buffer is not full, and performs a First-In-First-Out (FIFO) operation on the first data. The second buffer receives and stores second data when the first buffer is full, and performs the FIFO operation on the second data. The multiplexer is electrically connected between the first buffer and the second buffer. The multiplexer receives the first data from outside of the electronic device, or it receives the second data from the second buffer. A depth of the first buffer is less than that of the second buffer.Type: ApplicationFiled: September 12, 2024Publication date: March 27, 2025Inventors: Ming-Hung HSIEH, Pei-Lun WU, Hsin-Yu CHANG, Yu-Cheng WU
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Patent number: 12255196Abstract: Manufacturing method of semiconductor package includes following steps. Bottom package is provided. The bottom package includes a die and a redistribution structure electrically connected to die. A first top package and a second top package are disposed on a surface of the redistribution structure further away from the die. An underfill is formed into the space between the first and second top packages and between the first and second top packages and the bottom package. The underfill covers at least a side surface of the first top package and a side surface of the second top package. A hole is opened in the underfill within an area overlapping with the die between the side surface of the first top package and the side surface of the second top package. A thermally conductive block is formed in the hole by filling the hole with a thermally conductive material.Type: GrantFiled: July 31, 2023Date of Patent: March 18, 2025Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Shih-Wei Chen, Chih-Hua Chen, Hsin-Yu Pan, Hao-Yi Tsai, Lipu Kris Chuang, Tin-Hao Kuo
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Publication number: 20250087291Abstract: An input/output circuit comprises a bypass circuit, a first latch, a second latch, a first transistor, and a second transistor. The bypass circuit is configured to directly receive a data signal and indirectly receive a write enable signal. The first latch is coupled between a first data line and a second data line. The second latch is operatively coupled to the first latch and configured to generate a data output signal based on a voltage level presented on the second data line. The first transistor is coupled to the first latch and gated by a sense enable signal. The second transistor is coupled to the first latch and gated by a clock signal. The first transistor and the second transistor are alternately activated in each of a plurality of operation modes of the input/output circuit.Type: ApplicationFiled: September 8, 2023Publication date: March 13, 2025Applicant: Taiwan Semiconductor Manufacturing Company Ltd.Inventors: Hua-Hsin Yu, Che-An Lee, Hau-Tai Shieh, Cheng Hung Lee, Hung-Jen Liao
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Publication number: 20250087126Abstract: An example method includes measuring, from a device having a display panel, a plurality of luminance values for a plurality of pixels located along a cross-section of the display panel. The method includes selecting, based on the measured luminance values, a target luminance value. The method includes determining a luminance compensation profile for the input gray level at the given refresh rate. The luminance compensation profile comprises ratios of the measured plurality of luminance values to the target luminance value. The method includes storing, at the device, the luminance compensation profile. Subsequent to the storing, the device is configured to adjust input display data using the luminance compensation profile for an input gray level when the display panel is providing a display. The luminance compensation profile maintains a color uniformity of the display.Type: ApplicationFiled: December 22, 2021Publication date: March 13, 2025Inventors: Chien-Hui Wen, Hsin-Yu Chen
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Publication number: 20250082744Abstract: The present disclosure relates to a chimeric influenza virus hemagglutinin (HA) polypeptide, comprising one or more stem domain sequence, each having at least 60% homology with a stem domain consensus sequence of H1 subtype HA (H1 HA) and/or H5 subtype HA (H5 HA), fused with one or more globular head domain sequence, each having at least 60% homology with a globular head domain consensus sequence of H1 subtype HA (H1 HA) or H5 subtype HA (H5 HA).Type: ApplicationFiled: October 25, 2024Publication date: March 13, 2025Inventors: Chi-Huey WONG, Hsin-Yu LIAO, Shih-Chi WANG, Yi-An KO, Kuo-I LIN, Che MA, Ting-Jen CHENG
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Patent number: 12249391Abstract: A device is disclosed and includes an input stage circuit, a switching circuit, and a first latch circuit. The input stage circuit generates a first input signal having a first voltage and a second input signal based on a third input signal. The switching circuit operates in response to a first control signal, and adjusts a voltage level of a first data line according to the first input signal and a voltage level of a second data line according to the second input signal. The first latch circuit is coupled to the switching circuit by the first data line and the second data line. The first latch circuit latches a data in response to the first control signal and a second control signal, and adjusts the voltage level of the first data line based on a second voltage different from the first voltage.Type: GrantFiled: November 8, 2023Date of Patent: March 11, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Hua-Hsin Yu, Hung-Jen Liao, Cheng-Hung Lee, Hau-Tai Shieh
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Patent number: 12249649Abstract: A semiconductor device includes a fin-shaped structure on the substrate, a shallow trench isolation (STI) around the fin-shaped structure, a single diffusion break (SDB) structure in the fin-shaped structure for dividing the fin-shaped structure into a first portion and a second portion; a first gate structure on the fin-shaped structure, a second gate structure on the STI, and a third gate structure on the SDB structure. Preferably, a width of the third gate structure is greater than a width of the second gate structure and each of the first gate structure, the second gate structure, and the third gate structure includes a U-shaped high-k dielectric layer, a U-shaped work function metal layer, and a low-resistance metal layer.Type: GrantFiled: March 22, 2021Date of Patent: March 11, 2025Assignee: UNITED MICROELECTRONICS CORP.Inventors: Cheng-Han Wu, Hsin-Yu Chen, Chun-Hao Lin, Shou-Wei Hsieh, Chih-Ming Su, Yi-Ren Chen, Yuan-Ting Chuang
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Publication number: 20250081255Abstract: The present disclosure discloses a Bluetooth communication system. A first access point apparatus of a Bluetooth access point apparatus performs periodic broadcast communication.Type: ApplicationFiled: August 29, 2024Publication date: March 6, 2025Inventors: CHIA-CHUN HUNG, Li-Ya Huang, Hsin-Yu Chang, Yu Chiang, Po-Sheng Chiu, Yu-Hsin Lu
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Patent number: 12242181Abstract: A portion of a buffer layer on a backside of a substrate of a photomask assembly may be removed prior to formation of one or more capping layers on the backside of the substrate. The one or more capping layers may be formed directly on the backside of the substrate where the buffer layer is removed from the substrate, and a hard mask layer may be formed directly on the one or more capping layers. The one or more capping layers may include a low-stress material to promote adhesion between the one or more capping layers and the substrate, and to reduce and/or minimize peeling and delamination of the capping layer(s) from the substrate. This may reduce the likelihood of damage to the pellicle layer and/or other components of the photomask assembly and/or may increase the yield of an exposure process in which the photomask assembly is used.Type: GrantFiled: July 31, 2023Date of Patent: March 4, 2025Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Kuo-Hao Lee, Hsi-Cheng Hsu, Jui-Chun Weng, Han-Zong Pan, Hsin-Yu Chen, You-Cheng Jhang
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Patent number: 12236830Abstract: A method for calibrating input display data for multiple display refresh rates comprises measuring (1210) an optical property of a display panel for an input gray level at a first refresh rate, measuring (1220) the optical property for a plurality of candidate gray levels at a second refresh rate, selecting (1230), based on the measured optical properties of the display panel, a corresponding gray level for the input gray level, wherein the corresponding gray level is selected from the plurality of candidate gray levels and storing (1240), at the device, the corresponding gray level for the input gray level, wherein subsequent to the storing, the device is configured to adjust input display data using the corresponding gray level for the input gray level when the display panel is transitioning from the first refresh rate to the second refresh rate.Type: GrantFiled: January 25, 2021Date of Patent: February 25, 2025Assignee: Google LLCInventors: Chien-Hui Wen, Hsin-Yu Chen
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Patent number: 12237329Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first region and a second region; forming a first fin-shaped structure on the first region and a second fin-shaped structure on the second region; forming a patterned mask on the second region; and performing a process to enlarge the first fin-shaped structure so that the top surfaces of the first fin-shaped structure and the second fin-shaped structure are different.Type: GrantFiled: December 1, 2023Date of Patent: February 25, 2025Assignee: UNITED MICROELECTRONICS CORP.Inventors: Chun-Hao Lin, Hsin-Yu Chen, Shou-Wei Hsieh