Abstract: A health management supply organizer is disclosed. The health management supply organizer includes a closeable body adapted to receive a plurality of health monitoring supplies. The plurality of health monitor supplies include at least a transmitter container for receiving a transmitter, a charger for the transmitter and a splitter for splitting a used sensor module and the transmitter. The closeable body includes a first leaf, a second leaf and an end portion connecting the first leaf and the second leaf, wherein the first leaf and the second leaf are foldable about the end portion. The first leaf has a plurality of compartments adapted to receive the plurality of health monitoring supplies respectively.

Abstract: A method for fabricating a semiconductor device includes the steps of first providing a substrate comprising a non-metal-oxide semiconductor capacitor (non-MOSCAP) region and a MOSCAP region, forming a first fin-shaped structure on the MOSCAP region, forming a doped layer on the substrate of the non-MOSCAP region and the first fin-shaped structure on the MOSCAP region, removing the doped layer on the non-MOSCAP region, and then performing an anneal process to drive dopants from the doped layer into the first fin-shaped structure.

Abstract: A method of forming a semiconductor structure includes forming a fin over a semiconductor substrate, forming an isolation region on sidewalls of the fin, forming a metal gate over the fin and the isolation region, etching the metal gate to form a trench through the isolation region, passivating the top portion of the semiconductor substrate exposed in the trench to form a dielectric layer at a bottom of the trench, and depositing a dielectric material in the trench to form a dielectric structure. The dielectric structure divides the metal gate into two sections.

Abstract: A light-emitting device includes a first semiconductor layer; a semiconductor pillar formed on the first semiconductor layer, including a second semiconductor layer and an active layer, wherein the semiconductor pillar comprises an outmost periphery; a first contact layer formed on the first semiconductor layer and including a first contact portion and a first extending portion, wherein the first extending portion continuously surrounds an entirety of the outmost periphery of the semiconductor pillar and the first contact portion; a second contact layer formed on the second semiconductor layer; a first insulating layer including multiple first openings exposing the first contact layer and multiple second openings exposing the second contact layer; a first electrode contact layer connected to the first contact portion through the multiple first openings and covering all of the first contact layer; a second electrode contact layer connected to the second contact layer through the multiple second openings.

Abstract: An optoelectronic device includes a first semiconductor layer, a second semiconductor layer and an active layer between the first semiconductor layer and the second semiconductor layer; a first insulating layer on the second semiconductor layer and including a plurality of first openings exposing the first semiconductor layer, wherein the first openings include a first group and a second group; a third electrode on the first insulating layer and including a first extended portion and a second extended portion, wherein the first extended portion and the second extended portion are respectively electrically connected to the first semiconductor layer through the first group of the first openings and the second group of the first openings, and wherein the number of the first group of the first openings is different from the number of the second group of the first openings; and a plurality of fourth electrodes on the second insulating layer and electrically connected to the second semiconductor layer, wherein in a

Abstract: A semiconductor structure includes a source/drain feature in the semiconductor layer. The semiconductor structure includes a dielectric layer over the source/drain feature. The semiconductor structure includes a silicide layer over the source/drain feature. The semiconductor structure includes a barrier layer over the silicide layer. The semiconductor structure includes a seed layer over the barrier layer. The semiconductor structure includes a metal layer between a sidewall of the seed layer and a sidewall of the dielectric layer, a sidewall of each of the silicide layer, the barrier layer, and the metal layer directly contacting the sidewall of the dielectric layer. The semiconductor structure includes a source/drain contact over the seed layer.

Abstract: The present invention relates to a cyber security authentication method. The method includes the following steps: in a user device: randomly generating an ephemeral decryption key, transmitting the ephemeral decryption key to a security server, and retrieving a key index from the security server; encrypting an identity information based on a part of the ephemeral decryption key to generate an electronic digital signature and an authentication token; and combining the key index, the electronic digital signature, and the authentication token to form an ephemeral certificate and transmitting the ephemeral certificate to a non-Internet electronic device; and in the non-Internet electronic device: parsing the ephemeral certificate to obtain the key index; and forwarding the key index to the security server via a transport connection including the user device to retrieve the ephemeral decryption key from the security server based on the key index.

Abstract: An optical imaging lens proofed against field curvatures, in an imaging module, and the module being used in an electronic device, is, from an object side to an image side, composed of a first lens with a positive refractive power, a second lens, a third lens, a fourth lens with a negative refractive power, a fifth lens, and a sixth lens with a negative refractive power. The optical imaging lens satisfies the formula ?3 mm?1<FNO/f6<?0.1 mm?1, ?0.065 mm/°<f6/FOV<?0.03 mm/°, wherein FNO is a F-number of the optical imaging lens, f6 is a focal length of the sixth lens, and FOV is a maximum field of view of the optical imaging lens.

Abstract: A spray disk includes multiple nozzles at an outer perimeter of the spray disk, a center hole, and multiple partitions. The partitions are arranged around the center hole and have the center hole as an inner perimeter. Each partition includes an air inlet to receive compressed air, a liquid tank to store a liquid, and a corresponding nozzle from which to spray the liquid with the compressed air. The spray disk can be used in an automatic makeup machine.

Abstract: A semiconductor structure includes a substrate including a device region, a peripheral region surrounding the device region, and a transition region disposed between the device region and the peripheral region. An epitaxial layer is disposed on the device region, the peripheral region, and the transition region. A first portion of the epitaxial layer on the peripheral region has a poly-crystal structure.

Abstract: A connector includes a circuit board, signal wires, and a ground bar. The circuit board has an upper surface and a lower surface opposite to each other. The upper surface includes upper signal contacts and upper ground contacts. The lower surface includes lower signal contacts and lower ground contacts. Some of the signal wires are in contact with the upper signal contacts respectively. Others of the signal wires are in contact with the lower signal contacts respectively. The ground bar is in contact with the upper ground contacts and the lower ground contacts.

Abstract: A physiological signal monitoring device includes a base including a base body that has a bottom plate and an opening, a biosensor mounted to the base, and a transmitter removably mounted to the base body. The base further includes a first coupling structure disposed on a top surface of the bottom plate, and the transmitter includes a second coupling structure coupled to the first coupling structure when the transmitter is mounted to the base body. When the first and second coupling structures are coupled to each other, they are disposed to be distal from a periphery cooperatively defined by the base and the transmitter. They are uncoupled from each other when an external force is applied through the opening of the base body to separate the transmitter from the base.

Abstract: A high-insulation multilayer planar transformer (1) includes a pair of iron cores (20) and a circuit board integration (10a). The circuit board integration (10a) is stacked between the iron cores (20) and has a through hole (100a). The circuit board integration (10a) includes a first to a third insulating layers (11a, 12a, 14a) and a first to a second coil windings (13a, 15a). The first and third insulating layers (11a, 14a) include at least two insulating plates (111a, 141a) stacked with each other respectively. The second insulating layer (12a) includes at least one insulating plate (121a). The coil winding (13a, 15a) is disposed between the adjacent insulating layers and surrounds the through hole (100a) planarly. Therefore, the reinforced insulation requirement of safety regulations may be achieved.

Abstract: A light-emitting device includes a semiconductor stack including a first semiconductor layer, a second semiconductor layer, and an active layer between the first semiconductor layer and the second semiconductor layer; one or multiple vias penetrating the active layer and the second semiconductor layer to expose the first semiconductor layer; a first contact layer covering the one or multiple vias; a third insulating layer including a first group of one or multiple third insulating openings on the second semiconductor layer to expose the first contact layer; a first pad on the semiconductor stack and covering the first group of one or multiple third insulating openings; and a second pad on the semiconductor stack and separated from the first pad with a distance, wherein the second pad is formed at a position other than positions of the one or multiple vias in a top view of the light-emitting device.

Abstract: An immersion cooling system is provided. The immersion cooling system includes a box, an upper cover, plural fixing components, plural latches and a link module. The box has an opening upwardly. The upper cover covers the opening. The fixing components are disposed on the box and arranged adjacent to the outer perimeter of the opening. The latches corresponding to the fixing components are disposed on the upper cover. The link module includes plural crossbars corresponding to the latches. The link module moves downwardly close to the upper cover, scroll-wheels of the latches roll along limiting surfaces of corresponding fixing components and press against the upper cover, the upper cover closes the opening to form an airtight space. The link module moves upwardly away from the upper cover, the scroll-wheels are separated away from the limiting surfaces of corresponding fixing components, allows the upper cover to separate from the opening.

Abstract: A light-emitting device comprises a first semiconductor layer; a semiconductor mesa, comprising an active layer and a second semiconductor layer and comprising an inclined surface connected to the first semiconductor layer; a contact electrode covering the second semiconductor layer and comprising an upper surface; a reflective structure comprising a reflective structure opening having a first side surface and a second side surface; a connection layer covering the reflective structure; and a metal reflective layer covering the connection layer; wherein in a cross-sectional view of the light-emitting device, a first portion of a projection of the first side surface to the upper surface of the contact electrode comprises a first length, a second portion of a projection of the second side surface to the upper surface of the contact electrode comprises a second length, and the first length is smaller than the second length.

Abstract: A light-emitting device comprises a first semiconductor layer; a semiconductor mesa, comprising an active layer and a second semiconductor layer and comprising an inclined surface; a contact electrode covering the second semiconductor layer and comprising a first side surface; an insulating reflective structure covering the contact electrode and comprising a plurality of insulating reflective structure openings; a connection layer covering the insulating reflective structure and filling into the plurality of insulating reflective structure openings, and comprising a second side surface; and a metal reflective layer covering the connection layer and filling into the plurality of insulating reflective structure openings, and comprising a third side surface; wherein in a cross-sectional view of the light-emitting device, a first pitch is between the first side surface and the inclined surface, a third pitch is between the third side surface and the inclined surface, and the third pitch is smaller than the first

Abstract: A semiconductor light-emitting device includes a semiconductor stack including a first semiconductor layer and a second semiconductor layer; a first reflective layer formed on the first semiconductor layer and including a plurality of vias; a plurality of contact structures respectively filled in the vias and electrically connected to the first semiconductor layer; a second reflective layer including metal material formed on the first reflective layer and contacting the contact structures; a plurality of conductive vias surrounded by the semiconductor stack; a connecting layer formed in the conductive vias and electrically connected to the second semiconductor layer; a first pad portion electrically connected to the second semiconductor layer; and a second pad portion electrically connected to the first semiconductor layer, wherein a shortest distance between two of the conductive vias is larger than a shortest distance between the first pad portion and the second pad portion.

Abstract: A high electron mobility transistor (HEMT) includes a substrate, a P-type III-V composition layer, a gate electrode and a carbon containing layer. The P-type III-V composition layer is disposed on the substrate, and the gate electrode is disposed on the P-type III-V composition layer. The carbon containing layer is disposed under the P-type III-V composition layer to function like an out diffusion barrier for preventing from the dopant within the P-type III-V composition layer diffusing into the stacked layers underneath during the annealing process.