Patents by Inventor Hsing Chen

Hsing Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230297184
    Abstract: Provided is an inspection tool for a touch panel, including a substrate adapted to be placed on the touch panel and multiple protrusions disposed on the substrate in correspondence to multiple touch inspection points and arranged along an inspection trajectory. An inspection method for a touch panel is also provided.
    Type: Application
    Filed: January 12, 2023
    Publication date: September 21, 2023
    Applicant: E Ink Holdings Inc.
    Inventors: Chien-Hsing Chang, Ying-Ta Chen, Yun-Nan Hsieh
  • Publication number: 20230298516
    Abstract: A display having an area of non-transparent pixels, an area of transparent pixels, a camera positioned behind the transparent pixels to capture an image when light passes through the transparent pixels, and a display controller for driving the non-transparent pixels at a first brightness and driving the transparent pixels at a second brightness greater than the first brightness during image capture by the camera.
    Type: Application
    Filed: May 26, 2023
    Publication date: September 21, 2023
    Applicant: Hewlett-Packard Development Company, L.P.
    Inventors: Hsing-Hung Hsieh, Kuan-Ting Wu, Dehuei Chen
  • Publication number: 20230295502
    Abstract: Compositions useful for the selective removal of silicon nitride materials relative to polysilicon, silicon oxide materials and/or silicide materials from a microelectronic device having same thereon are provided. The compositions of the invention are particularly useful in the etching of 3D NAND structures.
    Type: Application
    Filed: May 24, 2023
    Publication date: September 21, 2023
    Inventors: Steven Michael BILODEAU, SeongJin HONG, Hsing-Chen WU, Min-Chieh YANG, Emanuel I. COOPER
  • Publication number: 20230288745
    Abstract: An article (100) for a display device includes a diffraction grating film (102), a first optically clear adhesive layer (120), and a second optically clear adhesive layer (130). The diffraction grating film includes a base layer (104) and a plurality of microstructures (106) projecting from the base layer. The base layer defines a non-structured surface of the diffraction grating film and the plurality of microstructures define a structured surface of the diffraction grating film opposite to the non-structured surface. The first optically clear adhesive layer is disposed on the structured surface of the diffraction grating film. The second optically clear adhesive layer is disposed on the non-structured surface of the diffraction grating film.
    Type: Application
    Filed: August 11, 2021
    Publication date: September 14, 2023
    Inventors: Chun-Yi Ting, Chiu-Hsing Lin, Juo-Han Chou, Chun-Lung Chen, Kazuhiko Toyooka, Yu Hsin Lu
  • Publication number: 20230277094
    Abstract: An implantation device for prompt subcutaneous implantation of a sensor to measure a physiological signal of an analyte in a biofluid of a living body is disclosed. The implantation device includes a housing, an implantation module, a detachable module and a bottom cover. The housing has a bottom opening. The implantation module includes an implanting device and a needle extracting device. The detachable module includes the sensor detachably engaged with the implantation module; and a base configured to mount the sensor thereon. The bottom cover is detachably coupled to the bottom opening so that the housing and the bottom cover together form an accommodating space. The implantation module and the detachable module are accommodated in the accommodating space. The bottom cover has an operating portion configured to bear a force, and a supporting portion is formed on the opposite end of the operating portion.
    Type: Application
    Filed: May 10, 2023
    Publication date: September 7, 2023
    Inventors: Chun-Mu HUANG, Chieh-Hsing CHEN
  • Publication number: 20230268397
    Abstract: A semiconductor device includes an epitaxial substrate. The epitaxial substrate includes a substrate. A strain relaxed layer covers and contacts the substrate. A III-V compound stacked layer covers and contacts the strain relaxed layer. The III-V compound stacked layer is a multilayer epitaxial structure formed by aluminum nitride, aluminum gallium nitride or a combination of aluminum nitride and aluminum gallium nitride.
    Type: Application
    Filed: April 17, 2023
    Publication date: August 24, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Yu-Ming Hsu, Yu-Chi Wang, Yen-Hsing Chen, Tsung-Mu Yang, Yu-Ren Wang
  • Publication number: 20230262356
    Abstract: An imaging system includes a light source and a CCD camera. The light source includes a white LED. The light source is configured to emit light toward a target object. The CCD camera is configured to receive light reflected by the target object and form images by reflected light. An optical device including the imaging system is also provided.
    Type: Application
    Filed: June 29, 2022
    Publication date: August 17, 2023
    Inventors: JUN-PING QIN, YUAN-HSING CHEN
  • Publication number: 20230260836
    Abstract: A method includes forming a dielectric layer over a source/drain region. An opening is formed in the dielectric layer. The opening exposes a portion of the source/drain region. A conductive liner is formed on sidewalls and a bottom of the opening. A surface modification process is performed on an exposed surface of the conductive liner. The surface modification process forms a surface coating layer over the conductive liner. The surface coating layer is removed to expose the conductive liner. The conductive liner is removed from the sidewalls of the opening. The opening is filled with a conductive material in a bottom-up manner. The conductive material is in physical contact with a remaining portion of the conductive liner and the dielectric layer.
    Type: Application
    Filed: May 13, 2022
    Publication date: August 17, 2023
    Inventors: Pei Shan Chang, Yi-Hsiang Chao, Chun-Hsien Huang, Peng-Hao Hsu, Kevin Lee, Shu-Lan Chang, Ya-Yi Cheng, Ching-Yi Chen, Wei-Jung Lin, Chih-Wei Chang, Ming-Hsing Tsai
  • Publication number: 20230260906
    Abstract: Semiconductor devices are provided. A semiconductor device includes a semiconductor substrate, a power switch, a first power mesh and a second power mesh. The power switch is formed over the front surface of the semiconductor substrate. The first power mesh is formed over the power switch and is directly connected to the first terminal of the power switch. The second power mesh is formed over the back surface of the semiconductor substrate and is directly connected to the second terminal of the power switch.
    Type: Application
    Filed: January 27, 2022
    Publication date: August 17, 2023
    Inventors: Wan-Yu LO, Chin-Shen LIN, Chi-Yu LU, Kuo-Nan YANG, Chih-Liang CHEN, Chung-Hsing WANG
  • Publication number: 20230261148
    Abstract: A light-emitting device includes a semiconductor stack including a first semiconductor layer, a second semiconductor layer, and an active layer between the first semiconductor layer and the second semiconductor layer; one or multiple vias penetrating the active layer and the second semiconductor layer to expose the first semiconductor layer; a first contact layer covering the one or multiple vias; a third insulating layer including a first group of one or multiple third insulating openings on the second semiconductor layer to expose the first contact layer; a first pad on the semiconductor stack and covering the first group of one or multiple third insulating openings; and a second pad on the semiconductor stack and separated from the first pad with a distance, wherein the second pad is formed at a position other than positions of the one or multiple vias in a top view of the light-emitting device.
    Type: Application
    Filed: April 20, 2023
    Publication date: August 17, 2023
    Inventors: Chao-Hsing CHEN, Jia-Kuen WANG, Tzu-Yao TSENG, Bo-Jiun HU, Tsung-Hsun CHIANG, Wen-Hung CHUANG, Kuan-Yi LEE, Yu-Ling LIN, Chien-Fu SHEN, Tsun-Kai KO
  • Publication number: 20230253169
    Abstract: A system may comprise a printed circuit board (PCB) including a top surface, and a bracket including a top surface configured to receive and couple to a key switch and a bottom surface including at least two protrusions that extend normal to the bottom surface of the bracket. The bracket can be configured to mount to the PCB such that the bottom surface of the bracket is coupled to the top surface of the PCB, and the at least two protrusions may each include conductive leads that couple to the top surface of the PCB. The bracket is configured to only cover a portion of a bottom surface of the key switch when coupled to the key switch. An LED can be mounted to the top surface of the PCB, laterally adjacent to the bracket, and under the key switch at a location not covered by the bracket.
    Type: Application
    Filed: April 14, 2023
    Publication date: August 10, 2023
    Inventors: Feng-Hao Lin, Yu-Chun Sun, Lien Hsing Chen, Fu-Kai Hsu
  • Publication number: 20230253457
    Abstract: A semiconductor device includes an epitaxial substrate. The epitaxial substrate includes a substrate. A strain relaxed layer covers and contacts the substrate. A III-V compound stacked layer covers and contacts the strain relaxed layer. The III-V compound stacked layer is a multilayer epitaxial structure formed by aluminum nitride, aluminum gallium nitride or a combination of aluminum nitride and aluminum gallium nitride.
    Type: Application
    Filed: April 17, 2023
    Publication date: August 10, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Yu-Ming Hsu, Yu-Chi Wang, Yen-Hsing Chen, Tsung-Mu Yang, Yu-Ren Wang
  • Publication number: 20230246026
    Abstract: A semiconductor device structure includes a dielectric layer, a first source/drain feature in contact with the dielectric layer, wherein the first source/drain feature comprises a first sidewall. The structure also includes a second source/drain feature in contact with the dielectric layer and adjacent to the first source/drain feature, wherein the second source/drain feature comprises a second sidewall. The structure also includes an insulating layer disposed over the dielectric layer and between the first sidewall and the second sidewall, wherein the insulating layer comprises a first surface facing the first sidewall, a second surface facing the second sidewall, a third surface connecting the first surface and the second surface, and a fourth surface opposite the third surface. The structure further includes a sealing material disposed between the first sidewall and the first surface, wherein the sealing material, the first sidewall, the first surface, and the dielectric layer are exposed to an air gap.
    Type: Application
    Filed: April 10, 2023
    Publication date: August 3, 2023
    Inventors: Chih-Ching WANG, Chun-Chung SU, Chung-Wei WU, Jon-Hsu HO, Kuan-Lun CHENG, Wen-Hsing HSIEH, Wen-Yuan CHEN, Zhi-Qiang WU
  • Publication number: 20230238741
    Abstract: The present invention discloses a connector, including a base and a latch, the latch being one piece formed and disposed on the base, wherein one end of the latch having a strap hole portion, and another end of the latch having a pressing portion, wherein the pressing portion is located above the strap hole portion, and when the pressing portion is pressed and moves toward the base, the pressing portion drives the strap hole portion to move toward the base together. In this way, an operator applies force downward on the pressing portion, or pulls the strap horizontally backwards, or pulls the strap upwards in a vertical direction, the strap hole portion can be fully driven down to ensure smooth unlocking of the connector, so that the connector has improved in use reliability and a wider scope of application.
    Type: Application
    Filed: January 19, 2023
    Publication date: July 27, 2023
    Inventors: Shi-Jung CHEN, Yi-Hsing Chung
  • Publication number: 20230238488
    Abstract: A semiconductor light-emitting device includes a semiconductor stack including a first semiconductor layer and a second semiconductor layer; a first reflective layer formed on the first semiconductor layer and including a plurality of vias; a plurality of contact structures respectively filled in the vias and electrically connected to the first semiconductor layer; a second reflective layer including metal material formed on the first reflective layer and contacting the contact structures; a plurality of conductive vias surrounded by the semiconductor stack; a connecting layer formed in the conductive vias and electrically connected to the second semiconductor layer; a first pad portion electrically connected to the second semiconductor layer; and a second pad portion electrically connected to the first semiconductor layer, wherein a shortest distance between two of the conductive vias is larger than a shortest distance between the first pad portion and the second pad portion.
    Type: Application
    Filed: March 7, 2023
    Publication date: July 27, 2023
    Inventors: Chao-Hsing CHEN, Jia-Kuen WANG, Tzu-Yao TSENG, Tsung-Hsun CHIANG, Bo-Jiun HU, Wen-Hung CHUANG, Yu-Ling LIN
  • Publication number: 20230227669
    Abstract: Provided are an organometallic complex coating solution and a near-infrared absorption film, including an organometallic complex, a phosphorus-containing dispersant, and optical resin. The present disclosure greatly reduces the temperature and time of the film-forming process by formulating components of the organometallic complex coating solution.
    Type: Application
    Filed: January 17, 2023
    Publication date: July 20, 2023
    Inventors: Feng-Ling WU, Shih-Song CHENG, Tang-Hao YANG, Tzu-Ling CHAO, Bo-Xun ZHU, Hsing-Hui LIN, Kuo-Chen LI, Chang-Jun LIN
  • Publication number: 20230223399
    Abstract: A resistor with GaN structures, including a GaN layer with a 2DEG resistor region and an undoped polysilicon resistor region, an AlGaN barrier layer on the GaN layer in the 2DEG resistor region, multiple p-type doped GaN capping layers arranged on the AlGaN barrier layer so that the GaN layer not covered by the p-type doped GaN capping layers in the 2DEG resistor region is converted into a 2DEG resistor, a passivation layer on the GaN layer, and an undoped polysilicon layer on the passivation layer in the undoped polysilicon resistor region and functions as an undoped polysilicon resistor.
    Type: Application
    Filed: March 8, 2023
    Publication date: July 13, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Kuo-Hsing Lee, Sheng-Yuan Hsueh, Chien-Liang Wu, Te-Wei Yeh, Yi-Chun Chen
  • Publication number: 20230223302
    Abstract: A method includes forming a dielectric layer over an epitaxial source/drain region. An opening is formed in the dielectric layer. The opening exposes a portion of the epitaxial source/drain region. A barrier layer is formed on a sidewall and a bottom of the opening. An oxidation process is performing on the sidewall and the bottom of the opening. The oxidation process transforms a portion of the barrier layer into an oxidized barrier layer and transforms a portion of the dielectric layer adjacent to the oxidized barrier layer into a liner layer. The oxidized barrier layer is removed. The opening is filled with a conductive material in a bottom-up manner. The conductive material is in physical contact with the liner layer.
    Type: Application
    Filed: May 13, 2022
    Publication date: July 13, 2023
    Inventors: Pin-Wen Chen, Chang-Ting Chung, Yi-Hsiang Chao, Yu-Ting Wen, Kai-Chieh Yang, Yu-Chen Ko, Peng-Hao Hsu, Ya-Yi Cheng, Min-Hsiu Hung, Chun-Hsien Huang, Wei-Jung Lin, Chih-Wei Chang, Ming-Hsing Tsai
  • Publication number: 20230223400
    Abstract: A resistor-transistor-logic circuit with GaN structures, including a 2DEG resistor having a drain connected with an operating voltage, and a logic FET having a gate connected to an input voltage, a source grounded and a drain connected with a source of the 2DEG resistor and connected collectively to an output voltage.
    Type: Application
    Filed: March 8, 2023
    Publication date: July 13, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Kuo-Hsing Lee, Sheng-Yuan Hsueh, Chien-Liang Wu, Te-Wei Yeh, Yi-Chun Chen
  • Publication number: 20230215998
    Abstract: A light-emitting device includes a semiconductor stack, first and second insulative layers, a reflective conductive structure, and first and second pads. The semiconductor stack includes a first semiconductor layer, and a mesa having an active region having a second semiconductor layer and formed on the first semiconductor layer. The first insulative layer is formed on the semiconductor stack and has first openings. The reflective conductive structure is formed on the first insulative layer and is electrically connected to the second semiconductor layer through the first openings. The second insulative layer is formed on the reflective conductive structure and includes second openings and a contact area covering portions overlapped with the first and second openings. A first pad is formed on the second insulative layer and electrically connected to the first semiconductor layer. A second pad formed on the second insulative layer and electrically connected to the second semiconductor layer.
    Type: Application
    Filed: December 28, 2022
    Publication date: July 6, 2023
    Inventors: Chao-Hsing CHEN, Meng-Hsiang HONG, Chi-Shiang HSU, Yen-Liang KUO, Chien-Ya HUNG, Yong-Yang CHEN, Yu-Ling LIN, Xue-Cheng YAO