Patents by Inventor Hsing Cheng
Hsing Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20180026078Abstract: An electronic device package includes a carrying board, an electronic device, a first insulating layer, and a barrier layer. The carrying board includes a central area, an inner edge area, and an outer edge area. The inner edge area is located between the central area and the outer edge area. The electronic device is located in the central area. The first insulating layer is located on the carrying board and overlapped with the electronic device and extends from the central area to the inner edge area. The barrier layer is located on the carrying board. Here, the barrier layer includes a sidewall contact portion and an extending portion. The sidewall contact portion surrounds a side surface of the first insulating layer, and the extending portion extends from the sidewall contact portion to the outer edge area in a direction away from the first insulating layer.Type: ApplicationFiled: May 23, 2017Publication date: January 25, 2018Applicant: E Ink Holdings Inc.Inventors: Kuo-Yen Chang, Chia-Chun Yeh, Kuo-Hsing Cheng, Hsing-Yi Wu
-
Publication number: 20160099306Abstract: A monolithic merged PIN Schottky (MPS) diode including a chip, at least one PIN diode, at least one Schottky diode and a termination structure is provided. The chip has a first active area, a second active area and a termination area. The PIN diode is disposed in the first active area. The Schottky diode is disposed in the second active area. The termination structure is disposed in the termination area. The first active area and the second active area are separated by the termination area. The PIN diode and the Schottky diode share the termination structure.Type: ApplicationFiled: June 4, 2015Publication date: April 7, 2016Inventor: Chien-Hsing Cheng
-
Publication number: 20160011697Abstract: A capacitive touch panel and a display device using the capacitive touch panel are provided. The capacitive touch panel includes a first electrode layer, a second electrode layer, and a dielectric layer disposed between two layers. The first electrode layer has a plurality of first A electrode strings and first B electrode strings extended along a first direction. The first A electrode string and the first B electrode string respectively has a plurality of first direction electrodes. The second electrode layer has a plurality of second direction electrodes connected in series along a second direction. The first A and B electrode strings are disconnected in the first electrode layer while they are simultaneously detected for presence of signal variation.Type: ApplicationFiled: September 21, 2015Publication date: January 14, 2016Inventors: Tun-Chun Yang, Seok-Lyul Lee, Chih-Jen Hu, Kuo-Hsing Cheng, Yao-Jen Hsieh, Mei-Sheng Ma, Hsin-Hung Lee, Yuan-Chun Wu, Chun-Huai Li
-
Patent number: 9202426Abstract: A driving method of a display unit includes: executing a first display procedure, for displaying a first frame on a display unit of the display driving circuit, and executing a counting mechanism; determining, if a second display procedure for displaying a second frame on the display unit is confirmed to be executed, whether or not a counting value of the counting mechanism is larger than a predetermined value; sequentially executing a specific display procedure and the second display procedure if the counting value is larger than the predetermined value; and directly executing the second display procedure if the counting value is equal to or smaller than the predetermined value. A display driving circuit applicable to be used by the display unit is also provided.Type: GrantFiled: September 13, 2012Date of Patent: December 1, 2015Assignee: AU OPTRONICS CORP.Inventors: Feng-Sheng Lin, Chun-Chi Lai, Kuo-Hsing Cheng
-
Patent number: 9166582Abstract: A capacitive touch panel and a display device using the capacitive touch panel are provided. The capacitive touch panel includes a first electrode layer, a second electrode layer, and a dielectric layer disposed between two layers. The first electrode layer has a plurality of first A electrode strings and first B electrode strings extended along a first direction. The first A electrode string and the first B electrode string respectively has a plurality of first direction electrodes. The second electrode layer has a plurality of second direction electrodes connected in series along a second direction. The first A and B electrode strings are disconnected in the first electrode layer while they are simultaneously detected for presence of signal variation.Type: GrantFiled: September 29, 2008Date of Patent: October 20, 2015Assignee: AU OPTRONICS CORPORATIONInventors: Tun-Chun Yang, Seok-Lyul Lee, Chih-Jen Hu, Kuo-Hsing Cheng, Yao-Jen Hsieh, Mei-Sheng Ma, Hsin-Hung Lee, Yuan-Chun Wu, Chun-Huai Li
-
Patent number: 9153182Abstract: An electrophoretic display includes an electrophoretic panel, a timing control circuit, a source driver, a gate driver, and a gate line enable circuit. The timing control circuit generates a timing control signal corresponding to a refresh area of a frame according to the refresh area. The gate driver generates output enable signals corresponding to the refresh area according to the timing control signal, and the gate line enable circuit transmits scan signals of first gate lines corresponding to the refresh area to second gate lines corresponding to the refresh area according to the enabled output enable signals. The source driver drives data lines corresponding to the refresh area according to the timing control signal to charge/discharge pixels corresponding to the refresh area.Type: GrantFiled: March 5, 2015Date of Patent: October 6, 2015Assignee: AU Optronics Corp.Inventors: Kuo-Cheng Hsu, Che-Chia Hsu, Pei-Yu Chen, Kuo-Hsing Cheng
-
Patent number: 9085768Abstract: In this study, we used a wound-inducible promoter of the broccoli (Brassica oleracea var. italica) GLUCOSE INHIBITION of ROOT ELONGATION1 (GIR1) gene fused to ?-glucuronidase (GUS, pBoGIR1::GUS) as a selectable marker. Transgenic broccoli plants expressing pBoGIR1::GUS appear blue in planta at wounded regions after GUS staining for 30 min. Similarly, the blue color is visible in transgenic Arabidopsis and rice plants expressing pBoGIR1::GUS at wounded areas after GUS staining for 2 h, indicating that this promoter is wound-inducible in both dicots and monocots. GUS staining is very rapid and the partial wounding in this study is a nondestructive method that does not affect further plant growth and development. Thus, pBoGIR1::GUS could serve as an effective substitute for antibiotic- and herbicide-resistance genes in the generation of genetically modified crops.Type: GrantFiled: August 10, 2012Date of Patent: July 21, 2015Assignee: Academia SinicaInventors: Wan-Hsing Cheng, Ming-Hau Chiang, Ya-Huei Chen, Hwei-Ling Shen
-
Publication number: 20150179109Abstract: An electrophoretic display includes an electrophoretic panel, a timing control circuit, a source driver, a gate driver, and a gate line enable circuit. The timing control circuit generates a timing control signal corresponding to a refresh area of a frame according to the refresh area. The gate driver generates output enable signals corresponding to the refresh area according to the timing control signal, and the gate line enable circuit transmits scan signals of first gate lines corresponding to the refresh area to second gate lines corresponding to the refresh area according to the enabled output enable signals. The source driver drives data lines corresponding to the refresh area according to the timing control signal to charge/discharge pixels corresponding to the refresh area.Type: ApplicationFiled: March 5, 2015Publication date: June 25, 2015Inventors: Kuo-Cheng Hsu, Che-Chia Hsu, Pei-Yu Chen, Kuo-Hsing Cheng
-
Patent number: 9057919Abstract: An LCD panel transmits the display data to sub-pixels in a zigzag pattern through a data line. The variation of the feed-through voltages of the sub-pixels may be modified by adjusting the ratios of the channel widths and the channel lengths of the TFTs in the sub-pixels to some predetermined ratios, or by adjusting the compensation capacitance to the coupling capacitance of the TFTs of the sub-pixels.Type: GrantFiled: June 26, 2013Date of Patent: June 16, 2015Assignee: AU Optronics Corp.Inventors: Chun-Chi Lai, Ching-Wei Chen, Tsan-Chun Wang, Kuo-Hsing Cheng, Yu-Cheng Chen
-
Patent number: 9058076Abstract: The present invention provides a touch panel used in a display device. The touch panel of the present invention is configured to display images and to receive as well as to process instructions inputted by user's touches. A display substrate partially overlaps with an image driving circuit substrate of the touch panel. A touch sensing circuit is disposed on the inner side of the display substrate. A touch sensing processor is disposed on the inner side of a touch sensing circuit and is also electrically coupled to the touch sensing circuit. Consequently, the thickness of the touch panel as well as the overall thickness of the display device is reduced.Type: GrantFiled: June 27, 2014Date of Patent: June 16, 2015Assignee: AU OPTRONICS CORPORATIONInventors: Martinus Tony Wijaya, Mei-Sheng Ma, Yuan-Chun Wu, Hsin-Hung Lee, Kuo-Hsing Cheng, Han Ping Kuo
-
Publication number: 20150137697Abstract: An integrated light source driving circuit including a power transistor, a driving chip and a diode and a light source module using the same are provided. The power transistor includes a substrate, first and second active regions, a gate region and an isolation region. The first and second active regions are disposed on two opposite sides of the substrate. The second active region and the gate region are disposed on the same side of the substrate. The isolation region is electrically connected to the first active region and electrically independent with/from the second active region and the gate region. The driving chip is stacked on the second active region and electrically connected to the gate region. The diode is disposed in the isolation region of the power transistor, where an anode of the diode is disposed toward the isolation region to be electrically connected to the first active region.Type: ApplicationFiled: July 3, 2014Publication date: May 21, 2015Inventor: Chien-Hsing Cheng
-
Patent number: 9030434Abstract: A touch display panel includes a display panel and a touch sensing unit. The touch sensing unit includes first sensing series, and second sensing series. Each of the first sensing series includes a plurality of first transparent sensing pads and a plurality of non-transparent bridge lines disposed along a first direction. Each of the non-transparent bridge lines is disposed between two adjacent first transparent sensing pads, overlapping with two adjacent first transparent sensing pads, and electrically connected to two adjacent first transparent sensing pads. The line width of each non-transparent bridge line is substantially between 0.5 micrometers and 10 micrometers, and the reduction of aperture ratio in a pixel region of the touch display panel caused by the non-transparent bridge lines is substantially between 0.1% and 5%. Each non-transparent bridge line and the long axis of each sub-pixel region are disposed in a non-parallel manner with each other.Type: GrantFiled: September 17, 2013Date of Patent: May 12, 2015Assignee: AU Optronics Corp.Inventors: Hsin-Hung Lee, Pei-Yu Chen, Yu-Mei Chiu, Wei-Jen Chang, Yu-Chuan Lin, Kuo-Hsing Cheng
-
Patent number: 9024693Abstract: A crystal-less clock generator (CLCG) and an operation method thereof are provided. The CLCG includes a first oscillation circuit, a second oscillation circuit, and a control circuit. The first oscillation circuit is controlled by a control signal for generating an output clock signal of the CLCG. The second oscillation circuit generates a reference clock signal. The control circuit is coupled to the first oscillation circuit for receiving the output clock signal and coupled to the second oscillation circuit for receiving the reference clock signal. The control circuit is used to generate the control signal for the first oscillation circuit according to the relationship between the output clock signal and the reference clock signal.Type: GrantFiled: September 13, 2013Date of Patent: May 5, 2015Assignee: Industrial Technology Research InstituteInventors: Jen-Chieh Liu, Chi-Yang Chang, Yo-Hao Tu, Kuo-Hsing Cheng
-
Patent number: 9001026Abstract: An electrophoretic display includes an electrophoretic panel, a timing control circuit, a source driver, a gate driver, and a gate line enable circuit. The timing control circuit generates a timing control signal corresponding to a refresh area of a frame according to the refresh area. The gate driver generates output enable signals corresponding to the refresh area according to the timing control signal, and the gate line enable circuit transmits scan signals of first gate lines corresponding to the refresh area to second gate lines corresponding to the refresh area according to the enabled output enable signals. The source driver drives data lines corresponding to the refresh area according to the timing control signal to charge/discharge pixels corresponding to the refresh area.Type: GrantFiled: March 25, 2012Date of Patent: April 7, 2015Assignee: AU Optronics Corp.Inventors: Kuo-Cheng Hsu, Che-Chia Hsu, Pei-Yu Chen, Kuo-Hsing Cheng
-
Patent number: 8970473Abstract: A bistable display and a method of driving a panel thereof are provided. The bistable display includes a bistable display panel and a driving device. The bistable display panel at least has a first pixel and a second pixel, and these two pixels share a data line. The driving device is coupled to the bistable display panel, and used for providing different source driving waveforms to the first pixel and the second pixel respectively.Type: GrantFiled: October 7, 2011Date of Patent: March 3, 2015Assignee: Au Optronics CorporationInventors: Kuo-Cheng Hsu, Kuan-Yi Lien, Pei-Yu Chen, Mei-Sheng Ma, Kuo-Hsing Cheng
-
Publication number: 20150037644Abstract: A mounting seat of a battery storage module can include a base seat, a blocking member coupled to the base seat, a pair of guiding rails coupled to the base seat, and a pair of conducting assemblies coupled to the blocking member. The base seat can include a bottom plate. The bottom plate can include at least one fixing portion at a first edge. The at least one fixing portion can be capable of engaging with the at least one mounting member to position a sliding base. The blocking member can be mounted at a second edge of the bottom plate opposite to the first edge. The pair of guiding rails fixed on opposite sides of the bottom plate. The pair of conducting assemblies can be capable of connecting a storage battery.Type: ApplicationFiled: October 20, 2014Publication date: February 5, 2015Inventors: CHANG-LUN TAI, CHEN-HSING CHENG
-
Publication number: 20140361840Abstract: A crystal-less clock generator (CLCG) and an operation method thereof are provided. The CLCG includes a first oscillation circuit, a second oscillation circuit, and a control circuit. The first oscillation circuit is controlled by a control signal for generating an output clock signal of the CLCG. The second oscillation circuit generates a reference clock signal. The control circuit is coupled to the first oscillation circuit for receiving the output clock signal and coupled to the second oscillation circuit for receiving the reference clock signal. The control circuit is used to generate the control signal for the first oscillation circuit according to the relationship between the output clock signal and the reference clock signal.Type: ApplicationFiled: September 13, 2013Publication date: December 11, 2014Applicant: Industrial Technology Research InstituteInventors: Jen-Chieh Liu, Chi-Yang Chang, Yo-Hao Tu, Kuo-Hsing Cheng
-
Publication number: 20140353747Abstract: A trench gate MOSFET is provided. An N-type epitaxial layer is disposed on an N-type substrate. An N-type source region is disposed in the N-type epitaxial layer. The N-type epitaxial layer has at least one trench therein. An insulating layer serving as a gate insulating layer is disposed in the trench. A conductive layer serving as a gate fills up the trench. Two isolation structures are disposed in the N-type source region beside the trench and contact the trench. Two conductive plugs are disposed in the N-type epitaxial layer beside the trench and penetrate through the N-type source region. A dielectric layer is disposed on the N-type epitaxial layer. A metal layer is disposed on the dielectric layer and electrically connected to the N-type source region.Type: ApplicationFiled: February 26, 2014Publication date: December 4, 2014Applicant: BEYOND INNOVATION TECHNOLOGY CO., LTD.Inventor: Chien-Hsing Cheng
-
Patent number: 8889280Abstract: A battery storage module and a mounting seat for the battery storage module are disclosed. The battery storage module includes a sliding base and a storage battery. The sliding base includes a container, a plurality of wheels, a pair of conducting members and at least one mounting member. The container has a first end and a second end opposite to the first end, the plurality of wheels are mounted on the container, the pair of conducting members are mounted on the first end of the container, and the at least one mounting member is mounted on the second end of the container. The storage battery is received in the container and electrically connected to the pair of conducting members.Type: GrantFiled: November 24, 2011Date of Patent: November 18, 2014Assignee: Hon Hai Precision Industry Co., Ltd.Inventors: Chang-Lun Tai, Chen-Hsing Cheng
-
Patent number: D749660Type: GrantFiled: September 3, 2014Date of Patent: February 16, 2016Assignee: VIVOTEK INC.Inventors: Chang-Chung Yu, Szu-Hsing Cheng