Patents by Inventor Hsing Hung Hsieh

Hsing Hung Hsieh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8648337
    Abstract: A stratified organic light-emitting diode structure includes a thin-film transistor and an organic light-emitting diode (OLED). The OLED is fabricated on a planarization layer that has a top surface substantially parallel to the substrate, and the layers in the organic light-emitting diode (OLED) are substantially parallel to each other. The major part of each OLED layer has a uniform thickness so that the OLED produces a uniform brightness. The planarization layer covers the thin-film transistor entirely and the planarization layer on top of the thin-film transistor is also covered by an insulation layer. In order to electrically connect the top electrode of the OLED to the drain terminal of the thin-film transistor, an opening is made through both the top insulating layer and the planarization layer to expose part of the drain terminal. Spacers with uniform height are fabricated on the top insulating layer to protect the pixel structure.
    Type: Grant
    Filed: April 3, 2012
    Date of Patent: February 11, 2014
    Assignee: AU Optronics Corporation
    Inventor: Hsing-Hung Hsieh
  • Patent number: 8604471
    Abstract: A semiconductor structure and an organic electroluminescence device applying the same are provided. A gate insulating layer covers a gate electrode disposed on a substrate. A channel layer has a channel length L along a channel direction and has a first side and a second side opposite to the first side. The channel layer is located on the gate insulating layer over the gate electrode. A source electrode and a drain electrode are located at and electrically connected to the first side and the second side of the channel layer, respectively. A conductive light-shielding pattern layer is disposed on a dielectric layer covering the source electrode, the drain electrode and the channel layer, and is overlapped to a portion of the source electrode and a portion of the channel layer in a vertical projection. The conductive light-shielding pattern layer and the channel layer have an overlapping length d1, and 0.3?d1/L?0.85.
    Type: Grant
    Filed: August 12, 2011
    Date of Patent: December 10, 2013
    Assignee: Au Optronics Corporation
    Inventors: Chih-Pang Chang, Hsing-Hung Hsieh
  • Publication number: 20130270556
    Abstract: An active device and a fabricating method thereof are provided. The active device includes a buffer layer, a channel, a gate, a gate insulation layer, a source and a drain. The buffer layer is disposed on a substrate and has a positioning region. A thickness of a portion of the buffer layer in the positioning region is greater than a thickness of a portion of the buffer layer outside the positioning region. The channel is disposed on the buffer layer and in the positioning region. The gate is disposed above the channel. The gate insulation layer is disposed between the channel and the gate. The source and the drain are disposed above the channel and electrically connected to the channel.
    Type: Application
    Filed: May 2, 2013
    Publication date: October 17, 2013
    Applicant: Au Optronics Corporation
    Inventors: Chih-Pang Chang, Hsing-Hung Hsieh
  • Publication number: 20130270546
    Abstract: An active device and a fabricating method thereof are provided. The active device includes a buffer layer, a channel, a gate, a gate insulation layer, a source and a drain. The buffer layer is disposed on a substrate and has a positioning region. A thickness of a portion of the buffer layer in the positioning region is greater than a thickness of a portion of the buffer layer outside the positioning region. The channel is disposed on the buffer layer and in the positioning region. The gate is disposed above the channel. The gate insulation layer is disposed between the channel and the gate. The source and the drain are disposed above the channel and electrically connected to the channel.
    Type: Application
    Filed: June 25, 2012
    Publication date: October 17, 2013
    Applicant: AU OPTRONICS CORPORATION
    Inventors: Chih-Pang Chang, Hsing-Hung Hsieh
  • Publication number: 20130256703
    Abstract: A stratified organic light-emitting diode structure includes a thin-film transistor and an organic light-emitting diode (OLED). The OLED is fabricated on a planarization layer that has a top surface substantially parallel to the substrate, and the layers in the organic light-emitting diode (OLED) are substantially parallel to each other. The major part of each OLED layer has a uniform thickness so that the OLED produces a uniform brightness. The planarization layer covers the thin-film transistor entirely and the planarization layer on top of the thin-film transistor is also covered by an insulation layer. In order to electrically connect the top electrode of the OLED to the drain terminal of the thin-film transistor, an opening is made through both the top insulating layer and the planarization layer to expose part of the drain terminal. Spacers with uniform height are fabricated on the top insulating layer to protect the pixel structure.
    Type: Application
    Filed: April 3, 2012
    Publication date: October 3, 2013
    Applicant: AU OPTRONICS CORPORATION
    Inventor: Hsing-Hung Hsieh
  • Patent number: 8470624
    Abstract: A fabricating method of an organic electroluminescent display unit is provided. A gate and a gate insulating layer covering the gate are formed on the substrate. A patterned metal-oxide layer with an etching stop layer thereon is formed on the gate insulating layer. A surface treatment is performed on the patterned metal-oxide layer with use of the etching stop layer as a mask, such that a portion of the patterned metal-oxide layer uncovered by the etching stop layer has greater conductivity than conductivity of another portion of the patterned metal-oxide layer covered by the etching stop layer. The patterned metal-oxide layer treated by the surface treatment includes a pixel electrode and an active layer located above the gate. A source and a drain are then formed. And then, an organic electro-luminescence layer and a top electrode are sequentially formed on the pixel electrode.
    Type: Grant
    Filed: September 4, 2012
    Date of Patent: June 25, 2013
    Assignee: Au Optronics Corporation
    Inventors: Chang-Ken Chen, Hsing-Hung Hsieh
  • Publication number: 20130049640
    Abstract: A mirror electroluminescent display panel includes an array substrate, a plurality of driving devices, a plurality of electroluminescent devices, and a cover substrate. The driving devices and the electroluminescent devices are disposed on the array substrate. Each electroluminescent device includes a first electrode electrically connected to the corresponding driving device, a light-emitting layer disposed on the first electrode, and a second electrode disposed on the light-emitting layer. The cover substrate and the array substrate are disposed oppositely. The cover substrate has a plurality of transmission regions, and a reflection region disposed between adjacent transmission regions, and each of the transmission regions is corresponding to each of the light-emitting layers, respectively.
    Type: Application
    Filed: May 29, 2012
    Publication date: February 28, 2013
    Inventors: Tzu-Yin Kuo, Hsing-Hung Hsieh
  • Publication number: 20130015448
    Abstract: A semiconductor device, disposed on a substrate, includes a first channel layer, a patterned doped layer, a gate insulating layer, a conducting gate electrode, a second channel layer, a first electrode and a second electrode, and a third electrode and a fourth electrode. The first channel layer is disposed on the substrate and in a first region. The patterned doped layer includes a doped gate electrode disposed in a second region, and two contact electrodes electrically connected to two sides of the first channel layer, respectively. The conducting gate electrode is disposed on the gate insulating layer in the first region. The second channel layer is disposed on the gate insulating layer in the second region. The first electrode and the second electrode are electrically connected to the contact electrodes, respectively. The third electrode and the fourth electrode are electrically connected to two sides of the second channel layer, respectively.
    Type: Application
    Filed: March 19, 2012
    Publication date: January 17, 2013
    Inventors: Chao-Shun Yang, Hsing-Hung Hsieh
  • Publication number: 20130017497
    Abstract: The present disclosure relates to methods and systems for synthesis of bridged-hydropentacene, hydroanthracene and hydrotetracene from the precursor compounds pentacene derivatives, tetracene derivatives, and anthracene derivatives. The invention further relates to methods and systems for forming thin films for use in electrically conductive assemblies, such as semiconductors or photovoltaic devices.
    Type: Application
    Filed: July 2, 2012
    Publication date: January 17, 2013
    Applicant: ACADEMIA SINICA
    Inventors: Tahsin J. CHOW, Chung-Chih WU, Ta-Hsien CHUANG, Hsing-Hung HSIEH, Hsin-Hui HUANG
  • Publication number: 20120329189
    Abstract: A fabricating method of an organic electroluminescent display unit is provided. A gate and a gate insulating layer covering the gate are formed on the substrate. A patterned metal-oxide layer with an etching stop layer thereon is formed on the gate insulating layer. A surface treatment is performed on the patterned metal-oxide layer with use of the etching stop layer as a mask, such that a portion of the patterned metal-oxide layer uncovered by the etching stop layer has greater conductivity than conductivity of another portion of the patterned metal-oxide layer covered by the etching stop layer. The patterned metal-oxide layer treated by the surface treatment includes a pixel electrode and an active layer located above the gate. A source and a drain are then formed. And then, an organic electro-luminescence layer and a top electrode are sequentially formed on the pixel electrode.
    Type: Application
    Filed: September 4, 2012
    Publication date: December 27, 2012
    Applicant: Au Optronics Corporation
    Inventors: Chang-Ken Chen, Hsing-Hung Hsieh
  • Publication number: 20120298983
    Abstract: A semiconductor structure and an organic electroluminescence device applying the same are provided. A gate insulating layer covers a gate electrode disposed on a substrate. A channel layer has a channel length L along a channel direction and has a first side and a second side opposite to the first side. The channel layer is located on the gate insulating layer over the gate electrode. A source electrode and a drain electrode are located at and electrically connected to the first side and the second side of the channel layer, respectively. A conductive light-shielding pattern layer is disposed on a dielectric layer covering the source electrode, the drain electrode and the channel layer, and is overlapped to a portion of the source electrode and a portion of the channel layer in a vertical projection. The conductive light-shielding pattern layer and the channel layer have an overlapping length d1, and 0.3?d1/L?0.85.
    Type: Application
    Filed: August 12, 2011
    Publication date: November 29, 2012
    Applicant: AU OPTRONICS CORPORATION
    Inventors: Chih-Pang Chang, Hsing-Hung Hsieh
  • Patent number: 8299460
    Abstract: A pixel structure is disposed on a substrate and includes a gate, a gate insulating layer, a patterned metal-oxide layer, an etching stop layer, a source, and a drain. The gate is disposed on the substrate. The gate insulating layer is disposed on the substrate to cover the gate. The patterned metal-oxide layer is disposed on the gate insulating layer and includes an active layer located above the gate and a pixel electrode. The etching stop layer is disposed on a portion of the active layer. Conductivity of a portion of the patterned metal-oxide layer uncovered by the etching stop layer is greater than conductivity of a portion of the patterned metal-oxide layer covered by the etching stop layer. The source and the drain are electrically connected to a portion of the active layer uncovered by the etching stop layer. The drain is electrically connected to the pixel electrode.
    Type: Grant
    Filed: October 21, 2009
    Date of Patent: October 30, 2012
    Assignee: Au Optronics Corporation
    Inventors: Chang-Ken Chen, Hsing-Hung Hsieh
  • Patent number: 8277903
    Abstract: The present disclosure relates to methods and systems for synthesis of bridged-hydropentacene, hydroanthracene and hydrotetracene from the precursor compounds pentacene derivatives, tetracene derivatives, and anthracene derivatives. The invention further relates to are methods and systems for forming thin films for use in electrically conductive assemblies, such as semiconductors or photovoltaic devices.
    Type: Grant
    Filed: March 2, 2009
    Date of Patent: October 2, 2012
    Assignee: Academia Sinica
    Inventors: Tahsin J. Chow, Chung-Chih Wu, Ta-Hsien Chuang, Hsing-Hung Hsieh, Hsin-Hui Huang
  • Publication number: 20120162271
    Abstract: A pixel structure of active matrix organic electroluminescent display panel includes a first light emitting device, a first driving switching device electrically connected to the first light emitting device for driving the first light emitting device, a second light emitting device, a second driving switching device electrically connected to the second light emitting device for driving the second light emitting device, and at least one addressing switching device electrically connected to at least one of the first driving switching device and the second driving switching device.
    Type: Application
    Filed: March 16, 2011
    Publication date: June 28, 2012
    Inventor: Hsing-Hung Hsieh
  • Publication number: 20110248245
    Abstract: A pixel structure of an organic light emitting diode display includes a first transistor and a second transistor. The first transistor includes a first drain electrode and a first source electrode. When a voltage difference is provided between the first drain electrode and the first source electrode, the first transistor has a first subthreshold slope (SS). The second transistor includes a second drain electrode and a second source electrode. When the voltage difference is provided between the second drain electrode and the second source electrode, the second transistor has a second SS, and the second SS is larger than the first SS.
    Type: Application
    Filed: January 19, 2011
    Publication date: October 13, 2011
    Inventor: Hsing-Hung Hsieh
  • Publication number: 20110240986
    Abstract: A pixel structure of an electroluminescent display panel includes a substrate, a first patterned conductive layer, an insulating layer, a second patterned conductive layer, an active layer, a first passivation layer and an electroluminescent device. The first patterned conductive layer includes a gate. The insulating layer, disposed on the substrate and the first patterned conductive layer, has at least a first contact hole partially exposing the gate. The second patterned conductive layer, disposed on the insulating layer, includes a first source, a first drain, and a second drain, where the second drain is electrically connected to the gate through the first contact hole of the insulating layer.
    Type: Application
    Filed: September 3, 2010
    Publication date: October 6, 2011
    Inventors: Tsung-Ting Tsai, Hsing-Hung Hsieh
  • Publication number: 20110017989
    Abstract: A pixel structure is disposed on a substrate and includes a gate, a gate insulating layer, a patterned metal-oxide layer, an etching stop layer, a source, and a drain. The gate is disposed on the substrate. The gate insulating layer is disposed on the substrate to cover the gate. The patterned metal-oxide layer is disposed on the gate insulating layer and includes an active layer located above the gate and a pixel electrode. The etching stop layer is disposed on a portion of the active layer. Conductivity of a portion of the patterned metal-oxide layer uncovered by the etching stop layer is greater than conductivity of a portion of the patterned metal-oxide layer covered by the etching stop layer. The source and the drain are electrically connected to a portion of the active layer uncovered by the etching stop layer. The drain is electrically connected to the pixel electrode.
    Type: Application
    Filed: October 21, 2009
    Publication date: January 27, 2011
    Applicant: AU OPTRONICS CORPORATION
    Inventors: Chang-Ken Chen, Hsing-Hung Hsieh
  • Publication number: 20090226634
    Abstract: Methods for synthesizing 1,4-(ketone or ketal) bridged and/or 5,14-(ketone or ketal) bridged hydropentacenes useful as soluble precursors for formation of pentacene or substituted (e.g., halo) pentacenes; precursor compounds formed thereby; methods for preparing form the precursor compounds conductive thin films comprising pentacene or a substituted pentacene, and articles including such thin films are described. Also described are tetracene and anthracene derivatives which should also be useful in the formation of conductive thin films, among other uses.
    Type: Application
    Filed: March 2, 2009
    Publication date: September 10, 2009
    Applicant: ACADEMIA SINICA
    Inventors: Tahsin J. CHOW, Chung-Chih WU, Ta-Hsien CHUANG, Hsing-Hung HSIEH, Hsin-Hui HUANG
  • Patent number: 6905977
    Abstract: The present invention discloses a method of improving an electroluminescent efficiency of a MOS device by etching a semiconductor substrate thereof. A chemical etching process is performed to remove surface states or surface defects located on the surface of a silicon substrate before a nanoparticle layer and a conducting layer is formed on the silicon substrate, in order that the non-radiative electron-hole recombination centers located on the surface of silicon substrate is suppressed. Accordingly, the percentage of radiative electron-hole recombination is heightened and the electroluminescent efficiency of a MOS light emitting device is drastically enhanced. Advantageously, the chemical etching step is able to create a nanostructure on the surface of the silicon substrate to increase the probability of the collision of electron-hole pairs and phonons, and the electroluminescent efficiency of a MOS light emitting device is improved as well.
    Type: Grant
    Filed: March 26, 2003
    Date of Patent: June 14, 2005
    Assignee: National Taiwan University
    Inventors: Ching Fuh Lin, Wu Ping Huang, Hsing Hung Hsieh, Eih Zhe Liang
  • Publication number: 20040188694
    Abstract: The present invention discloses a method of improving an electroluminescent efficiency of a MOS device by etching a semiconductor substrate thereof. A chemical etching process is performed to remove surface states or surface defects located on the surface of a silicon substrate before a nanoparticle layer and a conducting layer is formed on the silicon substrate, in order that the non-radiative electron-hole recombination centers located on the surface of silicon substrate is suppressed. Accordingly, the percentage of radiative electron-hole recombination is heightened and the electroluminescent efficiency of a MOS light emitting device is drastically enhanced. Advantageously, the chemical etching step is able to create a nanostructure on the surface of the silicon substrate to increase the probability of the collision of electron-hole pairs and phonons, and the electroluminescent efficiency of a MOS light emitting device is improved as well.
    Type: Application
    Filed: March 26, 2003
    Publication date: September 30, 2004
    Inventors: Ching Fuh Lin, Wu Ping Huang, Hsing Hung Hsieh, Eih Zhe Liang