Patents by Inventor Hsu-Nan FANG
Hsu-Nan FANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20210043604Abstract: A semiconductor package structure includes a substrate, a first semiconductor die, a first dielectric, a second semiconductor die, and a second dielectric. The substrate has a first surface. The first semiconductor die is disposed on the first surface. The first dielectric encapsulates the first semiconductor die. The second semiconductor die is disposed on the first surface and adjacent to the first semiconductor die. The second dielectric encapsulates the second semiconductor die. The first dielectric is in contact with the second dielectric. An average filler size in the first dielectric is substantially greater than an average filler size in the second dielectric.Type: ApplicationFiled: August 6, 2019Publication date: February 11, 2021Applicant: Advanced Semiconductor Engineering, Inc.Inventor: Hsu-Nan FANG
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Patent number: 10886223Abstract: A semiconductor package includes a redistribution layer (RDL) structure, a first die, a molding compound and an interconnect structure. The first die is disposed on the RDL structure. The molding compound is disposed on the RDL structure. The interconnect structure electrically connects the first die to the RDL structure.Type: GrantFiled: June 3, 2019Date of Patent: January 5, 2021Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Chun-Jun Zhuang, Hsu-Nan Fang
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Publication number: 20200402958Abstract: A semiconductor device package includes a redistribution layer, a first semiconductor device, a second semiconductor device, a first insulation body, and a second insulation body. The first semiconductor device can be disposed on the redistribution layer. The second semiconductor device can be stacked on the first semiconductor device. The first insulation body can be disposed between the first semiconductor device and the second semiconductor device. The first insulation body may have a number of first particles. The second insulation body can encapsulate the first insulation body and have a number of second particles. One of the number of first particles can have a flat surface.Type: ApplicationFiled: June 20, 2019Publication date: December 24, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Hsu-Nan FANG, Chen Yuan WENG
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Publication number: 20200388928Abstract: A semiconductor device package includes a substrate, a first molding compound and antenna layer. The substrate has a first surface and a second surface opposite to the first surface. The first molding compound is disposed on the first surface of the substrate. The antenna layer is disposed on the first molding compound. The substrate, the first molding compound and the antenna layer define a cavity.Type: ApplicationFiled: June 5, 2019Publication date: December 10, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Cheng-Nan LIN, Hsu-Nan FANG
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Publication number: 20200381359Abstract: A semiconductor package includes a redistribution layer (RDL) structure, a first die, a molding compound and an interconnect structure. The first die is disposed on the RDL structure. The molding compound is disposed on the RDL structure. The interconnect structure electrically connects the first die to the RDL structure.Type: ApplicationFiled: June 3, 2019Publication date: December 3, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Chun-Jun ZHUANG, Hsu-Nan FANG
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Patent number: 10804172Abstract: A semiconductor package device includes a substrate, an electronic component, a ring frame, an encapsulant, a thermal conducting material and a lid. The electronic component is disposed on the substrate. The ring frame is disposed on the substrate and surrounds the electronic component. The encapsulant encapsulates the electronic component and a first portion of the ring frame. The encapsulant exposes a second portion of the ring frame. The encapsulant and the second portion of the ring frame define a space. The thermal conducting material is disposed in the space. The lid is disposed on the thermal conducting material and connects with the second portion of the ring frame.Type: GrantFiled: December 10, 2018Date of Patent: October 13, 2020Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventor: Hsu-Nan Fang
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Patent number: 10797019Abstract: A semiconductor package structure includes at least one semiconductor die, at least one conductive pillar, an encapsulant and a circuit structure. The semiconductor die has an active surface. The conductive pillar is disposed adjacent to the active surface of the semiconductor die. The encapsulant covers the semiconductor die and the conductive pillar. The encapsulant defines at least one groove adjacent to and surrounding the conductive pillar. The circuit structure is electrically connected to the conductive pillar.Type: GrantFiled: August 22, 2017Date of Patent: October 6, 2020Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Hsu-Nan Fang, Chun-Jun Zhuang
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Patent number: 10797022Abstract: A semiconductor device package includes a first redistribution layer (RDL), a first die, a second die, a second RDL and an encapsulant. The first die is disposed on the first RDL and is electrically connected to the first RDL. The first die has a first electrical contact. The second die is disposed on the first RDL and is electrically connected to the first RDL. The second die has a first electrical contact. The second RDL is surrounded by the first RDL. The second RDL has a first electrical contact electrically connected to the first electrical contact of the first die and a second electrical contact electrically connected to the first electrical contact of the second die. A size of the first electrical contact of the second RDL is greater than a size of the second electrical contact of the second RDL.Type: GrantFiled: October 4, 2018Date of Patent: October 6, 2020Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Hsu-Nan Fang, Chun-Jun Zhuang, Yung I. Yeh, Ming-Chiang Lee
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Publication number: 20200219845Abstract: A semiconductor package structure includes a conductive trace layer, a semiconductor die over the conductive trace layer, a structure enhancement layer surrounding the semiconductor die, and an encapsulant covering the semiconductor die and the structure enhancement layer. The structure enhancement layer coincides with a mass center plane of the semiconductor package structure. The mass center plane is parallel to a top surface of the semiconductor die. A method for manufacturing the semiconductor package structure is also provided.Type: ApplicationFiled: January 7, 2019Publication date: July 9, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Hsiu-Chi LIU, Hsu-Nan FANG
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Publication number: 20200212005Abstract: A semiconductor package device includes a circuit layer, a first set of stacked components, a first conductive wire, a space and an electronic component. The first set of stacked components is disposed on the circuit layer. The first conductive wire electrically connects the first set of stacked components. The space is defined between the first set of stacked components and the circuit layer. The space accommodates the first conductive wire. The electronic component is disposed in the space.Type: ApplicationFiled: December 26, 2018Publication date: July 2, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Hsu-Nan FANG, Jen-Hsien WONG
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Publication number: 20200194383Abstract: A semiconductor package includes a semiconductor die, a plurality of conductive bumps, a shielding layer, an encapsulant and a redistribution layer. The semiconductor die has an active surface, a backside surface and a lateral surface. The conductive bumps are disposed on the active surface of the semiconductor die. The shielding layer is disposed on the lateral surface of the semiconductor die. The encapsulant covers the shielding layer, and has a first surface and a second surface opposite to the first surface. The redistribution layer is disposed on the first surface of the encapsulant and electrically connected to the semiconductor die through the conductive bumps. The shielding layer is electrically connected to the redistribution layer.Type: ApplicationFiled: February 26, 2020Publication date: June 18, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Hsu-Nan FANG, Chun-Jun ZHUANG, Yung I. YEH
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Publication number: 20200185286Abstract: A semiconductor package device includes a substrate, an electronic component, a ring frame, an encapsulant, a thermal conducting material and a lid. The electronic component is disposed on the substrate. The ring frame is disposed on the substrate and surrounds the electronic component. The encapsulant encapsulates the electronic component and a first portion of the ring frame. The encapsulant exposes a second portion of the ring frame. The encapsulant and the second portion of the ring frame define a space. The thermal conducting material is disposed in the space. The lid is disposed on the thermal conducting material and connects with the second portion of the ring frame.Type: ApplicationFiled: December 10, 2018Publication date: June 11, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventor: Hsu-Nan FANG
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Patent number: 10593630Abstract: A semiconductor package includes a semiconductor die, a plurality of conductive bumps, a shielding layer, an encapsulant and a redistribution layer. The semiconductor die has an active surface, a backside surface and a lateral surface. The conductive bumps are disposed on the active surface of the semiconductor die. The shielding layer is disposed on the lateral surface of the semiconductor die. The encapsulant covers the shielding layer, and has a first surface and a second surface opposite to the first surface. The redistribution layer is disposed on the first surface of the encapsulant and electrically connected to the semiconductor die through the conductive bumps. The shielding layer is electrically connected to the redistribution layer.Type: GrantFiled: May 11, 2018Date of Patent: March 17, 2020Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Hsu-Nan Fang, Chun-Jun Zhuang, Yung I. Yeh
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Patent number: 10573572Abstract: An electronic device includes an insulating layer, a metal layer and at least one electrical connecting element. The insulating layer has a top surface and a bottom surface opposite to the top surface, and defines an opening extending between the top surface and the bottom surface. The metal layer is disposed in the opening of the insulating layer and has a top surface and a bottom surface opposite to the top surface. The bottom surface of the metal layer is substantially coplanar with the bottom surface of the insulating layer. The electrical connecting element is attached to the bottom surface of the metal layer through a seed layer.Type: GrantFiled: July 19, 2018Date of Patent: February 25, 2020Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Hsu-Nan Fang, Chien-Ching Chen
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Publication number: 20200027804Abstract: An electronic device includes an insulating layer, a metal layer and at least one electrical connecting element. The insulating layer has a top surface and a bottom surface opposite to the top surface, and defines an opening extending between the top surface and the bottom surface. The metal layer is disposed in the opening of the insulating layer and has a top surface and a bottom surface opposite to the top surface. The bottom surface of the metal layer is substantially coplanar with the bottom surface of the insulating layer. The electrical connecting element is attached to the bottom surface of the metal layer through a seed layer.Type: ApplicationFiled: July 19, 2018Publication date: January 23, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Hsu-Nan FANG, Chien-Ching CHEN
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Publication number: 20190348371Abstract: A semiconductor package includes a semiconductor die, a plurality of conductive bumps, a shielding layer, an encapsulant and a redistribution layer. The semiconductor die has an active surface, a backside surface and a lateral surface. The conductive bumps are disposed on the active surface of the semiconductor die. The shielding layer is disposed on the lateral surface of the semiconductor die. The encapsulant covers the shielding layer, and has a first surface and a second surface opposite to the first surface. The redistribution layer is disposed on the first surface of the encapsulant and electrically connected to the semiconductor die through the conductive bumps. The shielding layer is electrically connected to the redistribution layer.Type: ApplicationFiled: May 11, 2018Publication date: November 14, 2019Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Hsu-Nan FANG, Chun-Jun ZHUANG, Yung I. YEH
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Patent number: 10475775Abstract: A semiconductor package device comprises a circuit layer, an electronic component disposed on the circuit layer, a package element and a first encapsulant. The package element is disposed on the circuit layer. The package element includes at least two electrical contacts electrically connected to the circuit layer. The first encapsulant is disposed on the circuit layer. The first encapsulant encapsulates the electronic component and the package element and exposes the electrical contacts of the package element.Type: GrantFiled: August 17, 2017Date of Patent: November 12, 2019Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Hsu-Nan Fang, Chun-Jun Zhuang
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Publication number: 20190109117Abstract: A semiconductor device package includes a first redistribution layer (RDL), a first die, a second die, a second RDL and an encapsulant. The first die is disposed on the first RDL and is electrically connected to the first RDL. The first die has a first electrical contact. The second die is disposed on the first RDL and is electrically connected to the first RDL. The second die has a first electrical contact. The second RDL is surrounded by the first RDL. The second RDL has a first electrical contact electrically connected to the first electrical contact of the first die and a second electrical contact electrically connected to the first electrical contact of the second die. A size of the first electrical contact of the second RDL is greater than a size of the second electrical contact of the second RDL.Type: ApplicationFiled: October 4, 2018Publication date: April 11, 2019Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Hsu-Nan Fang, Chun-Jun Zhuang, Yung I. Yeh, Ming-Chiang Lee
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Publication number: 20180061815Abstract: A semiconductor package device comprises a circuit layer, an electronic component disposed on the circuit layer, a package element and a first encapsulant. The package element is disposed on the circuit layer. The package element includes at least two electrical contacts electrically connected to the circuit layer. The first encapsulant is disposed on the circuit layer. The first encapsulant encapsulates the electronic component and the package element and exposes the electrical contacts of the package element.Type: ApplicationFiled: August 17, 2017Publication date: March 1, 2018Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Hsu-Nan FANG, Chun-Jun ZHUANG
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Publication number: 20180061805Abstract: A semiconductor package structure includes at least one semiconductor die, at least one conductive pillar, an encapsulant and a circuit structure. The semiconductor die has an active surface. The conductive pillar is disposed adjacent to the active surface of the semiconductor die. The encapsulant covers the semiconductor die and the conductive pillar. The encapsulant defines at least one groove adjacent to and surrounding the conductive pillar. The circuit structure is electrically connected to the conductive pillar.Type: ApplicationFiled: August 22, 2017Publication date: March 1, 2018Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Hsu-Nan FANG, Chun-Jun ZHUANG