Abstract: Disclosed herein is an anti-cancer composition that includes an ethanol extract of green propolis, an ethanol extract of wheatgrass, and an ethanol extract of mulberry leaves. Also disclosed herein is use of the anti-cancer composition for inhibiting the growth of cancer cells.

Abstract: An optical film comprises a light incident side and a light emitting side opposite to the light incident side. A plurality of light incident microstructures are formed on the light incident side, and the light incident microstructures are tapered structures. According to the structural design of the light incident microstructures of the optical film, the light field of a light source can be expanded to achieve the purpose of emitting light at a specific angle. The invention also provides a backlight module and a display device including the optical film.

Abstract: A tracking device including an image sensor, a light source and a processor is provided. The image sensor senses reflected light or scattered light formed by the light source illuminating a work surface. The processor calculates a trace of the tracking device according to one of the reflected light and the scattered light that generates more apparent image features so as to increase the adaptable work surfaces.

Abstract: A server information handling system rack has an adjustable depth to fit different sized server rack sleds and adapt the rack to different sized data centers. Fixed vertical supports couple to fixed horizontal supports to define a rack interior that adjusts in depth by sliding horizontal supports that change a position of extensible vertical supports coupled to the sliding horizontal supports. When a desired rack depth is set, the fixed horizontal supports and sliding horizontal supports are affixed to each other, such as with a screw that couples to a threaded nut of the fixed horizontal support.

Abstract: An imaging system lens assembly includes six lens elements which are, in order from an object side to an image side along an optical path: a first lens element, a second lens element, a third lens element, a fourth lens element, a fifth lens element and a sixth lens element. Each of the six lens elements has an object-side surface facing toward the object side and an image-side surface facing toward the image side. The first lens element has positive refractive power. The image-side surface of the fifth lens element is convex in a paraxial region thereof. The image-side surface of the sixth lens element is concave in a paraxial region thereof, and the image-side surface of the sixth lens element has at least one inflection point.

Abstract: A system and method for efficiently designing a through silicon via (TSV) macro blocks are described. In various implementations, the circuitry of a processor executes instructions of a place and route tool that provides automatic placement of macro blocks and standard cells on an integrated circuit die based on a copy of a netlist of the integrated circuit being designed and a copy of a standard cell library that includes a variety of standard cells and macro blocks. The processor places two functional macros in the floorplan with a channel between them. In the channel, the processor places a TSV macro that includes at least one boundary cell inside of the TSV macro. The processor prevents placement of a boundary cell adjacent to at least one side of the TSV macro despite empty space exists due to no standard cells or macros about the at least one side.

Abstract: Semiconductor devices and methods are provided. A semiconductor device according to the present disclosure includes a first transistor having a first gate dielectric layer, a second transistor having a second gate dielectric layer, and a third transistor having a third gate dielectric layer. The first gate dielectric layer includes a first concentration of a dipole layer material, the second gate dielectric layer includes a second concentration of the dipole layer material, and the third gate dielectric layer includes a third concentration of the dipole layer material. The dipole layer material includes lanthanum oxide, aluminum oxide, or yttrium oxide. The first concentration is greater than the second concentration and the second concentration is greater than the third concentration.

Abstract: A semiconductor tester and a method for calibrating a probe card and a device under testing (DUT) are disclosed. The semiconductor tester includes: a support platform, including a support surface and configured to be able to move along a direction parallel to the support surface and rotate around a rotating shaft perpendicular to the support surface; a probe card including a plurality of probes stretching towards the support platform; and an alignment assembly, including: at least two first laser emitting apparatuses emitting a plurality of first laser beams; and a second laser emitting apparatus emitting a plurality of second laser beams. The first laser beams and the second laser beams are perpendicular to each other and are each arranged sequentially along a direction perpendicular to the support surface. The semiconductor tester aligns a probe card to a DUT with improved accuracy, thereby preventing the damage to the probe card.

Abstract: A method of forming a semiconductor device includes forming an opening in a dielectric layer, and forming a barrier layer in the opening. A combined liner layer is formed over the barrier layer by first forming a first liner layer over the barrier layer, and forming a second liner layer over the first liner layer, such that the first liner layer and the second liner layer intermix. A conductive material layer is formed over the combined liner layer, and a thermal process is performed to reflow the conductive material layer.

Abstract: An execution method of an online discussion board and a server using the same are provided. The server includes an information collection unit, an analyzing unit, a discussion board management unit and a recording unit. The information collection unit is configured to obtain a plurality of process problem messages. The analyzing unit is configured to automatically obtain a process analysis report according to the process problem messages. The discussion board management unit is configured to automatically create the online discussion board. At least two users are invited to enter the online discussion board. The process analysis report is shown in the online discussion board. The recording unit is configured to store a discussion record on the online discussion board. The online discussion board is held for a period of time.

Abstract: An optical transceiver includes a housing, a heat source accommodated in the housing, and a heat spreader. The heat spreader includes a heat transfer portion accommodated in the housing and a heat dissipation portion exposed to outside. The heat spreader is in thermal contact with the heat source, and the heat dissipation portion of the heat spreader is in proximity of an optical port of the housing.

Abstract: A semiconductor device includes a first capacitor having a ferroelectric film disposed between two electrodes, a second capacitor, having another dielectric film disposed between two electrodes. A first voltage is applied across the first capacitor such that the ferroelectric film is polarized, altering the effective resistance through the device. A second voltage is applied across the first capacitor, such that a leakage current transits the ferroelectric film, and accumulates along an electrode of the second capacitor, and the gate of a transistor, thereby effecting a change to the drain to source resistance of the transistor which may be measured to determine the polarization state of the ferroelectric film.

Abstract: A FinFET includes a semiconductor substrate, a semiconductor fin, a gate structure, and an isolation structure. The semiconductor fin protrudes from the semiconductor substrate. The gate structure is disposed across a first segment of the semiconductor fin. The isolation structure interrupts a continuity of a second segment of the semiconductor fin. The isolation structure has a first portion and a second portion stacked on the first portion. Sidewalls of the first portion are inclined and sidewalls of the second portion are straight. A top surface of the first portion is coplanar with a top surface of the gate structure.

Abstract: A semiconductor device includes a ferroelectric tunnel junction (FTJ), wherein the ferroelectric tunnel junction includes a first electrode, a ferroelectric layer disposed over the first electrode, and a second electrode disposed over the ferroelectric layer. The first electrode contains nitrogen or oxygen and is characterized by a first percentage of nitrogen or oxygen. The second electrode contains nitrogen or oxygen and is characterized by a second percentage of nitrogen or oxygen. The first percentage is different from the second percentage.

Abstract: A control parameter adjustment method of lens includes: capturing an external image through a lens of an electronic device, and presenting an image screen corresponding to the external image through a display; receiving a first user operation through a user interface circuit; in response to the first user operation, activating a first parameter adjustment mode corresponding to the lens and providing a first parameter adjustment interface adjusting a control parameter of the lens based on a first virtual scale; in the first parameter adjustment mode, receiving a second user operation through the user interface circuit; and in response to the second user operation, activating a second parameter adjustment mode corresponding to the lens and providing a second parameter adjustment interface adjusting the control parameter of the lens based on a second virtual scale, and the first virtual scale is different from the second virtual scale.

Abstract: A semiconductor structure includes substrate, semiconductor layers, source/drain features, metal oxide layers, and a gate structure. The semiconductor layers extend in an X-direction and over the substrate. The semiconductor layers are spaced apart from each other in a Z-direction. The source/drain features are on opposite sides of the semiconductor layers in the X-direction. The metal oxide layers cover bottom surfaces of the semiconductor layers. The gate structure wraps around the semiconductor layers and the metal oxide layers. The metal oxide layers are in contact with the gate structure.

Abstract: An image calibration method applied to an image calibration device includes comparing a first image with a second image to acquire a first overlapping region of the first image and a second overlapping region of the second image, analyzing color distribution of the first overlapping region to acquire at least one first base color value, analyzing color distribution of the second overlapping region to acquire at least one second base color value, setting a ratio of the at least one first base color value to the at least one second base color value as an luminance compensation value when the at least one first base color value is greater than the at least one second base color value, and utilizing the luminance compensation value to adjust pixels of the second image. The first overlapping region is overlapped with the second overlapping region.

Abstract: An imaging system lens assembly includes a first lens element, a second lens element, a third lens element, a fourth lens element, a fifth lens element and a sixth lens element in order from an object side to an image side along an optical path. Each of the six lens elements has an object-side surface facing toward the object side and an image-side surface facing toward the image side. The first lens element has positive refractive power. The fifth lens element has positive refractive power. The image-side surface of the fifth lens element is concave in a paraxial region thereof. The image-side surface of the sixth lens element has at least one inflection point. A central thickness of the first lens element is a maximum among central thicknesses of all lens elements of the imaging system lens assembly.

Abstract: Systems and methods for global positioning satellite (GPS)/global navigation satellite system (GNSS) based real time global asset tracking are described. In an embodiment provides a system for real time, fast, global asset tracking, the system includes: a server with a processor, a memory, and a network interface, wherein the memory includes a tracking application, where the tracking application directs the processor to: receive a message including specific data from a tag; determine a time search window based on the message received from the tag; perform an initial position search; perform calculations for position and time, utilizing the time search window, the initial position search and satellite ephemeris information; and display a position information of the tag.

Abstract: A method of forming a memory device according to the present disclosure includes forming a trench in a first substrate of a first wafer, depositing a data-storage element in the trench, performing a thermal treatment to the first wafer to improve a crystallization in the data-storage element, forming a first redistribution layer over the first substrate, forming a transistor in a second substrate of a second wafer, forming a second redistribution layer over the second substrate, and bonding the first wafer with the second wafer after the performing of the thermal treatment. The data-storage element is electrically coupled to the transistor through the first and second redistribution layers.