Abstract: A calibration circuit for calibrating an output level of a demodulator includes a test signal generator, an RSSI module and a calibration module. The test signal generator generates a test signal, and the RSSI module detects the test signal to generate a control signal, wherein the control signal controls the demodulator to process the test signal to generate a determined output signal. The calibration module then calibrates the RSSI module according to the output signal in order to calibrate the output level of the demodulator. When the control signal is utilized to selectively enable or disable a soft-mute function of the demodulator, the calibration module can be utilized to calibrate or determine the soft-mute function of the demodulator.

Abstract: For maintaining the regular operating current in an inner circuit under electrostatic discharge (ESD) event, an ESD protection device is provided to control an ESD path switch in the turned-on condition by employing a MOS device and a latch-detected turned-on circuit. The MOS device has a self-aligned silicidation (Salicide) therein. The ESD protection device is used to stabilize operation efficiency and reduce the area of an ESD protection device without a silicide block disposed therein for enhancing the ESD protection capability.

Abstract: An amplifier is disclosed. An input transistor receives an input voltage. An impedance unit is coupled to a first electrode of the input transistor. A current source is coupled to a second electrode of the input transistor. A push-pull output circuit comprises a PMOS transistor and a NMOS transistor electrically connected in series to output an output voltage. The first electrode of the input transistor is coupled to a control terminal of the NMOS transistor. A level shifting unit is coupled between the first electrode of the input transistor and the push-pull output circuit, for shifting a voltage of the first electrode of the input transistor and providing a shifted voltage corresponding to the voltage of the first electrode of the input transistor to the control terminal of the PMOS transistor.

Abstract: A recording apparatus for optical data includes a photo detection IC for producing a plurality of phase signals; a plurality of sample/hold (S/H) circuits electrically connected to the photo detection IC; a plurality of limiter circuits electrically connected to the photo detection IC; a channel signal generator connected to the S/H circuits; and a level shift circuit connected to an output of the channel signal generator. The recording apparatus for optical data prevents the interference of servo signal during high speed operation and ensures normal operation of S/H circuits thereof.

Abstract: A calibration circuit for calibrating an output level of a demodulator includes a test signal generator, an RSSI module and a calibration module. The test signal generator generates a test signal, and the RSSI module detects the test signal to generate a control signal, wherein the control signal controls the demodulator to process the test signal to generate a determined output signal. The calibration module then calibrates the RSSI module according to the output signal in order to calibrate the output level of the demodulator. When the control signal is utilized to selectively enable or disable a soft-mute function of the demodulator, the calibration module can be utilized to calibrate or determine the soft-mute function of the demodulator.

Abstract: An amplifier is disclosed. An input transistor receives an input voltage. An impedance unit is coupled to a first electrode of the input transistor. A current source is coupled to a second electrode of the input transistor. A push-pull output circuit comprises a PMOS transistor and a NMOS transistor electrically connected in series to output an output voltage. The first electrode of the input transistor is coupled to a control terminal of the NMOS transistor. A level shifting unit is coupled between the first electrode of the input transistor and the push-pull output circuit, for shifting a voltage of the first electrode of the input transistor and providing a shifted voltage corresponding to the voltage of the first electrode of the input transistor to the control terminal of the PMOS transistor.

Abstract: A reference buffer is disclosed. The reference buffer includes a main source follower stage, a replica source follower stage, and a low-pass filter. The main source follower stage provides a first main voltage according to a first driving voltage. The replica source follower stage duplicates the first main voltage to generate a first reference voltage. The low-pass filter is coupled between the main source follower stage and the replica source follower stage.

Abstract: An electro static discharge (ESD) protection circuit employing a field-effect transistor (FET) having no silicide block disposed thereon. It is connected with an internal circuit so as to prevent the internal circuit from the influence of an ESD event, wherein the internal circuit has at least a signal input end. The ESD protection circuit includes: an ESD clamp circuit for providing an ESD grounding path as an ESD occurs; and at least a pair of p-n junction diodes. The p-n junction diodes are stacked so that one of the p-n junction diodes has a n-type end coupled to the signal input end and the other one has a p-type end coupled to the signal input end as well. The ESD clamp circuit has at least a FET, whose drain has no silicide block disposed thereon.

Abstract: A level shifting circuit is provided. Thin oxide devices are utilized to reduce the threshold, and thick oxide devices are utilized to protect the thin oxides from breakdown. An input voltage input voltage swings between a low supply voltage and ground. An output voltage swings between a high supply voltage and the ground. An inverter with input connected to the input voltage, outputs an inverted input voltage. The input voltage is subsequently between 0.5V to 2.5V, and the output voltage is subsequently between 3V to 10V.

Abstract: A laser power control unit used for controlling the laser power of an optical pick-up unit (OPU) is provided. The laser power control unit includes: at least one analog-to-digital converter (ADC) electrically coupled to the OPU for transferring a front photodiode output signal into a digital feedback signal; and at least one digital control circuit electrically coupled to the ADC for generating a power control signal and outputting the power control signal to the OPU in order to control the laser power of the OPU. The digital control circuit has a compensation circuit used for generating a compensation value according to a difference between the digital feedback signal and a digital target feedback signal so as to adjust the power control signal. The front photodiode output signal corresponds to the laser power of the OPU.

Abstract: A laser power control unit used for controlling the laser power of an optical pick-up unit (OPU) is provided. The laser power control unit includes: at least one analog-to-digital converter (ADC) electrically coupled to the OPU for transferring a front photodiode output signal into a digital feedback signal; and at least one digital control circuit electrically coupled to the ADC for generating a power control signal and outputting the power control signal to the OPU in order to control the laser power of the OPU. The digital control circuit has a compensation circuit used for generating a compensation value according to a difference between the digital feedback signal and a digital target feedback signal so as to adjust the power control signal. The front photodiode output signal corresponds to the laser power of the OPU.

Abstract: A laser power controller for performing an auto power control to control the laser power of an optical pick-up unit (OPU) includes: a sample/hold circuit used for sampling and holding a front photodiode output signal to generate an analog feedback signal; an analog-to-digital converter (ADC) electrically coupled to the sample/hold circuit for transferring the analog feedback signal into a digital feedback signal; and a digital control circuit electrically coupled to the ADC for generating a power control signal and outputting the power control signal to the OPU in order to control the laser power of the OPU. The front photodiode output signal corresponds to the laser power of the OPU.

Abstract: A digital phase-locked loop circuit includes a counter for outputting a count value corresponding to an output frequency outputted by a voltage controlled oscillator in response to a control voltage signal, a comparator for comparing the count value from the counter with a target value associated with a target frequency output and for outputting a comparison signal according to a comparison result therebetween, a digital reference value generator for outputting a digital reference value according to the comparison signal from the comparator and including a register for storing the digital reference value therein, and a digital-to-analog converter for generating the control voltage signal based on the digital reference value received from the digital reference value generator.

Abstract: A recording apparatus for optical data includes a photo detection IC for producing a plurality of phase signals; a plurality of sample/hold (S/H) circuits electrically connected to the photo detection IC; a plurality of limiter circuits electrically connected to the photo detection IC; a channel signal generator connected to the S/H circuits; and a level shift circuit connected to an output of the channel signal generator. The recording apparatus for optical data prevents the interference of servo signal during high speed operation and ensures normal operation of S/H circuits thereof.

Abstract: An optical drive includes a comparator for comparing a first input signal with a second input signal to generate a first output signal at a first node; a signal source coupled to a second node, the signal source outputting a second output signal; and a switch for outputting a third output signal at a third node, the third output signal controlling a laser power of the optical drive, wherein when the switch is switched to the first node, the first output signal is transmitted to the third node and serves as the third output signal, and when the switch is switched to the second node, the second output signal is transmitted to the third node and serves as the third output signal.

Abstract: A method for automatically controlling output power of a pick-up head. When output power of a pick-up head is to be changed, a first switch is utilized to connect a first input port of a comparator circuit to a supply source, and a second switch is utilized to connect a first signal source to a driver circuit such that the driver circuit will control the output power according to a first signal. When voltage drop between the first input port and a output port of the comparator circuit stabilizes, the first switch is utilized to connect the first input port to a sensor, and the second switch is utilized to connect the output port and the driver circuit such that the driver circuit will control the output power according to a comparative signal.

Abstract: A wobbling signal reproduction device has a first low-pass filter, a second low-pass filter, a first auto gain control circuit, a second auto gain control circuit, a subtraction circuit unit and a band-pass filter. The band-pass filter is connected to an output terminal of the subtraction circuit unit to eliminate noise of reflected light beams due to a recording signal during the recording process. Thus, a satisfactory wobbling signal is available.

Abstract: A laser power controller for performing an auto power control to control the laser power of an optical pick-up unit (OPU) includes: a sample/hold circuit used for sampling and holding a front photodiode output signal to generate an analog feedback signal; an analog-to-digital converter (ADC) electrically coupled to the sample/hold circuit for transferring the analog feedback signal into a digital feedback signal; and a digital control circuit electrically coupled to the ADC for generating a power control signal and outputting the power control signal to the OPU in order to control the laser power of the OPU. The front photodiode output signal corresponds to the laser power of the OPU.

Abstract: For maintaining the regular operating current in an inner circuit under electrostatic discharge (ESD) event, the present invention provides an ESD protection device to control an ESD path switch in the turned-on condition by employing a MOS device and a latch-detected turned-on circuit. The MOS device has a self-aligned silicidation (Salicide) therein. The present invention is used to stabilize operation efficiency and reduce the area of an ESD protection device without a silicide block disposed therein for enhancing the ESD protection capability.

Abstract: A digital phase-locked loop circuit includes a counter for outputting a count value corresponding to an output frequency outputted by a voltage controlled oscillator in response to a control voltage signal, a comparator for comparing the count value from the counter with a target value associated with a target frequency output and for outputting a comparison signal according to a comparison result therebetween, a digital reference value generator for outputting a digital reference value according to the comparison signal from the comparator and including a register for storing the digital reference value therein, and a digital-to-analog converter for generating the control voltage signal based on the digital reference value received from the digital reference value generator.