Abstract: An electro static discharge (ESD) protection circuit employing a field-effect transistor (FET) having no silicide block disposed thereon. It is connected with an internal circuit so as to prevent the internal circuit from the influence of an ESD event, wherein the internal circuit has at least a signal input end. The ESD protection circuit includes: an ESD clamp circuit for providing an ESD grounding path as an ESD occurs; and at least a pair of p-n junction diodes. The p-n junction diodes are stacked so that one of the p-n junction diodes has a n-type end coupled to the signal input end and the other one has a p-type end coupled to the signal input end as well. The ESD clamp circuit has at least a FET, whose drain has no silicide block disposed thereon.

Abstract: A method for automatically controlling output power of a pick-up head. When output power of a pick-up head is to be changed, a first switch is utilized to connect a first input port of a comparator circuit to a supply source, and a second switch is utilized to connect a first signal source to a driver circuit such that the driver circuit will control the output power according to a first signal. When voltage drop between the first input port and a output port of the comparator circuit stabilizes, the first switch is utilized to connect the first input port to a sensor, and the second switch is utilized to connect the output port and the driver circuit such that the driver circuit will control the output power according to a comparative signal.