Patents by Inventor Hsun Wang
Hsun Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20150110271Abstract: An electric system including a first wireless apparatus, a display apparatus and a second wireless apparatus is provided. A first information is encrypted to be a first encrypted information and sent wirelessly by the first wireless apparatus. The display apparatus includes a display unit and a wireless communication unit electrically connected to the display unit. The wireless communication unit receives the first encrypted information and cause the display unit to display a first representative information corresponding to the first encrypted information. The first representative information and the first encrypted information are different. The second wireless apparatus reads the first encrypted information by the wireless communication unit, and the first encrypted information is decrypted to be the first encrypted information by the second wireless apparatus.Type: ApplicationFiled: August 12, 2014Publication date: April 23, 2015Inventors: Kuo-Lung Fang, Yao-Jen Hsieh, Chi-Hsun Wang
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Publication number: 20150108550Abstract: A method for forming a transistor is provided. The method includes: forming a channel layer over a substrate; patterning the channel layer to form a recess; and forming a source layer in the recess, such that at least a portion of the channel layer protrudes to form the fin-type channel.Type: ApplicationFiled: October 17, 2013Publication date: April 23, 2015Applicant: Taiwan Semiconductor Manufacturing Company LimitedInventors: CHIEN-HSUN WANG, MAO-LIN HUANG, CHUN-HSIUNG LIN
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Publication number: 20150102287Abstract: A transistor device and method for forming a nanowire field effect transistor (FET) device are provided. A device layer including a source region and a drain region is formed, where the source region and the drain region are connected by a suspended nanowire channel. Etch stop layers are formed beneath the source region and the drain region. The etch stop layers comprise support structures interposed between a semiconductor substrate and the source and drain regions. The suspended nanowire channel is formed by etching a sacrificial material beneath the suspended nanowire channel. The etching is selective to the sacrificial material to prevent the removal of the etch stop layers beneath the source region and the drain region.Type: ApplicationFiled: October 16, 2013Publication date: April 16, 2015Applicant: Taiwan Semiconductor Manufacturing Company LimitedInventors: CHIEN-HSUN WANG, MAO-LIN HUANG, CHUN-HSIUNG LIN, JEAN-PIERRE COLINGE
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Publication number: 20150098070Abstract: A light wavelength conversion module including a substrate, a first light wavelength conversion layer, and a first light transmissive layer is provided. The substrate has a light passing-through area and a first light wavelength conversion area. The first light wavelength conversion layer is located at the first light wavelength conversion area and between the first light transmissive layer and the substrate. The first light wavelength conversion layer is suitable for converting a coherent light beam into a first conversion light beam, wherein wavelengths of the coherent light beam and the first conversion light beam are different from each other. An illumination system and a projection apparatus are also provided.Type: ApplicationFiled: July 31, 2014Publication date: April 9, 2015Applicant: CORETRONIC CORPORATIONInventors: Chi-Tang Hsieh, Chia-Hao Wang, Chi-Hsun Wang, Ko-Shun Chen
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Publication number: 20150077714Abstract: An illumination system including at least one laser source, at least one anisotropic light expanding element and a wavelength conversion element is provided. The at least one laser source emits a laser beam. The at least one anisotropic light expanding element is disposed on the transmission path of the laser beam and causes the laser beam to expand along a light expanding direction. The light expanding direction is substantially parallel to the slow axis of the laser beam. The wavelength conversion element is disposed on the transmission path of the laser beam. A projection apparatus is also provided.Type: ApplicationFiled: July 30, 2014Publication date: March 19, 2015Applicant: CORETRONIC CORPORATIONInventors: Chi-Tang Hsieh, Chia-Hao Wang, Ko-Shun Chen, Chi-Hsun Wang
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Publication number: 20150069467Abstract: A transistor includes a gate terminal, a source terminal and a drain terminal. At least one of the source and drain terminals has a layered configuration that includes a terminal layer and an intervening layer. The terminal layer has a top surface and a bottom surface. The intervening layer is located within the terminal layer, between and spaced from the top and bottom surfaces, is oriented to be perpendicular to current flow, and is less than one tenth the thickness of the terminal layer. The terminal layer and the intervening layer include a common semiconductive compound and a common dopant, with a concentration of the dopant in the intervening layer being over ten times an average concentration of the dopant in the terminal layer.Type: ApplicationFiled: September 12, 2013Publication date: March 12, 2015Applicant: Taiwan Semiconductor Manufacturing Company LimitedInventors: HUNG-TA LIN, MAO-LIN HUANG, LI-TING WANG, CHIEN-HSUN WANG, MENG-KU CHEN, CHUN-HSIUNG LIN, PANG-YEN TSAI, HUI-CHENG CHANG
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Patent number: 8926098Abstract: An illumination system includes a coherent light source, a phosphor switching module, a beam combining unit and a diffusion switching module. The coherent light source emits a coherent light beam. The phosphor switching module includes a light passing section and a first phosphor reflecting section. The light passing section and first phosphor reflecting section are switched into a transmission path of the coherent light beam by turns. The first phosphor reflecting section converts and reflects the coherent light beam into a first color beam. The beam combining unit combines the coherent light beam passing through the light passing section and the first color light beam. The diffusion switching module includes a light diffusion section and a first light permeable section to be switched into the transmission paths of the coherent light beam and the first color light beam by turns. A projection apparatus is also disclosed.Type: GrantFiled: July 16, 2012Date of Patent: January 6, 2015Assignee: Coretronic CorporationInventors: Tzu-Yi Yang, Chi-Hsun Wang, Ko-Shun Chen
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Publication number: 20140362349Abstract: A light source module including an exciting light source, a wavelength conversion module, and a light combining unit is provided. The exciting light source is capable of providing an exciting light beam. The wavelength conversion module includes at least one wavelength conversion reflecting portion and a wavelength conversion portion which cut into the transmission path of the exciting light beam alternately. When the wavelength conversion portion cuts into the transmission path of the exciting light beam, part of the exciting light beam which passes through the wavelength conversion portion is a first color light beam and another part of the exciting light beam is converted into a second color light beam by the wavelength conversion portion. The color of the second color light beam is different from that of the exciting light beam. A projection apparatus is also provided.Type: ApplicationFiled: April 17, 2014Publication date: December 11, 2014Applicant: CORETRONIC CORPORATIONInventors: Hao-Wei Chiu, Chi-Hsun Wang, Ko-Shun Chen
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Publication number: 20140356995Abstract: A method for fabricating a lateral-epitaxial-overgrowth thin-film LED with a nanoscale-roughened structure is provided. The lateral-epitaxial-overgrowth thin-film LED with a nanoscale-roughened structure has a substrate, a metal bonding layer formed on the substrate, a first electrode formed on the metal bonding layer, a semiconductor structure formed on the first electrode with a lateral-epitaxial-growth technology, and a second electrode formed on the semiconductor structure. A nanoscale-roughened structure is formed on the semiconductor structure except the region covered by the second electrode. Lateral epitaxial growth is used to effectively inhibit the stacking faults and reduce the thread dislocation density in the semiconductor structure to improve the crystallization quality of the light-emitting layer and reduce leakage current. Meanwhile, the surface roughened structure on the semiconductor structure can promote the external quantum efficiency.Type: ApplicationFiled: August 15, 2014Publication date: December 4, 2014Inventors: Chia-Yu LEE, Chao-Hsun WANG, Ching-Hsueh CHIU, Hao-Chung KUO
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Publication number: 20140353771Abstract: A semiconductor/dielectric interface having reduced interface trap density and a method of manufacturing the interface are disclosed. In an exemplary embodiment, the method of forming a semiconductor device includes receiving a substrate and forming a termination layer on a top surface of the substrate. The termination layer includes at least one of hydrogen, deuterium, or nitrogen. The method further includes depositing a dielectric layer on the termination layer such that the depositing of the dielectric layer does not disrupt the termination layer. The termination layer may be formed by a first deposition process that deposits a first material of the termination layer and a subsequent deposition process that introduces a second material of the termination layer into the first material. The termination layer may also be formed by a single deposition process that deposits both a first material and a second material of the termination layer.Type: ApplicationFiled: August 20, 2014Publication date: December 4, 2014Inventors: Chien-Hsun Wang, Shih-Wei Wang, Gerben Doornbos, Georgios Vellianitis, Matthias Passlack
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Publication number: 20140331193Abstract: A semiconductor manufacturing method of generating a layout for a device includes defining a first plurality of mandrels in a first active region of a first layout. Each mandrel of the first plurality of mandrels extends in a first direction and being spaced apart in a second direction perpendicular to the first direction. The method further includes defining a second plurality of mandrels in a second active region of the first layout. Each mandrel of the second plurality of mandrels extends in the first direction and being spaced apart in the second direction. An edge of the first active region is spaced from an edge of the second active region by a minimum distance less than a specified minimum spacing. The method further includes connecting, using a layout generator, at least one mandrel of the first plurality of mandrels to a corresponding mandrel of the second plurality of mandrels.Type: ApplicationFiled: July 17, 2014Publication date: November 6, 2014Inventors: Chien-Hsun WANG, Chih-Sheng CHANG, Yi-Tang LIN, Ming-Feng SHIEH
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Patent number: 8829652Abstract: A light emitting device with graded composition hole tunneling layer is provided. The device comprises a substrate and an n-type semiconductor layer is disposed on the substrate, in which the n-type semiconductor layer comprises a first portion and a second portion. A graded composition hole tunneling layer is disposed on the first portion of the n-type semiconductor layer. An electron blocking layer is disposed on the graded composition hole tunneling layer. A p-type semiconductor layer is disposed on the electron blocking layer. A first electrode is disposed on the p-type semiconductor layer, and a second electrode is disposed on the second portion of the n-type semiconductor layer and is electrical insulated from the first portion of the n-type semiconductor. The graded composition hole tunneling layer is used as the quantum-well to improve the transport efficiency of the holes to increase the light emitting efficiency of the light emitting device.Type: GrantFiled: July 17, 2012Date of Patent: September 9, 2014Assignee: National Chiao Tung UniversityInventors: Chao-Hsun Wang, Hao-Chung Kuo
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Publication number: 20140239418Abstract: A semiconductor/dielectric interface having reduced interface trap density and a method of manufacturing the interface are disclosed. In an exemplary embodiment, the method comprises receiving a substrate, the substrate containing a semiconductor; preparing a surface of the substrate; forming a termination layer bonded to the semiconductor at the surface of the substrate; and depositing a dielectric layer above the termination layer, the depositing configured to not disrupt the termination layer. The forming of the termination layer may be configured to produce the termination layer having a single layer of oxygen atoms between the substrate and the dielectric layer.Type: ApplicationFiled: February 22, 2013Publication date: August 28, 2014Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chien-Hsun Wang, Shih Wei Wang, Ravi Droopad, Gerben Doombos, Georgios Vellianitis, Matthias Passlack
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Patent number: 8806397Abstract: A method of generating a layout for a device includes receiving a first layout including a plurality of active regions, each active region of the plurality of active regions having sides. The method further includes defining a plurality of elongate mandrels that each extend in a first direction and are spaced apart from one another in a second direction perpendicular to the first direction. The method further includes for each adjacent pair of partially-parallel active regions of the plurality of active regions having a minimum distance less than a specified minimum spacing, connecting at least a portion of nearest ends of pairs of elongate mandrels, each mandrel of a pair from a different active region. The method further includes generating a second layout including a plurality of elongate mandrels in the plurality of active regions, and connective elements between active regions of at least one adjacent pair of active regions.Type: GrantFiled: September 4, 2013Date of Patent: August 12, 2014Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chien-Hsun Wang, Chih-Sheng Chang, Yi-Tang Lin, Ming-Feng Shieh
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Publication number: 20140209800Abstract: An NDIR gas detector includes a photodetector for detecting a portion of stray visible light emitted from an incandescent lamp so as to generate an induced electrical signal, which is compared with a preset reference signal associated with a predetermined constant level of the stray visible light corresponding to a constant temperature of the lamp so as to obtain a level difference between the induced electrical signal and the reference signal. Electrical power supplied to the lamp is repeatedly regulated based on the level difference until the induced electrical signal and the reference signal have the same level, thereby stabilizing IR emission of the lamp in response to the lamp being kept at the constant temperature.Type: ApplicationFiled: March 14, 2013Publication date: July 31, 2014Applicant: ORIENTAL SYSTEM TECHNOLOGY INC.Inventors: Jin-Shown SHIE, Chien-Hsun WANG
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Patent number: 8769446Abstract: A method for generating a layout for a device having FinFETs from a first layout for a device having planar transistors is disclosed. A plurality of elongate mandrels is defined in a plurality of active regions. Where adjacent active regions are partially-parallel and within a specified minimum spacing, connective elements are added to a portion of the space between the adjacent active regions to connect the mandrel ends from one active region to another active region.Type: GrantFiled: September 8, 2011Date of Patent: July 1, 2014Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chien-Hsun Wang, Chih-Sheng Chang, Yi-Tang Lin, Ming-Feng Shieh
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Publication number: 20140176964Abstract: An optical touch system comprises a first light-emitting unit, a second light-emitting unit, a first image sensor having a first filter, and a second image sensor having a second filter. The first light-emitting unit generates first wavelength band light. The second light-emitting unit generates second wavelength band light. The first light-emitting unit generates first wavelength band light when the first image sensor is capturing an image. The first filter allows first wavelength band light to enter into the first image sensor and blocks second wavelength band light. The second light-emitting unit generates second wavelength band light when the second image sensor is capturing an image. The second filter allows second wavelength band light to enter into the second image sensor and block first wavelength band light.Type: ApplicationFiled: August 27, 2013Publication date: June 26, 2014Applicant: PIXART IMAGING INC.Inventors: Tzung Min Su, Yu Chia Lin, Kuan Hsun Wang, Chuan-Ching Lin, Chih Hsin Lin
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Publication number: 20140118991Abstract: A wavelength conversion wheel module and an illumination system are provided. The wavelength conversion wheel module includes a wavelength conversion wheel and a first actuator. The wavelength conversion wheel includes a plurality of annular areas. Each of the annular areas includes at least one wavelength conversion area and at least one light passing area. The wavelength conversion area converts an original light beam incident on the wavelength conversion area into a converted light beam. The wavelength of the converted light beam is different from the wavelength of the original light beam. The annular areas are arranged along the radial direction of the wavelength conversion wheel, and different annular areas have different optical parameters. The optical parameters of the annular areas are related to the wavelength conversion area and the light passing area. The first actuator is connected to the wavelength conversion wheel, and drives the wavelength conversion wheel to rotate.Type: ApplicationFiled: July 24, 2013Publication date: May 1, 2014Applicant: Coretronic CorporationInventors: Yin-Cheng Lin, Chi-Hsun Wang, Ko-Shun Chen
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Patent number: 8703565Abstract: An integrated circuit structure includes a substrate and a germanium-containing semiconductor fin over the substrate. The germanium-containing semiconductor fin has an upper portion having a first width, and a neck region under the upper portion and having a second width smaller than the first width.Type: GrantFiled: March 11, 2013Date of Patent: April 22, 2014Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chih-Hao Chang, Jeffrey Junhao Xu, Chien-Hsun Wang, Chih-Hsiang Chang
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Publication number: 20140091362Abstract: An integrated circuit transistor structure includes a semiconductor substrate, a first SiGe layer in at least one of a source area or a drain area on the semiconductor substrate, and a channel between the source area and the drain area. The first SiGe layer has a Ge concentration of 50 percent or more.Type: ApplicationFiled: December 11, 2013Publication date: April 3, 2014Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chih-Hao CHANG, Jeff J. XU, Chien-Hsun WANG, Chih Chieh YEH, Chih-Hsiang CHANG