Patents by Inventor Hsun-Wei Chan

Hsun-Wei Chan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9881845
    Abstract: An electronic device includes a transducer including a sensing area and a covering structure that covers the transducer. The covering structure includes a shelter portion and defines at least one aperture. The shelter portion covers the sensing area. The aperture includes a first curved surface and a second curved surface farther away from the sensing area than the first curved surface, and a first center of a first curvature of the first curved surface is at a different location than a second center of a second curvature of the second curved surface.
    Type: Grant
    Filed: October 12, 2016
    Date of Patent: January 30, 2018
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Yung-Yi Chang, Hsun-Wei Chan, Ching-Han Huang
  • Patent number: 9850124
    Abstract: A semiconductor device package includes a carrier, a sensor element disposed on or within the carrier, a cover and a filter. The cover includes a base substrate and a periphery barrier. The base substrate includes an inner sidewall. The inner sidewall of the base substrate defines a penetrating hole extending from a top surface of the base substrate to a bottom surface of the base substrate; at least a portion of the inner sidewall of the base substrate is tilted. The periphery barrier is coupled to the bottom surface of the base substrate and contacts a top surface of the carrier. The filter is disposed on the top surface of the base substrate and covers the penetrating hole.
    Type: Grant
    Filed: October 27, 2015
    Date of Patent: December 26, 2017
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Ching-Han Huang, Hsun-Wei Chan, Yu-Hsuan Tsai
  • Publication number: 20170294564
    Abstract: A semiconductor package device includes an electronic device. The electronic device includes a first carrier, a first electronic component, a second carrier, a second electronic component, an encapsulant, and a lens. The first electronic component is disposed on the first carrier. The second carrier defines an aperture and is disposed on the first carrier. The aperture is positioned over the first electronic component and exposes the first electronic component. The second electronic component is disposed on the second carrier. The encapsulant covers the second electronic component. The lens defines a cavity and is disposed on the aperture of the first carrier.
    Type: Application
    Filed: January 10, 2017
    Publication date: October 12, 2017
    Inventors: Hsin-Ying HO, Hsun-Wei CHAN, Lu-Ming LAI
  • Publication number: 20170294361
    Abstract: A lid array panel includes multiple lids, where each lid includes an outer side wall. The lid array panel further includes a bridge section surrounding and attached to the outer side walls of the lids, where the lids are connected to each other by the bridge section, the lid array panel further includes a reinforcement attached to the bridge section. A package structure includes a carrier, a chip disposed on an upper surface of the carrier, a lid, a bridge section, and a reinforcement. The lid includes a top wall and an outer side wall, the top wall and the outer side wall of the lid together define a cavity, and the outer side wall of the lid is attached to the upper surface of the carrier. The bridge section surrounds, and is attached to, the outer side wall of the lid. The reinforcement is attached to the bridge section.
    Type: Application
    Filed: April 8, 2016
    Publication date: October 12, 2017
    Inventors: Chang Chin TSAI, Hsun-Wei CHAN
  • Publication number: 20170294560
    Abstract: At least some embodiments of the present disclosure relate to a lid for covering an optical device. The lid includes a metal member and a transparent encapsulant. The metal member includes a top surface, a first bottom surface, and a second bottom surface between the top surface and the first bottom surface. The transparent encapsulant is surrounded by the metal member and covers at least a portion of the second bottom surface.
    Type: Application
    Filed: March 22, 2017
    Publication date: October 12, 2017
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Hsin-Ying HO, Hsun-Wei CHAN, Ying-Chung CHEN, Lu-Ming LAI
  • Publication number: 20170222093
    Abstract: An LED package with trenches traversing a die pad to provide a mechanical interlock mechanism to strengthen bonding between the die pad and an insulator such that de-lamination is less likely to occur between the die pad and the insulator. A chip carrying region is defined by a barrier portion formed by the insulator in the trenches and in gaps between electrodes and the die pad, such that a light converting layer is confined within the barrier portion.
    Type: Application
    Filed: April 20, 2017
    Publication date: August 3, 2017
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Hsun-Wei Chan
  • Publication number: 20170221805
    Abstract: An electronic device comprises a carrier, a leadframe, a package body and a plurality of electronic components. The carrier has an open top surface, a closed bottom surface and sidewalls extending between the closed bottom surface and the open top surface. The carrier has a circular cavity in its open top surface extending toward the closed bottom surface. The carrier includes a leadframe including a die pad and a plurality of leads. The leads are physically isolated from the die pad by at least one gap. The package body partially encapsulates the leadframe such that a portion of an upper surface of the die pad and a portion of each of the leads are exposed from the package body. The exposed portions of the leads are arranged radially along the die pad. The electronic components are disposed on the die pad.
    Type: Application
    Filed: December 30, 2016
    Publication date: August 3, 2017
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Hsun-Wei CHAN
  • Publication number: 20170138566
    Abstract: In an aspect, an optical device includes a substrate, a light source mounted on a top surface of the substrate, and a lid attached to the top surface of the substrate, the lid defining a reflective cup positioned over the light source. In another aspect, an optical device includes a substrate, a light source disposed on the substrate, and a lid disposed on the substrate. The lid defines a reflective cup for concentrating and passing light from the light source. The optical device further includes a film formed on an inner sidewall of the reflective cup for reflecting the light from the light source. The film includes a primer layer, a reflecting layer and a protective layer.
    Type: Application
    Filed: November 12, 2015
    Publication date: May 18, 2017
    Inventors: Hsin-Ying HO, Hsun-Wei CHAN, Lu-Ming LAI, Shih-Chieh TANG
  • Patent number: 9653656
    Abstract: An LED package with trenches traversing a die pad to provide a mechanical interlock mechanism to strengthen bonding between the die pad and an insulator such that de-lamination is less likely to occur between the die pad and the insulator. A chip carrying region is defined by a barrier portion formed by the insulator in the trenches and in gaps between electrodes and the die pad, such that a light converting layer is confined within the barrier portion.
    Type: Grant
    Filed: March 16, 2012
    Date of Patent: May 16, 2017
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventor: Hsun-Wei Chan
  • Publication number: 20170113922
    Abstract: A semiconductor device package includes a carrier, a sensor element disposed on or within the carrier, a cover and a filter. The cover includes a base substrate and a periphery barrier. The base substrate includes an inner sidewall. The inner sidewall of the base substrate defines a penetrating hole extending from a top surface of the base substrate to a bottom surface of the base substrate; at least a portion of the inner sidewall of the base substrate is tilted. The periphery barrier is coupled to the bottom surface of the base substrate and contacts a top surface of the carrier. The filter is disposed on the top surface of the base substrate and covers the penetrating hole.
    Type: Application
    Filed: October 27, 2015
    Publication date: April 27, 2017
    Inventors: Ching-Han HUANG, Hsun-Wei CHAN, Yu-Hsuan TSAI
  • Publication number: 20170110426
    Abstract: The present disclosure relates to a semiconductor device package, which includes a carrier, a lid, a first adhesive layer and a constraint structure. The carrier includes a surface and a first conductive pad on the surface of the carrier. The lid includes a first portion and a second portion separated from the first portion on the surface of the carrier. The first conductive pad is disposed between the first portion of the lid and the surface of the carrier. The first adhesive layer includes a first portion between the first portion of the lid and the first conductive pad. The constraint structure surrounds the first adhesive layer.
    Type: Application
    Filed: October 14, 2016
    Publication date: April 20, 2017
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chun-Han Chen, Hsun-Wei Chan, Mei-Yi Wu
  • Publication number: 20170082485
    Abstract: An optical device includes an active optical component including an optical area, an encapsulant covering the active optical component, and a passive optical component adhered to the encapsulant above the active optical component. The passive optical component has an optical axis, and the optical axis is substantially aligned with a center of the optical area.
    Type: Application
    Filed: September 15, 2016
    Publication date: March 23, 2017
    Inventors: Yi Wen CHIANG, Hsin-Ying HO, Hsun-Wei CHAN, Lu-Ming LAI
  • Publication number: 20170073221
    Abstract: A semiconductor device package includes a carrier, a wall disposed on a top surface of the carrier, a cover, and a sensor element. The cover includes a portion protruding from a bottom surface of the cover, where the protruding portion of the cover contacts a top surface of the wall to define a space. The sensor element is positioned in the space.
    Type: Application
    Filed: September 16, 2015
    Publication date: March 16, 2017
    Inventors: Ching-Han Huang, Hsun-Wei Chan, Lu-Ming Lai
  • Publication number: 20160178366
    Abstract: An optical module includes a carrier, a light source disposed on an upper side of the carrier, an optical sensor disposed on the upper side of the carrier, and a housing disposed on the upper side of the carrier over the light source and the optical sensor. The housing defines a first aperture exposing at least a portion of the light source and a second aperture exposing at least a portion of the optical sensor. An outer sidewall of the housing includes at least one singulation portion adjacent to the upper side of the carrier and perpendicular to the upper side of the carrier.
    Type: Application
    Filed: December 18, 2015
    Publication date: June 23, 2016
    Inventors: Ying-Chung CHEN, Hsun-Wei CHAN, Lu-Ming LAI, Kuang-Hsiung CHEN
  • Publication number: 20160146639
    Abstract: An optical module includes a substrate, a lid, a light-emitting component, a first sensor and a second sensor. The lid is disposed on a surface of the substrate. The lid defines a first opening, a second opening and a third opening. The second opening is between the first opening and the third opening. The light-emitting component is disposed on the surface of the substrate and in the first opening. The first sensor is disposed on the surface of the substrate and in the second opening. The second sensor is disposed on the surface of the substrate and in the third opening.
    Type: Application
    Filed: November 20, 2015
    Publication date: May 26, 2016
    Inventor: Hsun-Wei CHAN
  • Patent number: 8637887
    Abstract: A chip package having a lead frame and a molded portion. The lead frame includes a thermal pad and at least one electrode. The molded portion partially encapsulates the at least one electrode such that it is exposed on a top surface but not on a bottom surface. A bottom surface of the thermal pad is exposed for direct securement to an external heat sink. The molded portion is disposed between the at least one electrode and the heat sink to prevent a short circuit.
    Type: Grant
    Filed: May 8, 2012
    Date of Patent: January 28, 2014
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventor: Hsun-Wei Chan
  • Publication number: 20130299960
    Abstract: A chip package having a lead frame and a molded portion. The lead frame includes a thermal pad and at least one electrode. The molded portion partially encapsulates the at least one electrode such that it is exposed on a top surface but not on a bottom surface. A bottom surface of the thermal pad is exposed for direct securement to an external heat sink. The molded portion is disposed between the at least one electrode and the heat sink to prevent a short circuit.
    Type: Application
    Filed: May 8, 2012
    Publication date: November 14, 2013
    Inventor: Hsun-Wei Chan
  • Publication number: 20130242524
    Abstract: An LED package with trenches traversing a die pad to provide a mechanical interlock mechanism to strengthen bonding between the die pad and an insulator such that de-lamination is less likely to occur between the die pad and the insulator. A chip carrying region is defined by a barrier portion formed by the insulator in the trenches and in gaps between electrodes and the die pad, such that a light converting layer is confined within the barrier portion.
    Type: Application
    Filed: March 16, 2012
    Publication date: September 19, 2013
    Inventor: Hsun-Wei Chan