Patents by Inventor Hsun Yeh

Hsun Yeh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170271076
    Abstract: A single-ended inductor comprises a first partial coil wound in a first direction; and a second partial coil wound in a second direction and adjoined the first partial coil; wherein, the second direction is opposite to the first direction to reduce the coupling of single-ended inductors and peripheral lines and reduce signal interference.
    Type: Application
    Filed: March 17, 2017
    Publication date: September 21, 2017
    Inventors: Cheng Wei LUO, Hsiao-Tsung YEN, Ta-Hsun YEH, Yuh-Sheng JEAN
  • Patent number: 9748326
    Abstract: This invention discloses a structure of an integrated inductor, comprising: an outer metal segment which comprises a first metal sub-segment and a second metal sub-segment; an inner metal segment which is arranged inside an area surrounded by the outer metal segment and comprises a third metal sub-segment and a fourth metal sub-segment; and at least a connecting structure for connecting the outer metal segment and the inner metal segment. The first metal sub-segment corresponds to the third metal sub-segment, and the first metal sub-segment and the third metal sub-segment belong to different metal layers in a semiconductor structure. The second metal sub-segment corresponds to the fourth metal sub-segment, and the second metal sub-segment and the fourth metal sub-segment belong to different metal layers in a semiconductor structure.
    Type: Grant
    Filed: May 22, 2015
    Date of Patent: August 29, 2017
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Hsiao-Tsung Yen, Yuh-Sheng Jean, Ta-Hsun Yeh
  • Patent number: 9748033
    Abstract: An integrated transformer includes a primary inductor and a secondary inductor wherein the primary inductor includes a B turns spiral winding formed by a first metal layer and an A turns winding formed by a second metal layer, wherein the A turns winding formed by the second metal layer and the innermost turns of the B turns spiral winding formed by the first metal layer are substantially overlapped; and the secondary inductor includes a C turns winding at least formed by the second metal layer, wherein the C turns winding formed by the second metal layer of the secondary inductor and a portion of the winding formed by the first metal layer of the primary inductor are substantially overlapped, wherein A is not bigger than B, and A is not bigger than C.
    Type: Grant
    Filed: May 21, 2015
    Date of Patent: August 29, 2017
    Assignee: Realtek Semiconductor Corp.
    Inventors: Hsiao-Tsung Yen, Yuh-Sheng Jean, Ta-Hsun Yeh
  • Publication number: 20170236791
    Abstract: The instant disclosure provides an integrated circuit device including a transmission line which includes a first ground line and a signal line. The first ground line includes a first pad, a second pad and a first bonding wire that is a bond wire structure connecting the first pad and the second pad. The first signal line includes a third pad, a fourth pad and a second bonding wire that is a bond wire structure connecting the third pad and the fourth pad.
    Type: Application
    Filed: February 17, 2017
    Publication date: August 17, 2017
    Inventors: Hsiao-Tsung Yen, Yuh-Sheng Jean, Ta-Hsun Yeh
  • Publication number: 20170200547
    Abstract: An 8-shaped integrated inductor includes a first terminal; a second terminal; a third terminal; a bridging structure that includes a first metal segment and a second metal segment, the first metal segment and the second metal segment being disposed in different layers of a semiconductor structure and partially overlapping; a first sensing unit employing the first terminal and the third terminal as its two terminals and including the first metal segment; and a second sensing unit employing the second terminal and the third terminal as its two terminals and including the second metal segment and a third metal segment. The third metal segment is disposed at a metal layer different from the second metal segment and conductively connecting other metal segments of the second sensing unit without crossing the metal segments of the first sensing unit.
    Type: Application
    Filed: December 2, 2016
    Publication date: July 13, 2017
    Inventors: HSIAO-TSUNG YEN, CHENG-WEI LUO, YUH-SHENG JEAN, TA-HSUN YEH
  • Publication number: 20170125160
    Abstract: An integrated circuit includes a first inductor, a second inductor, and a blocker. The first inductor is disposed in a metal layer, and the second is disposed in the metal layer. The blocker is disposed on the metal layer and located between the first inductor and the second inductor. The blocker is configured to block coupling occurring between the first inductor and the second inductor.
    Type: Application
    Filed: April 12, 2016
    Publication date: May 4, 2017
    Inventors: Hsiao-Tsung YEN, Yuh-Sheng JEAN, Ta-Hsun YEH
  • Publication number: 20170117079
    Abstract: A helical stacked integrated transformer formed by a first inductor and a second inductor includes a first helical coil that has a first outer coil and a first inner coil, a second helical coil that shares an overlapped region with the first helical coil and has a second outer coil and a second inner coil, and a connection structure that connects the first helical coil and the second helical coil. The first inner coil is located inside the first outer coil and the second inner coil is located inside the second outer coil. The first inductor includes a part of the first helical coil and a part of the second helical coil. The second inductor includes a part of the first helical coil and a part of the second helical coil.
    Type: Application
    Filed: October 12, 2016
    Publication date: April 27, 2017
    Inventors: Hsiao-Tsung Yen, Yuh-Sheng Jean, Ta-Hsun Yeh
  • Publication number: 20170098500
    Abstract: An integrated inductor structure includes a first spiral coil, a second spiral coil and a connection metal segment. The first spiral coil includes a plurality of metal segments, a bridging segment and first to fourth terminals. The bridging segment connects the metal segments. The second spiral coil has fifth and sixth terminals. The connecting metal segment connects the third and fifth terminals and the fourth and the sixth terminals. The integrated inductor structure uses the first and second terminals as its input and output terminals. The first and third terminals are on a first imaginary line, which passes a central region of a region surrounded by the first spiral coil. The bridging segment and the central region of the region are on a second imaginary line. An included angle between the two imaginary lines is equal to or greater than 45 degrees and equal to or smaller than 90 degrees.
    Type: Application
    Filed: September 19, 2016
    Publication date: April 6, 2017
    Inventors: HSIAO-TSUNG YEN, YUH-SHENG JEAN, TA-HSUN YEH
  • Patent number: 9590582
    Abstract: A semiconductor device with an inductor-capacitor (LC) resonant circuit includes a first insulation layer, an inductor component, and a capacitor component. The inductor component includes a coil-conductor segment and two extension-conductor segments. The coil-conductor segment and the extension-conductor segments are located on a same surface of the first insulation layer, and the extension-conductor segments are coupled to two ends of the coil-conductor segment, respectively. The extension-conductor segments are arranged at an interval, and extend outwards relative to the coil-conductor segment. A first region is defined by the extension-conductor segments and the coil-conductor segment, and the capacitor component is arranged corresponding to the first region in an embedded manner on the other surface, opposite to the inductor component, of the first insulation layer.
    Type: Grant
    Filed: July 23, 2014
    Date of Patent: March 7, 2017
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: Hsiao-Tsung Yen, Yuh-Sheng Jean, Ta-Hsun Yeh
  • Patent number: 9576946
    Abstract: A method of manufacturing a semiconductor device, comprising: providing a substrate; forming a first trough structure, which comprises at least a first sidewall, on the substrate; forming a first doping layer on the first sidewall; covering the first doping layer and a part of a surface of the substrate by a photoresist; forming a second trough structure, which comprises at least a second sidewall, on a part of the substrate which is not covered by the photoresist; removing the photoresist; forming an insulation layer on the substrate, the first trough structure, and the second trough structure; forming a conductive layer on the substrate, the first trough structure, and the second trough structure; and removing parts of the insulation layer and the conductive layer outside the first trough structure and the second trough structure to expose a surface of the first doping layer at the opening of the first trough structure.
    Type: Grant
    Filed: March 29, 2016
    Date of Patent: February 21, 2017
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Hsiao-Tsung Yen, Yuh-Sheng Jean, Ta-Hsun Yeh
  • Patent number: 9520220
    Abstract: A device having a variable inductor includes an inductor having an inductance, a first conductor having a first grounding property, and a second conductor having a second grounding property. The device further includes a first single-mesh structure including a first grid. The first grid includes a first conducting wire electrically connected to the first conductor, and a second conducting wire electrically connected to the first conducting wire and the first conductor, wherein the first conducting wire, the second conducting wire and the first conductor are configured to form a first loop corresponding to the inductor for tuning the inductance. The first single-mesh structure further includes a second grid.
    Type: Grant
    Filed: October 3, 2014
    Date of Patent: December 13, 2016
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: Hsiao-Tsung Yen, Yuh-Sheng Jean, Ta-Hsun Yeh
  • Publication number: 20160343502
    Abstract: An inductor device includes a conductor and a connector. The conductor includes a first ring-type structure and a second ring-type structure. The second ring-type structure is coupled to the first ring-type structure. The connector is coupled to the first ring-type structure and the second ring-type structure, and is configured to selectively connect the first ring-type structure and the second ring-type structure such that the conductor forms single loop.
    Type: Application
    Filed: February 5, 2016
    Publication date: November 24, 2016
    Inventors: Hsiao-Tsung YEN, Yuh-Sheng JEAN, Ta-Hsun YEH
  • Publication number: 20160329281
    Abstract: This invention discloses a structure of an integrated inductor, comprising: an outer metal segment which comprises a first metal sub-segment and a second metal sub-segment; an inner metal segment which is arranged inside an area surrounded by the outer metal segment and comprises a third metal sub-segment and a fourth metal sub-segment; and at least a connecting structure for connecting the outer metal segment and the inner metal segment. The first metal sub-segment corresponds to the third metal sub-segment, and the first metal sub-segment and the third metal sub-segment belong to different metal layers in a semiconductor structure. The second metal sub-segment corresponds to the fourth metal sub-segment, and the second metal sub-segment and the fourth metal sub-segment belong to different metal layers in a semiconductor structure.
    Type: Application
    Filed: July 18, 2016
    Publication date: November 10, 2016
    Inventors: HSIAO-TSUNG YEN, YUH-SHENG JEAN, TA-HSUN YEH
  • Publication number: 20160315136
    Abstract: An integrated inductor includes a patterned ground shield, an inner rail, and an inductor. The patterned ground shield is disposed in a first direction. The inner rail is coupled to the patterned ground shield. The inner rail is disposed inside the integrated inductor and in a second direction. The first direction is perpendicular to the second direction. The inductor is disposed above the patterned ground shield.
    Type: Application
    Filed: January 20, 2016
    Publication date: October 27, 2016
    Inventors: Hsiao-Tsung YEN, Yuh-Sheng JEAN, Ta-Hsun YEH
  • Patent number: 9466526
    Abstract: A metal trench de-coupling capacitor structure includes a vertical trench disposed in a substrate, an insulating layer deposited on the sidewall of the vertical trench, an inter-layer dielectric layer covering the substrate and the insulating layer, and a metal layer penetrating the interlayer dielectric layer to fill up the vertical trench. The metal layer is electrically connected to a power source.
    Type: Grant
    Filed: August 7, 2014
    Date of Patent: October 11, 2016
    Assignee: Realtek Semiconductor Corp.
    Inventor: Ta-Hsun Yeh
  • Patent number: 9412751
    Abstract: An electronic device includes a core circuit and multiple pad units. The core circuit includes multiple core MOS and the multiple pad units are respectively electrically connected to the core circuit. Each pad unit includes at least one pad MOS. A core gate in each core MOS and a pad gate in each pad MOS extend along the same direction or extend parallel with each other.
    Type: Grant
    Filed: August 19, 2013
    Date of Patent: August 9, 2016
    Assignee: Realtek Semiconductor Corp.
    Inventors: Ta-Hsun Yeh, Tay-Her Tsaur, Cheng-Cheng Yen
  • Publication number: 20160225508
    Abstract: An integrated inductor structure includes a guard ring, a patterned ground shield, and an inductor. The guard ring includes an inner ring, an outer ring, and an interlaced structure. The inner ring is disposed in a first metal layer, and includes at least two inner ring openings. The outer ring is disposed in a second metal layer, and includes at least one outer ring opening. The interlaced structure is coupled to one of the at least two inner ring openings and the outer ring opening in an interlaced manner, such that the outer ring opening is enclosed. The patterned ground shield is disposed at an inner side of the inner ring, and coupled to the inner ring and the outer ring. The inductor is formed above the guard ring and the patterned ground shield.
    Type: Application
    Filed: May 20, 2015
    Publication date: August 4, 2016
    Inventors: Hsiao-Tsung YEN, Yuh-Sheng JEAN, Ta-Hsun YEH
  • Publication number: 20160211255
    Abstract: A method of manufacturing a semiconductor device, comprising: providing a substrate; forming a first trough structure, which comprises at least a first sidewall, on the substrate; forming a first doping layer on the first sidewall; covering the first doping layer and a part of a surface of the substrate by a photoresist; forming a second trough structure, which comprises at least a second sidewall, on a part of the substrate which is not covered by the photoresist; removing the photoresist; forming an insulation layer on the substrate, the first trough structure, and the second trough structure; forming a conductive layer on the substrate, the first trough structure, and the second trough structure; and removing parts of the insulation layer and the conductive layer outside the first trough structure and the second trough structure to expose a surface of the first doping layer at the opening of the first trough structure.
    Type: Application
    Filed: March 29, 2016
    Publication date: July 21, 2016
    Inventors: Hsiao-Tsung YEN, Yuh-Sheng JEAN, Ta-Hsun YEH
  • Patent number: 9373508
    Abstract: A semiconductor device and a fabricating method thereof are provided. The semiconductor device is formed on a substrate and includes a first first-type metal-oxide-semiconductor field effect transistor (MOSFET) and a second first-type MOSFET. The first first-type MOSFET includes a first gate structure, a first source area and a first drain area on the substrate. The second first-type MOSFET includes a second gate structure, a second source area, and a second drain area on the substrate. A first pocket implant process is applied to the first first-type MOSFET via a first photomask, while a second pocket implant process is applied to the second first-type MOSFET via a second photomask. The first and second gate structures are facing different directions.
    Type: Grant
    Filed: July 30, 2013
    Date of Patent: June 21, 2016
    Assignee: Realtek Semiconductor Corporation
    Inventors: Ta-Hsun Yeh, Hui-Min Huang, Yuh-Sheng Jean
  • Patent number: 9337181
    Abstract: A semiconductor device includes a substrate, a first trough structure and a second trough structure. The first trough structure which is in the substrate includes a first conductive layer, a first doping layer and a first insulation layer, which is placed between the first conductive layer and the first doping layer. The second trough structure which is in the substrate and separated from the first trough structure by a separation part of the substrate includes a second conductive layer and a second insulation layer. A first contact connects the first doping layer, a second contact connects the separation part, and a third contact connects the second conductive layer. The separation part forms a resistor, coupled between the first contact and the second contact, and the substrate, the second insulation layer and the second conductive layer together form a capacitor, coupled between the second contact and the third contact.
    Type: Grant
    Filed: March 4, 2015
    Date of Patent: May 10, 2016
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Hsiao-Tsung Yen, Yuh-Sheng Jean, Ta-Hsun Yeh