Patents by Inventor Hsun-Ying Huang

Hsun-Ying Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9923011
    Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a first semiconductor die and a second semiconductor die. The semiconductor device structure also includes a passivation layer between the first semiconductor die and the second semiconductor die, and the passivation layer is directly bonded to a second interlayer dielectric layer of the second semiconductor die. The semiconductor device structure further includes a conductive feature in via hole and directly bonded to a second conductive line of the second semiconductor die. The semiconductor device structure further includes a second barrier layer between the conductive feature and the passivation layer. The second barrier layer covers sidewalls of the conductive feature and a surface of the conductive feature closer to the first semiconductor die.
    Type: Grant
    Filed: January 12, 2016
    Date of Patent: March 20, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Min-Feng Kao, Dun-Nian Yaung, Jen-Cheng Liu, Hsun-Ying Huang
  • Patent number: 9875989
    Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a semiconductor substrate having a first surface and a second surface. The semiconductor substrate has an active region. The semiconductor substrate is doped with first dopants with a first-type conductivity. The active region is adjacent to the first surface and doped with second dopants with a second-type conductivity. The semiconductor device structure includes a doped layer over the second surface and doped with third dopants with the first-type conductivity. A first doping concentration of the third dopants in the doped layer is greater than a second doping concentration of the first dopants in the semiconductor substrate. The semiconductor device structure includes a conductive bump over the doped layer.
    Type: Grant
    Filed: January 12, 2016
    Date of Patent: January 23, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Min-Feng Kao, Dun-Nian Yaung, Jen-Cheng Liu, Jeng-Shyan Lin, Hsun-Ying Huang
  • Patent number: 9812482
    Abstract: A frontside illuminated (FSI) image sensor with a reflector is provided. A photodetector is buried in a sensor substrate. A support substrate is arranged under and bonded to the sensor substrate. The reflector is arranged under the photodetector, between the sensor and support substrates, and is configured to reflect incident radiation towards the photodetector. A method for manufacturing the FSI image sensor and the reflector is also provided.
    Type: Grant
    Filed: December 28, 2015
    Date of Patent: November 7, 2017
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Min-Feng Kao, Dun-Nian Yaung, Jen-Cheng Liu, Jeng-Shyan Lin, Hsun-Ying Huang, Tzu-Hsuan Hsu
  • Patent number: 9786592
    Abstract: An integrated circuit structure with a back side through silicon via (B/S TSV) therein and a method of forming the same is disclosed. The method includes the steps of: receiving a wafer comprising a substrate having a front side that has a conductor thereon and a back side; forming a back side through silicon via (B/S TSV) from the back side of the substrate to penetrate the substrate; and filling the back side through silicon via (B/S TSV) with a conductive material to form an electrical connection with the conductor. Thus a back side through silicon via penetrates the back side of the substrate and electrically connects to the conductor on the front side of the substrate is formed.
    Type: Grant
    Filed: October 30, 2015
    Date of Patent: October 10, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Jeng-Shyan Lin, Dun-Nian Yaung, Hsing-Chih Lin, Jen-Cheng Liu, Min-Feng Kao, Hsun-Ying Huang
  • Publication number: 20170200697
    Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a semiconductor substrate having a first surface and a second surface. The semiconductor substrate has an active region. The semiconductor substrate is doped with first dopants with a first-type conductivity. The active region is adjacent to the first surface and doped with second dopants with a second-type conductivity. The semiconductor device structure includes a doped layer over the second surface and doped with third dopants with the first-type conductivity. A first doping concentration of the third dopants in the doped layer is greater than a second doping concentration of the first dopants in the semiconductor substrate. The semiconductor device structure includes a conductive bump over the doped layer.
    Type: Application
    Filed: January 12, 2016
    Publication date: July 13, 2017
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Min-Feng KAO, Dun-Nian YAUNG, Jen-Cheng LIU, Jeng-Shyan LIN, Hsun-Ying HUANG
  • Publication number: 20170200756
    Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a first semiconductor die and a second semiconductor die. The semiconductor device structure also includes a passivation layer between the first semiconductor die and the second semiconductor die, and the passivation layer is directly bonded to a second interlayer dielectric layer of the second semiconductor die. The semiconductor device structure further includes a conductive feature in via hole and directly bonded to a second conductive line of the second semiconductor die. The semiconductor device structure further includes a second barrier layer between the conductive feature and the passivation layer. The second barrier layer covers sidewalls of the conductive feature and a surface of the conductive feature closer to the first semiconductor die.
    Type: Application
    Filed: January 12, 2016
    Publication date: July 13, 2017
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Min-Feng KAO, Dun-Nian YAUNG, Jen-Cheng LIU, Hsun-Ying HUANG
  • Publication number: 20170186799
    Abstract: The present disclosure relates to a method of forming a multi-dimensional integrated chip having tiers connected in a front-to-back configuration, and an associated apparatus. In some embodiments, the method is performed by forming one or more semiconductor devices within a first substrate, forming one or more image sensing elements within a second substrate, and bonding a first dielectric structure over the first substrate to a back-side of the second substrate by way of a bonding structure. An inter-tier interconnect structure, comprising a plurality of different segments, respectively having sidewalls with different sidewall angles, is formed to extend through the bonding structure and the second substrate. The inter-tier interconnect structure is configured to electrically couple a first metal interconnect layer over the first substrate to a second metal interconnect layer over the second substrate.
    Type: Application
    Filed: November 30, 2016
    Publication date: June 29, 2017
    Inventors: Jeng-Shyan Lin, Dun-Nian Yaung, Jen-Cheng Liu, Hsun-Ying Huang, Wei-Chih Weng, Yu-Yang Shen
  • Publication number: 20170186796
    Abstract: A frontside illuminated (FSI) image sensor with a reflector is provided. A photodetector is buried in a sensor substrate. A support substrate is arranged under and bonded to the sensor substrate. The reflector is arranged under the photodetector, between the sensor and support substrates, and is configured to reflect incident radiation towards the photodetector. A method for manufacturing the FSI image sensor and the reflector is also provided.
    Type: Application
    Filed: December 28, 2015
    Publication date: June 29, 2017
    Inventors: Min-Feng Kao, Dun-Nian Yaung, Jen-Cheng Liu, Jeng-Shyan Lin, Hsun-Ying Huang, Tzu-Hsuan Hsu
  • Patent number: 9679939
    Abstract: A backside illuminated (BSI) image sensor device includes a device layer, a doped isolation region and a doped radiation sensing region. The device layer has a front side and a backside, in which the device layer has a thickness greater than or equal to 4 ?m. The doped isolation region having a first dopant of a first conductivity is through the device layer to define a plurality of pixel regions of the device layer, in which the doped isolation region includes a first upper region adjacent to the front side and a first lower region between the first upper region and the backside, and the first upper region has a width less than a width of the first lower region. The doped radiation sensing region having a second dopant of a second conductivity opposite to the first conductivity is in one of the pixel regions of the device layer.
    Type: Grant
    Filed: July 12, 2016
    Date of Patent: June 13, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yun-Wei Cheng, Yin-Chieh Huang, Ching-Chun Wang, Chun-Hao Chou, Kuo-Cheng Lee, Hsun-Ying Huang
  • Publication number: 20170154850
    Abstract: In some embodiments, the present disclosure relates to an integrated chip (IC) having a back-side through-silicon-via (BTSV) with a direct physical connection between a metal interconnect layer and a back-side conductive bond pad. The IC has metal interconnect layers arranged within an inter-level dielectric structure disposed onto a front-side of a substrate. A dielectric layer is arranged along a back-side of the substrate, and a conductive bond pad is arranged over the dielectric layer. A BTSV extends from one of the metal interconnect layers through the substrate and the dielectric layer to the conductive bond pad. A conductive bump is arranged onto the conductive bond pad, which has a substantially planar lower surface extending from over the BTSV to below the conductive bump. Directly connecting the conductive bond pad to the BTSV reduces a size of the conductive bond thereby improving a routing capability of the conductive bond pad.
    Type: Application
    Filed: May 2, 2016
    Publication date: June 1, 2017
    Inventors: Min-Feng Kao, Dun-Nian Yaung, Jen-Cheng Liu, Hsun-Ying Huang
  • Publication number: 20170125341
    Abstract: An integrated circuit structure with a back side through silicon via (B/S TSV) therein and a method of forming the same is disclosed. The method includes the steps of: receiving a wafer comprising a substrate having a front side that has a conductor thereon and a back side; forming a back side through silicon via (B/S TSV) from the back side of the substrate to penetrate the substrate; and filling the back side through silicon via (B/S TSV) with a conductive material to form an electrical connection with the conductor. Thus a back side through silicon via penetrates the back side of the substrate and electrically connects to the conductor on the front side of the substrate is formed.
    Type: Application
    Filed: October 30, 2015
    Publication date: May 4, 2017
    Inventors: Jeng-Shyan LIN, Dun-Nian YAUNG, Hsing-Chih LIN, Jen-Cheng LIU, Min-Feng KAO, Hsun-Ying HUANG
  • Patent number: 9543355
    Abstract: A method of fabricating a semiconductor image sensor device is disclosed. A plurality of radiation-sensing regions is formed in a substrate. The radiation-sensing regions are formed in a non-scribe-line region of the image sensor device. An opening is formed in a scribe-line region of the image sensor device by etching the substrate in the scribe-line region. A portion of the substrate remains in the scribe-line region after the etching. The opening is then filled with an organic material.
    Type: Grant
    Filed: August 10, 2015
    Date of Patent: January 10, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shou-Shu Lu, Hsun-Ying Huang, Hsin-Jung Huang, Chun-Mao Chiu, Chia-Chi Hsiao, Yung-Cheng Chang
  • Publication number: 20150349009
    Abstract: A method of fabricating a semiconductor image sensor device is disclosed. A plurality of radiation-sensing regions is formed in a substrate. The radiation-sensing regions are formed in a non-scribe-line region of the image sensor device. An opening is formed in a scribe-line region of the image sensor device by etching the substrate in the scribe-line region. A portion of the substrate remains in the scribe-line region after the etching. The opening is then filled with an organic material.
    Type: Application
    Filed: August 10, 2015
    Publication date: December 3, 2015
    Inventors: Shou-Shu Lu, Hsun-Ying Huang, Hsin-Jung Huang, Chun-Mao Chiu, Chia-Chi Hsiao, Yung-Cheng Chang
  • Patent number: 9142709
    Abstract: A method includes providing a substrate having a first surface and a second surface, the first surface being opposite the second surface, forming a light sensing region at the first surface of the substrate, forming a doped layer at the second surface of the substrate using a laser annealing process, and performing a chemical mechanical polishing process on the annealed, doped layer.
    Type: Grant
    Filed: August 19, 2014
    Date of Patent: September 22, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shou-Shu Lu, Hsun-Ying Huang, I-Chang Lin, Chia-Chi Hsiao, Yung-Cheng Chang
  • Patent number: 9129878
    Abstract: Embodiments of mechanisms of a backside illuminated image sensor device structure are provided. The backside illuminated image sensor device structure includes a substrate having a frontside and a backside and a pixel array formed in the frontside of the substrate. The backside illuminated image sensor device structure further includes an antireflective layer formed over the backside of the substrate, and the antireflective layer is made of silicon carbide nitride.
    Type: Grant
    Filed: September 17, 2013
    Date of Patent: September 8, 2015
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Bo-Chang Su, Chih-Ho Tai, Wei-Chih Weng, Hsun-Ying Huang, Hsien-Liang Meng
  • Patent number: 9123616
    Abstract: A method of fabricating a semiconductor image sensor device is disclosed. A plurality of radiation-sensing regions is formed in a substrate. The radiation-sensing regions are formed in a non-scribe-line region of the image sensor device. An opening is formed in a scribe-line region of the image sensor device by etching the substrate in the scribe-line region. A portion of the substrate remains in the scribe-line region after the etching. The opening is then filled with an organic material.
    Type: Grant
    Filed: July 3, 2014
    Date of Patent: September 1, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shou-Shu Lu, Hsun-Ying Huang, Hsin-Jung Huang, Chun-Mao Chiu, Chia-Chi Hsiao, Yung-Cheng Chang
  • Publication number: 20150076638
    Abstract: Embodiments of mechanisms of a backside illuminated image sensor device structure are provided. The backside illuminated image sensor device structure includes a substrate having a frontside and a backside and a pixel array formed in the frontside of the substrate. The backside illuminated image sensor device structure further includes an antireflective layer formed over the backside of the substrate, and the antireflective layer is made of silicon carbide nitride.
    Type: Application
    Filed: September 17, 2013
    Publication date: March 19, 2015
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Bo-Chang SU, Chih-Ho TAI, Wei-Chih WENG, Hsun-Ying HUANG, Hsien-Liang MENG
  • Patent number: 8980674
    Abstract: Provided is a semiconductor image sensor device. The image sensor device includes a semiconductor substrate that includes an array region and a black level correction region. The array region contains a plurality of radiation-sensitive pixels. The black level correction region contains one or more reference pixels. The substrate has a front side and a back side. The image sensor device includes a first compressively-stressed layer formed on the back side of the substrate. The first compressively-stressed layer contains silicon nitride. The image sensor device includes a metal shield formed on the compressively-stressed layer. The metal shield is formed over at least a portion of the black level correction region. The image sensor device includes a second compressively-stressed layer formed on the metal shield and the first compressively-stressed layer. The second compressively-stressed layer contains silicon oxide. A sidewall of the metal shield is protected by the second compressively-stressed layer.
    Type: Grant
    Filed: March 26, 2014
    Date of Patent: March 17, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei-Chih Weng, Hsun-Ying Huang, Yung-Cheng Chang, Jin-Hong Cho
  • Publication number: 20140357010
    Abstract: A method includes providing a substrate having a first surface and a second surface, the first surface being opposite the second surface, forming a light sensing region at the first surface of the substrate, forming a doped layer at the second surface of the substrate using a laser annealing process, and performing a chemical mechanical polishing process on the annealed, doped layer.
    Type: Application
    Filed: August 19, 2014
    Publication date: December 4, 2014
    Inventors: Shou-Shu Lu, Hsun-Ying Huang, I-Chang Lin, Chia-Chi Hsiao, Yung-Cheng Chang
  • Publication number: 20140322857
    Abstract: A method of fabricating a semiconductor image sensor device is disclosed. A plurality of radiation-sensing regions is formed in a substrate. The radiation-sensing regions are formed in a non-scribe-line region of the image sensor device. An opening is formed in a scribe-line region of the image sensor device by etching the substrate in the scribe-line region. A portion of the substrate remains in the scribe-line region after the etching. The opening is then filled with an organic material.
    Type: Application
    Filed: July 3, 2014
    Publication date: October 30, 2014
    Inventors: Shou-Shu Lu, Hsun-Ying Huang, Huang-Hsin Jung, Chun-Mao Chiu, Chia-Chi Hsiao, Yung-Cheng Chang