Patents by Inventor Hsun Yu

Hsun Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170179767
    Abstract: A coil assembly and a wireless power transmission system are provided. The coil assembly includes a first coil and a second coil. The first coil is disposed on a first plane. The second coil is disposed on a second plane. The second coil is coupled to the first coil. The second coil includes a plurality of bending section, and the bending sections are connected by a plurality of connection lines to form a single loop.
    Type: Application
    Filed: October 6, 2016
    Publication date: June 22, 2017
    Applicant: Industrial Technology Research Institute
    Inventors: Li-Chi Chang, Meng-Sheng Chen, Hsun Yu
  • Patent number: 9013892
    Abstract: A chip stacking structure including a plurality of microbump structures, a plurality of first substrates, at least one first space layer, a plurality of second substrates and at least one second space layer is provided. The first substrates are stacked upon each other by a portion of the microbump structures, and each of the first substrates includes at least one first redistribution layer. The first space layer is located between the stacked first substrates. The second substrates are stacked on at least one of the first substrates by another portion of the microbump structures, and each of the second substrates includes at least one second redistribution layer. The second space layer is located between the stacked first and second substrates. The first redistribution layers, the second redistribution layers and the microbump structures form a plurality of impedance elements, and the impedance elements provide a specific oscillation frequency.
    Type: Grant
    Filed: June 7, 2013
    Date of Patent: April 21, 2015
    Assignee: Industrial Technology Research Institute
    Inventors: Chang-Chih Liu, Hsun Yu, Peng-Shu Chen, Shih-Hsien Wu
  • Publication number: 20140177189
    Abstract: A chip stacking structure including a plurality of microbump structures, a plurality of first substrates, at least one first space layer, a plurality of second substrates and at least one second space layer is provided. The first substrates are stacked upon each other by a portion of the microbump structures, and each of the first substrates includes at least one first redistribution layer. The first space layer is located between the stacked first substrates. The second substrates are stacked on at least one of the first substrates by another portion of the microbump structures, and each of the second substrates includes at least one second redistribution layer. The second space layer is located between the stacked first and second substrates. The first redistribution layers, the second redistribution layers and the microbump structures form a plurality of impedance elements, and the impedance elements provide a specific oscillation frequency.
    Type: Application
    Filed: June 7, 2013
    Publication date: June 26, 2014
    Inventors: Chang-Chih Liu, Hsun Yu, Peng-Shu Chen, Shih-Hsien Wu