Patents by Inventor Hu Liu

Hu Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220118574
    Abstract: The present disclosure relates to a method for online monitoring defect of a milling tool, comprising the steps of: 1) installing a vibration sensor module on a machine tool spindle; 2) acquiring initial sample data; 3) setting a threshold value ?S0 with a time interval of T; 4) measuring vibration signals of n blades in x, y and z directions in each period T0; 5) shaping to obtain n strong vibration cutting wave data respectively formed by n blades in x and y directions in each period T0; 6) analyzing and processing the strong vibration cutting wave data to obtain the difference ?S0/ between the cutting strong vibration wave areas formed by each blade in each period T0; 7) outputting a blade wear or defect signal to a display alarm module according to the constraint conditions by a data comparing and analyzing module, and giving an alarm by a display alarm module.
    Type: Application
    Filed: September 3, 2020
    Publication date: April 21, 2022
    Inventors: HUAJUN CAO, DEGUI QUI, HU LIU, YINGQING CHAI
  • Publication number: 20220114235
    Abstract: A matrix processing method performed by a graphics processing unit (GPU) includes: determining a plurality of non-zero elements in a to-be-processed matrix at a processor in the GPU; generating a distribution matrix of the to-be-processed matrix at the processor, where the distribution matrix comprises identities for indicating positions of the plurality of non-zero elements in the to-be-processed matrix; obtaining a target matrix from another matrix by using the distribution matrix at a logic circuit in the processor, where the target matrix comprises a plurality of target elements from the another matrix; and performing matrix processing on the plurality of non-zero elements and the target matrix to obtain an operation result at the processor.
    Type: Application
    Filed: December 23, 2021
    Publication date: April 14, 2022
    Applicant: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Zhenjiang Dong, CHIO IN IEONG, Hu Liu, Hai Chen
  • Patent number: 11295982
    Abstract: A method of fabricating ultra-thin chips is provided. The method includes patterning circuit elements onto a substrate such that sections of the substrate are exposed and etching trenches into the sections of the substrate to define pedestals respectively associated with a corresponding circuit element. The method further includes depositing stressor layer material onto the circuit elements and applying handling tape to the stressor layer material. In addition, the method includes at least one of weakening the substrate in a plane defined by base corners of the pedestals and initiating substrate cracking at the base corners of the pedestals to encourage spalling of the pedestals off the substrate.
    Type: Grant
    Filed: June 11, 2019
    Date of Patent: April 5, 2022
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Katsuyuki Sakuma, Huan Hu, Xiao Hu Liu
  • Publication number: 20220098319
    Abstract: An antibody targeting CD73, a preparation method therefor and a use thereof. The provided monoclonal antibody can bind to a CD73 antigen with high specificity, and has high affinity and significant antitumor activity.
    Type: Application
    Filed: January 13, 2020
    Publication date: March 31, 2022
    Inventors: Dongxu WANG, Qing DUAN, Lile LIU, Tatchi Teddy YANG, Hu LIU, Ye HAN, Rongrong XIE, Xiaohui SHAO, Peng WANG, Qin ZHONG, Yajun HUANG, Jian WU, Meiling WANG, Yuandong WANG
  • Patent number: 11250108
    Abstract: A matrix processing method includes: determining a quantity of non-zero elements in a to-be-processed matrix, where the to-be-processed matrix is a one-dimensional matrix; generating a distribution matrix of the to-be-processed matrix, where the distribution matrix is used to indicate a position of a non-zero element in the to-be-processed matrix; combining the quantity of non-zero elements, values of all non-zero elements in the to-be-processed matrix arranged sequentially, and the distribution matrix, to obtain a compressed matrix of the to-be-processed matrix.
    Type: Grant
    Filed: May 8, 2020
    Date of Patent: February 15, 2022
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Zhenjiang Dong, Chio In Ieong, Hu Liu, Hai Chen
  • Publication number: 20220033501
    Abstract: Provided are a high-affinity full human monoclonal antibody highly specifically targeting to TIM-3 and a preparation method therefor. The monoclonal antibody has a remarkable antitumor activity, and can be used for preparing a related diagnostic reagent or a pharmaceutical composition preventing or treating diseases related to TIM-3 dysfunction.
    Type: Application
    Filed: December 2, 2019
    Publication date: February 3, 2022
    Inventors: Ningning SONG, Qing DUAN, Lile LIU, Tatchi Teddy YANG, Lina XU, Hu LIU, Peipei WEI, Qian WANG, Yuangdong WANG, Xiaohui SHAO, Shaoping HU, Yu ZHANG, Jian WU, Meilling WANG, Dongxu WANG, Chaohui DAI, Mengying WANG
  • Publication number: 20220019105
    Abstract: A backlight module and a display device are disclosed, which include: a frame housing including a plurality of stress buffering sections corresponding to bending positions and a plurality of non-stress buffering sections adjacently connected to both ends of the stress buffering sections; a backlight element group disposed in an area surrounded by the frame housing; an adhesive disposed on a top of the frame housing corresponding to at least the non-stress buffering sections and surrounding the frame housing; and a buffer component disposed on the top of the frame housing corresponding to at least the stress buffering sections, wherein the buffer component and the adhesive are staggered from each other.
    Type: Application
    Filed: August 20, 2020
    Publication date: January 20, 2022
    Inventor: Hu LIU
  • Publication number: 20220003079
    Abstract: A simulation analysis method for an injection volume of alternate displacement of shale oil by carbon dioxide and nitrogen includes steps of simulating the alternate displacement of shale oil by carbon dioxide and nitrogen for multiple times through the core displacement simulation experiment, measuring the oil displacement efficiency change for every time, obtaining the porosity change in the entire displacement process through the porosity change before and after alternate displacement, and building the injection volume adjustment expression of alternate displacement of shale oil by carbon dioxide and nitrogen as a reference of the injection volume of alternate displacement of shale oil by carbon dioxide and nitrogen, so that the total displacement efficiency in the actual mining process is improved, thus increasing the production rate of shale oil and reducing the usage amount of carbon dioxide. A simulation analysis device is used to carry out the simulation analysis method.
    Type: Application
    Filed: September 21, 2021
    Publication date: January 6, 2022
    Inventors: Qian Cao, Minghui Qi, Yi Huang, Yeyu Zhang, Xu Peng, Hongyu Du, Hu Liu
  • Publication number: 20210355073
    Abstract: The instant invention provides processes for a chemo selective reduction of a nitro group within a compound in the presence of other groups which can also be reduced. This aspect of the present invention provides an ammonia borane (AB) initiated chemoselective reduction process of a nitro group contained within a compound in the presence of a copper (Cu) nanoparticle based catalyst. The invention is also directed to Copper (Cu) nanoparticle (NP) based catalysts, selected from Cu/WOx, Cu/SiO2, and Cu/C; wherein x represents an integer having a value of from about 2 to about 3.5, used in the chemo selective reduction of a nitro group contained within a compound in the presence of other groups which can also be reduced.
    Type: Application
    Filed: November 15, 2019
    Publication date: November 18, 2021
    Inventors: Shouheng SUN, Mengqi SHEN, Hu LIU
  • Patent number: 11133259
    Abstract: A multi-chip package structure includes a package substrate, an interconnect bridge device, first and second integrated circuit chips, and a connection structure. The first integrated circuit chip is flip-chip attached to at least the interconnect bridge device. The second integrated circuit chip is flip-chip attached to the interconnect bridge device and to the package substrate. The interconnect bridge device includes (i) wiring that is configured to provide chip-to-chip connections between the first and second integrated circuit chips and (ii) an embedded power distribution network that is configured to distribute at least one of a positive power supply voltage and a negative power supply voltage to at least one of the first and second integrated circuit chips attached to the interconnect bridge device. The connection structure (e.g., wire bond, injection molded solder, etc.) connects the embedded power distribution network to a power supply voltage contact of the package substrate.
    Type: Grant
    Filed: December 12, 2019
    Date of Patent: September 28, 2021
    Assignee: International Business Machines Corporation
    Inventors: Joshua M. Rubin, Arvind Kumar, Lawrence A. Clevenger, Steven Lorenz Wright, Wiren Dale Becker, Xiao Hu Liu
  • Publication number: 20210284624
    Abstract: Disclosed are immunomodulatory compounds, pharmaceutical compositions containing them, and methods of making and using the compounds to treat diseases and disorders characterized by aberrant protein activity that can be targeted by cereblon.
    Type: Application
    Filed: June 27, 2019
    Publication date: September 16, 2021
    Applicant: DANA-FARBER CANCER INSTITUTE, INC.
    Inventors: Nathanael Gray, Tinghu Zhang, Eric Fischer, Alyssa Verano, Zhixiang He, Guangyan Du, Katherine Donovan, Radoslaw Nowak, Jing Ting Christine Yuan, Hu Liu
  • Publication number: 20210224125
    Abstract: An operation accelerator, a processing method, and a related device, the operation accelerator including a first memory configured to store an input dataset, a matrix converter configured to perform reading M row vectors from the input dataset, generating a first instruction, and sending the M row vectors and the first instruction to a second memory configured to perform, according to the first instruction, preprocessing on the M row vectors to obtain n row vectors, and storing the n row vectors, where the n row vectors include the M row vectors and (n-M) padding row vectors, the n row vectors are N row vectors in a target matrix, and a storage sequence of the n row vectors in the second memory is consistent with a sequence of the N row vectors in the target matrix.
    Type: Application
    Filed: April 7, 2021
    Publication date: July 22, 2021
    Inventors: Hu Liu, Bin Huang
  • Publication number: 20210216483
    Abstract: The present disclosure discloses example operation accelerators and compression methods. One example operation accelerator performs operations, including storing, in a first buffer, first input data. In a second buffer, weight data can be stored. A computation result is obtained by performing matrix multiplication on the first input data and the weight data by an operation circuit connected to the input buffer and the weight buffer. The computation result is compressed by a compression module to obtain compressed data. The compressed data can be stored into a memory outside the operation accelerator by a direct memory access controller (DMAC) connected to the compression module.
    Type: Application
    Filed: March 29, 2021
    Publication date: July 15, 2021
    Inventors: Baoqing LIU, Hu LIU, Qinglong CHEN
  • Publication number: 20210183773
    Abstract: A multi-chip package structure includes a package substrate, an interconnect bridge device, first and second integrated circuit chips, and a connection structure. The first integrated circuit chip is flip-chip attached to at least the interconnect bridge device. The second integrated circuit chip is flip-chip attached to the interconnect bridge device and to the package substrate. The interconnect bridge device includes (i) wiring that is configured to provide chip-to-chip connections between the first and second integrated circuit chips and (ii) an embedded power distribution network that is configured to distribute at least one of a positive power supply voltage and a negative power supply voltage to at least one of the first and second integrated circuit chips attached to the interconnect bridge device. The connection structure (e.g., wire bond, injection molded solder, etc.) connects the embedded power distribution network to a power supply voltage contact of the package substrate.
    Type: Application
    Filed: December 12, 2019
    Publication date: June 17, 2021
    Inventors: Joshua M. Rubin, Arvind Kumar, Lawrence A. Clevenger, Steven Lorenz Wright, Wiren Dale Becker, Xiao Hu Liu
  • Publication number: 20210163454
    Abstract: Disclosed herein are compounds having a structure of formula (I), compositions and methods useful for the treatment of a disease or infection, such as a viral infection (e.g.
    Type: Application
    Filed: September 10, 2018
    Publication date: June 3, 2021
    Inventors: James Cunningham, Hu Liu, Ye Tian, Kyungae Lee
  • Patent number: 11015913
    Abstract: Aspects include a method of manufacturing a flexible electronic structure that includes a metal or doped silicon substrate. Aspects include depositing an insulating layer on a silicon substrate. Aspects also include patterning a metal on a silicon substrate. Aspects also include selectively masking the structure to expose the metal and a portion of the silicon substrate. Aspects also include depositing a conductive layer including a conductive metal on the structure. Aspects also include plating the conductive material on the structure. Aspects also include spalling the structure.
    Type: Grant
    Filed: April 22, 2019
    Date of Patent: May 25, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Huan Hu, Ning Li, Xiao Hu Liu, Katsuyuki Sakuma
  • Patent number: 10973915
    Abstract: Anti-PD-1 antibodies and antigen-binding fragments thereof are described. Also described are nucleic acids encoding the antibodies, compositions comprising the antibodies, and methods of producing the antibodies and using the antibodies for treating or preventing diseases such as cancers and autoimmune diseases.
    Type: Grant
    Filed: July 27, 2016
    Date of Patent: April 13, 2021
    Assignee: SHANGHAI YUNYI HEALTHCARE AND TECHNOLOGY CO., LTD.
    Inventors: Lile Liu, Xinxiu Yang, Haishan Luo, Hu Liu, Zhengrong Shuai, Jian Wang, Qin Zhong, Qing Duan, Hongzhuan Gu, Tatchi Teddy Yang
  • Patent number: 10964881
    Abstract: A piezoelectronic device with novel force amplification includes a first electrode; a piezoelectric layer disposed on the first electrode; a second electrode disposed on the piezoelectric layer; an insulator disposed on the second electrode; a piezoresistive layer disposed on the insulator; a third electrode disposed on the insulator; a fourth electrode disposed on the insulator; a semi-rigid housing surrounding the layers and the electrodes; wherein the semi-rigid housing is in contact with the first, third, and fourth electrodes and the piezoresistive layer; wherein the semi-rigid housing includes a void. The third and fourth electrodes are on the same plane and separated from each other in the transverse direction by a distance.
    Type: Grant
    Filed: November 29, 2017
    Date of Patent: March 30, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Bruce G. Elmegreen, Marcelo A. Kuroda, Xiao Hu Liu, Glenn J. Martyna, Dennis M. Newns, Paul M. Solomon
  • Patent number: 10957657
    Abstract: A method for constructing an advanced crack stop structure is described. An interconnection structure is formed comprised of a plurality of levels. Each level has an interconnect structure section and a crack stop section. In a first level of the interconnection structure, a high modulus layer is formed in the crack stop recess but not the interconnect recess and a barrier layer and a conductive metal layer is formed in both the interconnection recess and the crack stop recess of the first level. In a second level of the interconnection structure and the crack stop structure, a second high modulus layer is formed in the crack stop recess but not the interconnect recess and a barrier layer and a conductive metal layer is formed in both the interconnection recess and the crack stop recess of the second level. The barrier layers and high modulus layers are deposited in different steps.
    Type: Grant
    Filed: October 17, 2019
    Date of Patent: March 23, 2021
    Assignee: International Business Machines Corporation
    Inventors: Chih-Chao Yang, Baozhen Li, Xiao Hu Liu, Griselda Bonilla
  • Publication number: 20210072966
    Abstract: It is disclosed a computer-implemented method, a computing system, and a computer program product for service rolling-updating at a node in a container orchestrator system. In the method, in response to an instruction to update a service deployed on a first pod of a plurality of pods, a second pod is created at the node. The service is deployed on each of the plurality of pods at the node. A rule indicating that a set of requests for the service deployed on the first pod are to be routed to the second pod is generated. The first pod is deleted from the node. The set of requests are routed to the second pod according to the rule.
    Type: Application
    Filed: September 5, 2019
    Publication date: March 11, 2021
    Inventors: Dong Jun Zong, Yue Wang, Da Li Liu, Qi Feng Huo, Jing Xing, Jian Fang Zhang, Jing Hu Liu, Wen Tao Zhang