Patents by Inventor Hua Beng Chan
Hua Beng Chan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11543843Abstract: In one embodiment, an apparatus includes: an amplifier to compare a reference voltage to a feedback voltage and to output a comparison signal based on the comparison; a loop circuit coupled to the amplifier, where the loop circuit is to receive the comparison signal and provide a regulated voltage to the amplifier as the feedback voltage in a first mode of operation, and in a second mode of operation to provide a predetermined feedback ratio point to the amplifier as the feedback voltage; and an output device coupled to the amplifier. The output device may be configured to receive a supply voltage and the comparison signal and output the regulated voltage at an output node based at least in part on the comparison signal.Type: GrantFiled: April 14, 2021Date of Patent: January 3, 2023Assignee: Silicon Laboratories Inc.Inventors: Hua Beng Chan, Rex Tak Ying Wong, Ricky Setiawan
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Publication number: 20220326725Abstract: In an embodiment, an apparatus includes: an amplifier to compare a reference voltage to a feedback voltage and to output a comparison signal based on the comparison; a first loop circuit coupled to the amplifier to receive the comparison signal and output a first feedback voltage for the amplifier to use as the feedback voltage in a first mode of operation; and a second loop circuit coupled to the amplifier. The second loop circuit may be configured to receive the comparison signal and output a second feedback voltage for the amplifier to use as the feedback voltage in a second mode of operation. The second feedback voltage may be greater than the first feedback voltage, and the second loop circuit may output a regulated voltage based on the comparison signal.Type: ApplicationFiled: June 23, 2022Publication date: October 13, 2022Inventors: RICKY SETIAWAN, HUA BENG CHAN, REX TAK YING WONG
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Patent number: 11402860Abstract: In an embodiment, an apparatus includes: an amplifier to compare a reference voltage to a feedback voltage and to output a comparison signal based on the comparison; a first loop circuit coupled to the amplifier to receive the comparison signal and output a first feedback voltage for the amplifier to use as the feedback voltage in a first mode of operation; and a second loop circuit coupled to the amplifier. The second loop circuit may be configured to receive the comparison signal and output a second feedback voltage for the amplifier to use as the feedback voltage in a second mode of operation. The second feedback voltage may be greater than the first feedback voltage, and the second loop circuit may output a regulated voltage based on the comparison signal.Type: GrantFiled: February 18, 2020Date of Patent: August 2, 2022Assignee: Silicon Laboratories Inc.Inventors: Ricky Setiawan, Hua Beng Chan, Rex Tak Ying Wong
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Publication number: 20210311540Abstract: An integrated circuit includes a first plurality of circuits receiving a first internal power supply voltage, a first regulator receiving an external power supply voltage and supplying the first internal power supply voltage at a first rated power in response to the external power supply voltage when the integrated circuit is in an active mode, a second regulator receiving the external power supply voltage for supplying the first internal power supply voltage at a second rated power less than said first rated power in response to the external power supply voltage when the integrated circuit is in a low power mode, and a controller controlling a transition of the integrated circuit between the active mode and the low power mode. The controller activates all of the first plurality of circuits in the active mode, but only a subset of them while keeping remaining ones inactive in the low power mode.Type: ApplicationFiled: April 6, 2020Publication date: October 7, 2021Applicant: Silicon Laboratories Inc.Inventors: Rex Tak Ying Wong, Ricky Setiawan, Hua Beng Chan, Yushan Jiang, Pio Balmelli
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Publication number: 20210255654Abstract: In one embodiment, an apparatus includes: an amplifier to compare a reference voltage to a feedback voltage and to output a comparison signal based on the comparison; a loop circuit coupled to the amplifier, where the loop circuit is to receive the comparison signal and provide a regulated voltage to the amplifier as the feedback voltage in a first mode of operation, and in a second mode of operation to provide a predetermined feedback ratio point to the amplifier as the feedback voltage; and an output device coupled to the amplifier. The output device may be configured to receive a supply voltage and the comparison signal and output the regulated voltage at an output node based at least in part on the comparison signal.Type: ApplicationFiled: April 14, 2021Publication date: August 19, 2021Inventors: HUA BENG CHAN, REX TAK YING WONG, RICKY SETIAWAN
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Publication number: 20210255653Abstract: In an embodiment, an apparatus includes: an amplifier to compare a reference voltage to a feedback voltage and to output a comparison signal based on the comparison; a first loop circuit coupled to the amplifier to receive the comparison signal and output a first feedback voltage for the amplifier to use as the feedback voltage in a first mode of operation; and a second loop circuit coupled to the amplifier. The second loop circuit may be configured to receive the comparison signal and output a second feedback voltage for the amplifier to use as the feedback voltage in a second mode of operation. The second feedback voltage may be greater than the first feedback voltage, and the second loop circuit may output a regulated voltage based on the comparison signal.Type: ApplicationFiled: February 18, 2020Publication date: August 19, 2021Inventors: RICKY SETIAWAN, HUA BENG CHAN, REX TAK YING WONG
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Patent number: 11029716Abstract: In one embodiment, an apparatus includes: an amplifier to compare a reference voltage to a feedback voltage and to output a comparison signal based on the comparison; a loop circuit coupled to the amplifier, where the loop circuit is to receive the comparison signal and provide a regulated voltage to the amplifier as the feedback voltage in a first mode of operation, and in a second mode of operation to provide a predetermined feedback ratio point to the amplifier as the feedback voltage; and an output device coupled to the amplifier. The output device may be configured to receive a supply voltage and the comparison signal and output the regulated voltage at an output node based at least in part on the comparison signal.Type: GrantFiled: February 18, 2020Date of Patent: June 8, 2021Assignee: Silicon Laboratories Inc.Inventors: Hua Beng Chan, Rex Tak Ying Wong, Ricky Setiawan
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Patent number: 10826677Abstract: In one aspect, an apparatus includes: a first time-to-data converter (TDC) to oversample a first duration of incoming data and hold the oversampled first duration during receipt of a second duration of the incoming data; a second TDC to oversample the second duration of the incoming data and hold the oversampled second duration during receipt of a third duration of the incoming data; a processing circuit coupled to the first and second TDCs, the processing circuit including a first filter to filter the oversampled first duration and the oversampled second duration and generate a control output therefrom; and a digitally controlled oscillator (DCO) coupled to the processing circuit to receive the control output and generate a recovery clock signal therefrom.Type: GrantFiled: August 21, 2019Date of Patent: November 3, 2020Assignee: Silicon Laboratories Inc.Inventors: Hua Beng Chan, Rex Wong Tak Ying, Ricky Setiawan, Obaida Mohammed Khaled Abu Hilal
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Publication number: 20190379524Abstract: In one aspect, an apparatus includes: a first time-to-data converter (TDC) to oversample a first duration of incoming data and hold the oversampled first duration during receipt of a second duration of the incoming data; a second TDC to oversample the second duration of the incoming data and hold the oversampled second duration during receipt of a third duration of the incoming data; a processing circuit coupled to the first and second TDCs, the processing circuit including a first filter to filter the oversampled first duration and the oversampled second duration and generate a control output therefrom; and a digitally controlled oscillator (DCO) coupled to the processing circuit to receive the control output and generate a recovery clock signal therefrom.Type: ApplicationFiled: August 21, 2019Publication date: December 12, 2019Inventors: Hua Beng Chan, Rex Wong Tak Ying, Ricky Setiawan, Obaida Mohammed Khaled Abu Hilal
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Patent number: 10461920Abstract: In one aspect, an apparatus includes: a first time-to-data converter (TDC) to oversample a first duration of incoming data and hold the oversampled first duration during receipt of a second duration of the incoming data; a second TDC to oversample the second duration of the incoming data and hold the oversampled second duration during receipt of a third duration of the incoming data; a processing circuit coupled to the first and second TDCs, the processing circuit including a first filter to filter the oversampled first duration and the oversampled second duration and generate a control output therefrom; and a digitally controlled oscillator (DCO) coupled to the processing circuit to receive the control output and generate a recovery clock signal therefrom.Type: GrantFiled: January 31, 2018Date of Patent: October 29, 2019Assignee: SILICON LABORATORIES INC.Inventors: Hua Beng Chan, Rex Wong Tak Ying, Ricky Setiawan, Obaida Mohammed Khaled Abu Hilal
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Patent number: 10404446Abstract: In one aspect, a method includes: determining a power mode of a device; setting a first reference voltage level and a second reference voltage level based at least in part on the power mode; and using at least one of the first reference voltage level and the second reference voltage level for comparison against incoming data.Type: GrantFiled: May 18, 2018Date of Patent: September 3, 2019Assignee: Silicon Laboratories Inc.Inventors: Hua Beng Chan, Rex Wong Tak Ying, Ricky Setiawan, Obaida Mohammed Khaled Abu Hilal
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Publication number: 20180270043Abstract: In one aspect, a method includes: determining a power mode of a device; setting a first reference voltage level and a second reference voltage level based at least in part on the power mode; and using at least one of the first reference voltage level and the second reference voltage level for comparison against incoming data.Type: ApplicationFiled: May 18, 2018Publication date: September 20, 2018Inventors: Hua Beng Chan, Rex Wong Tak Ying, Ricky Setiawan, Obaida Mohammed Khaled Abu Hilal
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Patent number: 9998277Abstract: In one aspect, a method includes: determining a power mode of a device; setting a first reference voltage level and a second reference voltage level based at least in part on the power mode; and using at least one of the first reference voltage level and the second reference voltage level for comparison against incoming data.Type: GrantFiled: June 15, 2016Date of Patent: June 12, 2018Assignee: Silicon Laboratories Inc.Inventors: Hua Beng Chan, Rex Wong Tak Ying, Ricky Setiawan, Obaida Mohammed Khaled Abu Hilal
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Publication number: 20180152280Abstract: In one aspect, an apparatus includes: a first time-to-data converter (TDC) to oversample a first duration of incoming data and hold the oversampled first duration during receipt of a second duration of the incoming data; a second TDC to oversample the second duration of the incoming data and hold the oversampled second duration during receipt of a third duration of the incoming data; a processing circuit coupled to the first and second TDCs, the processing circuit including a first filter to filter the oversampled first duration and the oversampled second duration and generate a control output therefrom; and a digitally controlled oscillator (DCO) coupled to the processing circuit to receive the control output and generate a recovery clock signal therefrom.Type: ApplicationFiled: January 31, 2018Publication date: May 31, 2018Inventors: Hua Beng Chan, Rex Wong Tak Ying, Ricky Setiawan, Obaida Mohammed Khaled Abu Hilal
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Patent number: 9923710Abstract: In one aspect, an apparatus includes: a first time-to-data converter (TDC) to oversample a first duration of incoming data and hold the oversampled first duration during receipt of a second duration of the incoming data; a second TDC to oversample the second duration of the incoming data and hold the oversampled second duration during receipt of a third duration of the incoming data; a processing circuit coupled to the first and second TDCs, the processing circuit including a first filter to filter the oversampled first duration and the oversampled second duration and generate a control output therefrom; and a digitally controlled oscillator (DCO) coupled to the processing circuit to receive the control output and generate a recovery clock signal therefrom.Type: GrantFiled: June 15, 2016Date of Patent: March 20, 2018Assignee: Silicon Laboratories Inc.Inventors: Hua Beng Chan, Rex Wong Tak Ying, Ricky Setiawan, Obaida Mohammed Khaled Abu Hilal
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Publication number: 20170366333Abstract: In one aspect, a method includes: determining a power mode of a device; setting a first reference voltage level and a second reference voltage level based at least in part on the power mode; and using at least one of the first reference voltage level and the second reference voltage level for comparison against incoming data.Type: ApplicationFiled: June 15, 2016Publication date: December 21, 2017Inventors: Hua Beng Chan, Rex Wong Tak Ying, Ricky Setiawan, Obaida Mohammed Khaled Abu Hilal
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Publication number: 20170366330Abstract: In one aspect, an apparatus includes: a first time-to-data converter (TDC) to oversample a first duration of incoming data and hold the oversampled first duration during receipt of a second duration of the incoming data; a second TDC to oversample the second duration of the incoming data and hold the oversampled second duration during receipt of a third duration of the incoming data; a processing circuit coupled to the first and second TDCs, the processing circuit including a first filter to filter the oversampled first duration and the oversampled second duration and generate a control output therefrom; and a digitally controlled oscillator (DCO) coupled to the processing circuit to receive the control output and generate a recovery clock signal therefrom.Type: ApplicationFiled: June 15, 2016Publication date: December 21, 2017Inventors: Hua Beng Chan, Rex Wong Tak Ying, Ricky Setiawan, Obaida Mohammed Khaled Abu Hilal
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Patent number: 8975880Abstract: A switching regulator arrangement utilizes internal capacitors rather than external capacitors for driving output power transistors. Low-dropout linear voltage regulators together with a dip compensation circuit provide an intermediate supply voltage for driving power transistors under circumstances in which a supply voltage is greater than a gate drive voltage of the power transistor, allowing for a more efficient absorption of transient current.Type: GrantFiled: September 23, 2011Date of Patent: March 10, 2015Assignee: Broadcom CorporationInventors: Hua Beng Chan, Deyu Chen, Queenie Le
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Patent number: 8513930Abstract: Embodiments of an active power switch topology for a switching regulator are provided herein. The embodiments of the active power switch topology use two or more active power switches in parallel instead of a single active power switch, as found in conventional implementations. The active power switches are controlled such that they turn-on and -off in a manner that reduces parasitic voltage spikes associated with conventional switching regulators, while not degrading efficiency or other parameters associated with the switching regulator. The active power switch topology can be beneficially used within many switching regulators (e.g., buck, boost, or buck-boost) and, in particular, within hard-switched switching regulators that include active power switches integrated on chip.Type: GrantFiled: October 28, 2010Date of Patent: August 20, 2013Assignee: Broadcom CorporationInventors: Iulian Mirea, Quynh Duong Truc Le, Hua Beng Chan
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Publication number: 20130076320Abstract: A switching regulator arrangement utilizes internal capacitors rather than external capacitors for driving output power transistors. Low-dropout linear voltage regulators together with a dip compensation circuit provide an intermediate supply voltage for driving power transistors under circumstances in which a supply voltage is greater than a gate drive voltage of the power transistor, allowing for a more efficient absorption of transient current.Type: ApplicationFiled: September 23, 2011Publication date: March 28, 2013Applicant: Broadcom CorporationInventors: Hua Beng CHAN, Deyu Chen, Queenie Le