Patents by Inventor Hua Wu

Hua Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11967546
    Abstract: A semiconductor structure includes a first interposer; a second interposer laterally adjacent to the first interposer, where the second interposer is spaced apart from the first interposer; and a first die attached to a first side of the first interposer and attached to a first side of the second interposer, where the first side of the first interposer and the first side of the second interposer face the first die.
    Type: Grant
    Filed: July 21, 2022
    Date of Patent: April 23, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shang-Yun Hou, Hsien-Pin Hu, Sao-Ling Chiu, Wen-Hsin Wei, Ping-Kang Huang, Chih-Ta Shen, Szu-Wei Lu, Ying-Ching Shih, Wen-Chih Chiou, Chi-Hsi Wu, Chen-Hua Yu
  • Patent number: 11967563
    Abstract: A Fan-Out package having a main die and a dummy die side-by-side is provided. A molding material is formed along sidewalls of the main die and the dummy die, and a redistribution layer having a plurality of vias and conductive lines is positioned over the main die and the dummy die, where the plurality of vias and the conductive lines are electrically connected to connectors of the main die.
    Type: Grant
    Filed: August 16, 2021
    Date of Patent: April 23, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yan-Fu Lin, Chen-Hua Yu, Meng-Tsan Lee, Wei-Cheng Wu, Hsien-Wei Chen
  • Publication number: 20240124636
    Abstract: The invention relates to aqueous polymer dispersions comprising polymerized units issued from the following monomers with related weight proportions based on 100 parts of weight of a)+b): a) 50 to 90% of a monoethylenically unsaturated non-ionic monomer, b) 10 to 50% of vinyl aromatic monomer or methyl methacrylate, c) 1 to 5% of a hydroxy-containing (meth)acrylate, d) 0.1 to 3% of acid monomer selected from d1) acid monomer selected from monocarboxylic or dicarboxylic acid monomers and d2) acid monomer selected from phosphorous-based or sulfur-based strong acid monomers or/and their salts, or from the mixtures of d1) and d2), e) 0.001 to 0.5% of chain transfer agent, and f) 0 to 1% one of internal crosslinker bearing at least two copolymerisable ethylenic unsaturations, the polymer having a Tg measured by DSC from ?30 to 0° C. and a gel content of 0 to 60%, formed during polymerization.
    Type: Application
    Filed: December 28, 2023
    Publication date: April 18, 2024
    Inventors: Haiming CHEN, Wenjun WU, Xiangling MENG, Leo Mario SAIJA, Mario LUGLI, Hua ZHOU
  • Patent number: 11961814
    Abstract: In an embodiment, a device includes: a semiconductor device; and a redistribution structure including: a first dielectric layer; a first grounding feature on the first dielectric layer; a second grounding feature on the first dielectric layer; a first pair of transmission lines on the first dielectric layer, the first pair of transmission lines being laterally disposed between the first grounding feature and the second grounding feature, the first pair of transmission lines being electrically coupled to the semiconductor device; a second dielectric layer on the first grounding feature, the second grounding feature, and the first pair of transmission lines; and a third grounding feature extending laterally along and through the second dielectric layer, the third grounding feature being physically and electrically coupled to the first grounding feature and the second grounding feature, where the first pair of transmission lines extend continuously along a length of the third grounding feature.
    Type: Grant
    Filed: January 31, 2022
    Date of Patent: April 16, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Hsun Chen, Shou-Yi Wang, Jiun Yi Wu, Chung-Shi Liu, Chen-Hua Yu
  • Patent number: 11961800
    Abstract: A method for forming a via in a semiconductor device and a semiconductor device including the via are disclosed. In an embodiment, the method may include bonding a first terminal and a second terminal of a first substrate to a third terminal and a fourth terminal of a second substrate; separating the first substrate to form a first component device and a second component device; forming a gap fill material over the first component device, the second component device, and the second substrate; forming a conductive via extending from a top surface of the gap fill material to a fifth terminal of the second substrate; and forming a top terminal over a top surface of the first component device, the top terminal connecting the first component device to the fifth terminal of the second substrate through the conductive via.
    Type: Grant
    Filed: July 21, 2022
    Date of Patent: April 16, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Hua Yu, An-Jhih Su, Chi-Hsi Wu, Wen-Chih Chiou, Tsang-Jiuh Wu, Der-Chyang Yeh, Ming Shih Yeh
  • Patent number: 11961046
    Abstract: A computing device includes a processor and a medium storing instructions. The instructions are executable by the processor to: in response to a receipt of an electronic request comprising one or more structured data fields and one or more unstructured data fields, identify a set of previous electronic requests using the one or more structured data fields of the received electronic request; train a probabilistic classification model using at least one structured data field of the identified set of previous electronic requests; execute the trained probabilistic classification model using the one or more unstructured data fields of the received electronic request; and automatically select a request handler using an output of the executed probabilistic classification model.
    Type: Grant
    Filed: May 22, 2018
    Date of Patent: April 16, 2024
    Assignee: Micro Focus LLC
    Inventors: Zhu Jing Wu, Xin-Yu Wang, Jin Wang, Chun-Hua Li, Zhen Cui
  • Publication number: 20240120203
    Abstract: A method includes forming a dummy gate over a semiconductor fin; forming a source/drain epitaxial structure over the semiconductor fin and adjacent to the dummy gate; depositing an interlayer dielectric (ILD) layer to cover the source/drain epitaxial structure; replacing the dummy gate with a gate structure; forming a dielectric structure to cut the gate structure, wherein a portion of the dielectric structure is embedded in the ILD layer; recessing the portion of the dielectric structure embedded in the ILD layer; after recessing the portion of the dielectric structure, removing a portion of the ILD layer over the source/drain epitaxial structure; and forming a source/drain contact in the ILD layer and in contact with the portion of the dielectric structure.
    Type: Application
    Filed: March 8, 2023
    Publication date: April 11, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Te-Chih HSIUNG, Yun-Hua CHEN, Bing-Sian WU, Yi-Hsuan CHIU, Yu-Wei CHANG, Wen-Kuo HSIEH, Chih-Yuan TING, Huan-Just LIN
  • Publication number: 20240118150
    Abstract: The present disclosure provides a method for testing an internal force increment of an arch bridge suspender by inertial measurement, including the following steps: (1) selecting a suspender to be tested with internal force increment, and mounting an acceleration sensing device or a speed sensing device at a lower edge of the suspender to be tested; (2) setting an appropriate sampling frequency and collecting signals; (3) processing information data collected in step (2) by using Formulas; and (4) recording a result of the information data processing and obtaining the internal force increment of the suspender. The method can obtain the internal force increment of the suspender by collecting acceleration or speed signals of the lower edge of the suspender and performing calculation from the signals. This method has the advantages of simple and convenient testing, high replicability and low test cost.
    Type: Application
    Filed: October 8, 2021
    Publication date: April 11, 2024
    Inventors: Hua Wang, Longlin Wang, Tianzhi Hao, Zehua Xie, Mengsheng Yu, Xiaoli Zhuo, Yuhou Yang, Jiejun Ning, Xirui Wang, Xi Peng, Kainan Huang, Junhong Wu
  • Patent number: 11953052
    Abstract: A fastener is adapted for assembling a first housing to a second housing. The first housing is provided with a protruding portion and a buckling portion, and the second housing has a first surface, a second surface, and a through hole. The fastener includes a first portion, at least one connecting portion, at least two elastic portions, and a second portion. The first portion movably abuts against the first surface and has a first opening. The connecting portion is accommodated in the through hole. One end of the connecting portion is connected to the first portion. The connecting portion is spaced apart from an inner edge of the second housing by a gap. The two elastic portions inclinedly extend into the first opening. The second portion movably abuts against the second surface and is disposed at the another end of the connecting portion.
    Type: Grant
    Filed: June 17, 2021
    Date of Patent: April 9, 2024
    Assignee: PEGATRON CORPORATION
    Inventors: Jian-Hua Chen, Po-Tsung Shih, Yu-Wei Lin, Ming-Hua Ho, Chih-Hao Wu
  • Patent number: 11954449
    Abstract: The disclosure discloses a method for generating a conversation, an electronic device, and a storage medium. The detailed implementation includes: obtaining a current conversation and historical conversations of the current conversation; selecting multiple reference historical conversations from the historical conversations and adding the multiple reference historical conversations to a temporary conversation set; and generating reply information of the current conversation based on the current conversation and the temporary conversation set.
    Type: Grant
    Filed: September 14, 2021
    Date of Patent: April 9, 2024
    Assignee: BEIJING BAIDU NETCOM SCIENCE AND TECHNOLOGY CO., LTD.
    Inventors: Fan Wang, Siqi Bao, Xinxian Huang, Hua Wu, Jingzhou He
  • Patent number: 11955442
    Abstract: In an embodiment, a structure includes a core substrate, a redistribution structure coupled, the redistribution structure including a plurality of redistribution layers, the plurality of redistribution layers comprising a dielectric layer and a metallization layer, a first local interconnect component embedded in a first redistribution layer of the plurality of redistribution layers, the first local interconnect component comprising conductive connectors, the conductive connectors being bonded to a metallization pattern of the first redistribution layer, the dielectric layer of the first redistribution layer encapsulating the first local interconnect component, a first integrated circuit die coupled to the redistribution structure, a second integrated circuit die coupled to the redistribution structure, an interconnect structure of the first local interconnect component electrically coupling the first integrated circuit die to the second integrated circuit die, and a set of conductive connectors coupled to a
    Type: Grant
    Filed: February 27, 2023
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Jiun Yi Wu, Chen-Hua Yu, Chung-Shi Liu
  • Patent number: 11955405
    Abstract: A semiconductor package includes a package substrate; semiconductor devices disposed on the package substrate; a package ring disposed on a perimeter of the package substrate surrounding the semiconductor devices; a cover including silicon bonded to the package ring and covering the semiconductor devices; and a thermal interface structure (TIS) thermally connecting the semiconductor devices to the cover.
    Type: Grant
    Filed: January 17, 2022
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Jen Yu Wang, Chung-Jung Wu, Sheng-Tsung Hsiao, Tung-Liang Shao, Chih-Hang Tung, Chen-Hua Yu
  • Patent number: 11952368
    Abstract: Provided are a fibroblast activation protein inhibitor (FAPI) dimer compound, an FAPI dimer-based positron emission tomography (PET) imaging agent for tumor diagnosis, and a preparation method and use thereof. An amphiphilic polyethylene glycol (PEG) chain and a dimerized structure of FAPI in the FAPI dimer compound with a structure shown in formula I can improve the in vivo kinetic properties of the compound and prolong a residence time of the compound in a tumor, thereby improving the uptake and imaging effects in the tumor. The accurate tumor diagnosis can be achieved by labeling the FAPI dimer compound with a diagnostic nuclide (68Ga), which has promising application prospects in PET imaging for diagnosis and in the preparation of a therapeutic nuclide (such as 177Lu or 90Y)-labeled drug for treating a FAP-?-expressing tumor.
    Type: Grant
    Filed: September 29, 2022
    Date of Patent: April 9, 2024
    Assignee: Xiamen University
    Inventors: Haojun Chen, Liang Zhao, Qin Lin, Kaili Fu, Yizhen Pang, Zhide Guo, Jianyang Fang, Long Sun, Hua Wu
  • Publication number: 20240113071
    Abstract: An integrated circuit package including electrically floating metal lines and a method of forming are provided. The integrated circuit package may include integrated circuit dies, an encapsulant around the integrated circuit dies, a redistribution structure on the encapsulant, a first electrically floating metal line disposed on the redistribution structure, a first electrical component connected to the redistribution structure, and an underfill between the first electrical component and the redistribution structure. A first opening in the underfill may expose a top surface of the first electrically floating metal line.
    Type: Application
    Filed: January 5, 2023
    Publication date: April 4, 2024
    Inventors: Chung-Shi Liu, Mao-Yen Chang, Yu-Chia Lai, Kuo-Lung Pan, Hao-Yi Tsai, Ching-Hua Hsieh, Hsiu-Jen Lin, Po-Yuan Teng, Cheng-Chieh Wu, Jen-Chun Liao
  • Publication number: 20240110565
    Abstract: A rotor assembly, a compressor and an air conditioner. The rotor assembly includes a first rotor, including a first working portion and a second working portion coaxially arranged, wherein the first working portion and the second working portion are rotatable about a first axis; the first working portion includes a plurality of first helical blades, with a first blade groove being formed between adjacent two of the plurality of first helical blades; at least one first air pressure groove is provided on a first end face of the first working portion away from the second working portion; and the first air pressure groove is configured to form a force in a predetermined direction along the first axis when rotating. The rotor assembly can reduce costs of the compressor, simplify structures of moving parts of the compressor, and improve performance and reliability of the compressor.
    Type: Application
    Filed: October 19, 2021
    Publication date: April 4, 2024
    Inventors: Hua Liu, Zhiping Zhang, Xiaokun Wu, Yushi Bi
  • Patent number: D1021161
    Type: Grant
    Filed: August 18, 2021
    Date of Patent: April 2, 2024
    Assignee: COPLUS INC.
    Inventor: Po-Hua Wu
  • Patent number: D1023365
    Type: Grant
    Filed: May 5, 2021
    Date of Patent: April 16, 2024
    Assignee: COPLUS INC.
    Inventor: Po-Hua Wu
  • Patent number: D1023367
    Type: Grant
    Filed: August 24, 2021
    Date of Patent: April 16, 2024
    Assignee: COPLUS INC.
    Inventor: Po-Hua Wu
  • Patent number: D1024376
    Type: Grant
    Filed: September 23, 2022
    Date of Patent: April 23, 2024
    Assignee: COPLUS INC.
    Inventor: Po-Hua Wu
  • Patent number: D1024382
    Type: Grant
    Filed: May 28, 2021
    Date of Patent: April 23, 2024
    Assignee: COPLUS INC.
    Inventor: Po-Hua Wu