Patents by Inventor Hua Yang

Hua Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11567578
    Abstract: During control of a user interface via free-space motions of a hand or other suitable control object, switching between control modes can be facilitated by tracking the control object's movements relative to, and its contact with a “virtual touch plane or surface” (i.e., a plane, portion of a plane, and/or surface computationally defined in space, or corresponding to any physical surface).
    Type: Grant
    Filed: November 9, 2020
    Date of Patent: January 31, 2023
    Assignee: Ultrahaptics IP Two Limited
    Inventors: Hua Yang, Leonid Kontsevich, James Donald, David S. Holz, Jonathan Marsden, Paul Durdik
  • Publication number: 20230007765
    Abstract: The present disclosure provides circuit structure configured to decrease a phase difference between a first signal and a second signal. The circuit structure includes substrate. The substrate includes a first conductive layer, a first woven dielectric layer, and a second woven dielectric layer. The first conductive layer is disposed over the substrate. The first conductive layer includes a circuit pattern configured to transmit the first signal and the second signal. The first woven dielectric layer is stacked below the first conductive layer. The first woven dielectric layer has a plurality of first opens. The second woven dielectric layer is stacked below the first woven dielectric layer. The second woven dielectric layer has a plurality of second opens. The plurality of first opens and the plurality of second opens are misaligned from a top view.
    Type: Application
    Filed: July 1, 2021
    Publication date: January 5, 2023
    Inventors: TUNG-HUA YANG, LE-WEI WANG, SHIH-HUAN CHIEN
  • Patent number: 11546604
    Abstract: Bi-directional optical flow (BDOF) may be bypassed, for a current coding block, based on whether symmetric motion vector difference (8MVD) is used in motion vector coding for the current coding block, A coding device (e.g., an encoder or a decoder) may determine whether to bypass BDOF for the current coding block based at least in part on an SMVD indication for the current coding block, The coding device may obtain the SMVD indication that indicates whether SMVD is used in motion vector coding for the current coding block. If SMVD Indication indicates that SMVD is used in the motion vector coding for the current coding block, the coding device may bypass BDOF for the current coding block. The coding device may reconstruct, the current coding block without performing BDOF if it determines to bypass BDOF for the current coding block.
    Type: Grant
    Filed: December 19, 2019
    Date of Patent: January 3, 2023
    Assignee: VID SCALE, Inc.
    Inventors: Jiancong Luo, Xiaoyu Xiu, Yuwen He, Hua Yang
  • Patent number: 11534114
    Abstract: The present invention provides 18F-labeled amino acids or derivatives thereof having formula (I) and methods of making same, which can be suitable for PET imaging:
    Type: Grant
    Filed: August 23, 2017
    Date of Patent: December 27, 2022
    Assignee: Simon Fraser University
    Inventors: Paul Schaffer, Hua Yang, Robert Britton, Matthew Nodwell, Zheliang Yuan
  • Publication number: 20220406652
    Abstract: A semiconductor isolation structure includes a silicon-on-insulator wafer, a first deep trench isolation structure and a second deep trench isolation structure. The silicon-on-insulator wafer includes a semiconductor substrate, a buried insulation layer disposed on the semiconductor substrate, and a semiconductor layer disposed on the buried insulation layer. The semiconductor layer has a functional region. The first deep trench isolation structure penetrates the semiconductor layer and the buried insulation layer, and surrounds the functional region. The second deep trench isolation structure penetrates semiconductor layer and the buried insulation layer, and surrounds the first deep trench isolation structure.
    Type: Application
    Filed: June 17, 2021
    Publication date: December 22, 2022
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Tsung-Yu YANG, Po-Wei LIU, Yun-Chi WU, Yu-Wen TSENG, Chia-Ta HSIEH, Ping-Cheng LI, Tsung-Hua YANG, Yu-Chun CHANG
  • Publication number: 20220406945
    Abstract: The present disclosure provides a thin film transistor, a display substrate and a display device, and belongs to the field of display technology. The thin film transistor of the present disclosure includes: a base, and a gate, an active layer, a source and a drain located on the base, where the gate includes a first gate and a second gate which are sequentially provided on the base and are electrically connected to each other; the active layer is located between the first gate and the second gate, and orthographic projections of the first gate and the second gate on the base are partially overlapped with an orthographic projection of the active layer on the base, and the orthographic projections of the first gate and the second gate on the base are partially overlapped with each other.
    Type: Application
    Filed: May 21, 2021
    Publication date: December 22, 2022
    Inventors: Chenglong WANG, Yezhou FANG, Feng LI, Lei YAO, Lei YAN, Kai LI, Lin HOU, Xiaogang ZHU, Yun GAO, Yanzhao PENG, Teng YE, Hua YANG
  • Publication number: 20220401567
    Abstract: Disclosed herein is the use of a hyaluronan (HA) conjugate for treating cancer. Also disclosed herein is the use of a hyaluronan conjugate for treating cancer. The hyaluronan conjugate is a nimesulide-HA conjugate having a monosaccharide or one to four disaccharide units of the hyaluronic acid.
    Type: Application
    Filed: June 17, 2022
    Publication date: December 22, 2022
    Applicant: Aihol Corporation
    Inventor: Hua-Yang LIN
  • Publication number: 20220392912
    Abstract: A semiconductor device and method of manufacturing the same are provided. The semiconductor device includes a substrate and a first gate electrode disposed on the substrate and located in a first region of the semiconductor device. The semiconductor device also includes a first sidewall structure covering the first gate electrode. The semiconductor device further includes a protective layer disposed between the first gate electrode and the first sidewall structure. In addition, the semiconductor device includes a second gate electrode disposed on the substrate and located in a second region of the semiconductor device. The semiconductor device also includes a second sidewall structure covering a lateral surface of the second gate electrode.
    Type: Application
    Filed: June 7, 2021
    Publication date: December 8, 2022
    Inventors: Yu-Ting Tsai, Ching-Tzer Weng, Tsung-Hua Yang, Kao-Chao Lin, Chi-Wei Ho, Chia-Ta Hsieh
  • Publication number: 20220385897
    Abstract: A video processing apparatus may comprise one or more processors that are configured to determine an interpolation filter length for an interpolation filter associated with a coding unit (CU) based on a size of the CU. The one or more processor may be configured to determine an interpolated reference sample based on the determined interpolation filter length for the interpolation filter and a reference sample for the CU. The one or more processor may be configured to predict the CU based on the interpolated reference sample. For example, if a first CU has a size that is greater than the size of a second CU, the one or more processors may be configured to use a shorter interpolation filter for the first CU than for the second CU.
    Type: Application
    Filed: September 18, 2020
    Publication date: December 1, 2022
    Applicant: VID SCALE, INC.
    Inventors: Wei Chen, Yuwen He, Hua Yang
  • Patent number: 11511213
    Abstract: Exemplary embodiments are directed to devices for separating a sample by chromatography, components of the devices, and methods for using the devices, and directed to devices and components for use with immobilized enzymatic reactors. A device includes a wall having a wetted surface exposed to a mobile phase including the sample during chromatographic separation. The wetted surface of the wall includes an alloy material including the following constituents: nickel, and cobalt and/or chromium where the alloy is limited in an amount of titanium to 1 wt %. A component includes a body having a wetted surface exposed to a mobile phase including the sample during chromatographic separation. The wetted surface of the body includes an alloy material including the following constituents: nickel, and cobalt and/or chromium where the alloy is limited in an amount of titanium to 1 wt %.
    Type: Grant
    Filed: August 12, 2016
    Date of Patent: November 29, 2022
    Assignee: Waters Technologies Corporation
    Inventors: Jonathan L. Belanger, Hua Yang, Edouard S. P. Bouvier, Mathew DeLano, Raymond P. Fisk, Hillary B. Hewitson, Wade P. Leveille, Kevin Daniel Wyndham
  • Patent number: 11511380
    Abstract: A method for capturing a tool path, applicable to a machine tool having a controller and furnished with a tooling, includes the steps of: obtaining a data update frequency of the controller; calculating a feed rate of the controller, determining whether or not the feed rate is obtained, going to next step if positive, and going to the previous step if negative; reading G-codes of the controller to confirm the feed rate; and, based on the confirmed feed rate, recording machine coordinates transmitted from the controller for synthesizing a tool path file. The tool path file is used for simulation and analysis of machining of the machine tool. In addition, a device for capturing the tool path is also provided.
    Type: Grant
    Filed: December 26, 2019
    Date of Patent: November 29, 2022
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yu-Ling Chang, Chih-Yuan Hsu, Guo-Wei Wang, Yu-An Tseng, Yung-Sheng Chang, Bei-Hua Yang, Chia-Chun Li, Shuo-Peng Liang
  • Publication number: 20220377324
    Abstract: A filter may be applied to a subset of components associated with a sample in a coding block. The output of the filter may be used to modify values for other component(s). For example, a filter may be applied to a selected (for example, dominant) component(s). The output of the filter may be used to modify a value for one of the other components (for example, non-dominant components). The output of the filter may be used, for example, after a weighting factor is applied to the filter output, to modify a value for another one of the other components. A joint refinement signal may be obtained, for example, as the filtered output signal minus the filter input signal of the selected component(s). A properly weighted version of the joint refinement signal may be applied to modify the other components.
    Type: Application
    Filed: September 23, 2020
    Publication date: November 24, 2022
    Applicant: VID SCALE, INC.
    Inventors: Hua Yang, Yuwen He, Wei Chen, Hongyu Li
  • Publication number: 20220377316
    Abstract: An apparatus may be configured to determine a reference picture listed in a first reference picture list and a reference picture listed in a second reference picture list, for a coding block. The apparatus may be configured to determine whether to perform bi-directional optical flow (BDOF) for the coding block based at least in part on whether a distance between a picture associated with the coding block and the reference picture listed in the first reference picture list differs from a distance between the picture associated with the coding block and the reference picture listed in the second reference picture list. The apparatus may be configured to decode the coding block based on the determination of whether to perform BDOF for the coding block.
    Type: Application
    Filed: September 23, 2020
    Publication date: November 24, 2022
    Applicant: VID SCALE, INC.
    Inventors: Wei Chen, Yuwen He, Hua Yang
  • Publication number: 20220367750
    Abstract: A method of preparing a device coupon for a micro-transfer printing process from a multi-layered stack located on a device wafer substrate. The multi-layered stack comprises a plurality of semiconductor layers. The method comprises steps of: (a) etching the multi-layered stack to form a multi-layered device coupon, including an optical component; and (b) etching a semiconductor layer of the multi-layered device coupon to form one or more tethers, said tethers securing the multi-layered device coupon to one or more supports.
    Type: Application
    Filed: April 29, 2022
    Publication date: November 17, 2022
    Inventors: Guomin YU, Mohamad DERNAIKA, Ludovic CARO, Hua YANG, Aaron John ZILKIE
  • Publication number: 20220357509
    Abstract: A method of transfer printing. The method comprising: providing a precursor photonic device, comprising a substrate and a bonding region, wherein the precursor photonic device includes one or more alignment marks located in or adjacent to the bonding region; providing a transfer die, said transfer die including one or more alignment marks; aligning the one or more alignment marks of the precursor photonic device with the one or more alignment marks of the transfer die; and bonding at least a part of the transfer die to the bonding region.
    Type: Application
    Filed: July 5, 2022
    Publication date: November 10, 2022
    Inventors: Guomin YU, Mohamad DERNAIKA, Ludovic CARO, Hua YANG, Aaron John ZILKIE
  • Publication number: 20220359671
    Abstract: A method for eliminating divot formation includes forming an isolation layer; forming a conduction layer which has an upper inclined boundary with the isolation layer such that the conduction layer has a portion located above a portion of the isolation layer at the upper inclined boundary; etching back the isolation layer; and etching back the conduction layer after etching back the isolation layer such that a top surface of the etched conduction layer is located at a level lower than a top surface of the etched isolation layer.
    Type: Application
    Filed: September 10, 2021
    Publication date: November 10, 2022
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yu-Wen TSENG, Po-Wei LIU, Hung-Ling SHIH, Tsung-Yu YANG, Tsung-Hua YANG, Yu-Chun CHANG
  • Publication number: 20220360778
    Abstract: A method of encoding or decoding a video comprising a current picture, a first reference picture, and a weight tensor associated with a trained neural network (NN) model are provided. The method includes generating any number of kernel tensors, input channels and output channels associated with the weight tensor, each kernel tensor being associated with any of: a layer type, an input signal type, and a tree partition type, and each kernel tensor including weight coefficients, generating, for each of the any number of kernel tensors, tree partitions for any of a coding tree unit (CTU), a coding unit (CU), a prediction unit (PU), and a transform unit (TU) according to respective tree partition types associated with each of the any number of kernel tensors, and generating a compressed representation of the trained NN model by compressing and coding the any number of kernel tensors.
    Type: Application
    Filed: July 2, 2020
    Publication date: November 10, 2022
    Inventors: Hua Yang, Duanshun Li, Dong Tian, Yuwen He
  • Patent number: 11493709
    Abstract: Aspects described herein include an apparatus comprising a receptacle comprising a cage dimensioned to receive a pluggable optical module into an interior volume, An opening is defined in an exterior surface of the cage. The apparatus further comprises a heat sink assembly rigidly attached to the cage. The heat sink assembly comprises a thermal interface material extending through the opening into the interior volume. The thermal interface material is configured to compress when the pluggable optical module is received into the interior volume and contacts the thermal interface material.
    Type: Grant
    Filed: September 25, 2020
    Date of Patent: November 8, 2022
    Assignee: Cisco Technology, Inc.
    Inventors: Yao Tsan Tsai, Yong Guo Chen, Hua Yang
  • Publication number: 20220354019
    Abstract: Presented herein is a cold plate assembly including a sub-plate and a vapor chamber for use as part of a remote fin cooling system for an electronic device. The sub-plate includes a first surface, a second surface, and a plurality of pipes. The vapor chamber includes a first wall and a second wall opposite the first wall. The first wall and the second wall define an interior cavity having a first depth for one or more first portions of the vapor chamber and a second depth for one or more second portions of the vapor chamber. The second surface of the sub-plate is attached to the first wall of the vapor chamber.
    Type: Application
    Filed: April 28, 2021
    Publication date: November 3, 2022
    Inventors: Yaotsan Tsai, Yongguo Chen, Hua Yang, Vic Hong Chia
  • Patent number: D974102
    Type: Grant
    Filed: April 9, 2021
    Date of Patent: January 3, 2023
    Assignee: Chunmi Technology (Shanghai) Co., Ltd.
    Inventors: Hua Yang, Weihong Hong