Abstract: A method, computer program product and system for facilitating inter-digital signal processing (DSP) data communications. A direct memory access (DMA) controller may be configured to facilitate transfers of data between a first and a second DSP processor core coupled to the DMA controller. The DMA controller may read a data structure, referred to as a “buffer descriptor block,” to perform the data transfer. The buffer descriptor block may store both a source address and a destination address indicating where the data is to be retrieved and stored. The buffer descriptor block may further store a value, e.g., number of bytes, indicating a size of the data to be transferred. The DMA controller may then transfer the data located at the source address in the first DSP processor core, with a size, e.g., number of bytes, indicated from the buffer descriptor block, to the destination address in the second DSP processor core.

Abstract: A receiver for orthogonal frequency division multiplexing signals, including art A/D converter for converting receiver analog signals to a digital signal data stream, wherein the digital signal data stream includes symbols separated by guard segments. The receiver also includes an I/Q demodulator for producing a first set of complex I and Q components from the digital signal data stream and a guard segment length detector using the first set of I and Q components. It further includes an extractor for identifying and removing the guard segments of the detected length from the digital signal data stream and an FFT demodulator for demodulating the symbols of the digital signal data stream to produce second sets of complex I and Q components.

Abstract: A method, computer program product and system for facilitating inter-digital signal processing (DSP) data communications. A direct memory access (DMA) controller may be configured to facilitate transfers of data between a first and a second DSP processor core coupled to the DMA controller. The DMA controller may read a data structure, referred to as a “buffer descriptor block,” to perform the data transfer. The buffer descriptor block may store both a source address and a destination address indicating where the data is to be retrieved and stored. The buffer descriptor block may further store a value, e.g., number of bytes, indicating a size of the data to be transferred. The DMA controller may then transfer the data located at the source address in the first DSP processor core, with a size, e.g., number of bytes, indicated from the buffer descriptor block, to the destination address in the second DSP processor core.

Abstract: A method, computer program product and system for facilitating inter-digital signal processing (DSP) data communications. A direct memory access (DMA) controller may be configured to facilitate transfers of data between a first and a second DSP processor core coupled to the DMA controller. The DMA controller may read a data structure, referred to as a “buffer descriptor block,” to perform the data transfer. The buffer descriptor block may store both a source address and a destination address indicating where the data is to be retrieved and stored. The buffer descriptor block may further store a value, e.g., number of bytes, indicating a size of the data to be transferred. The DMA controller may then transfer the data located at the source address in the first DSP processor core, with a size, e.g., number of bytes, indicated from the buffer descriptor block, to the destination address in the second DSP processor core.

Abstract: A receiver for orthogonal frequency division multiplexing signals, including an A/D converter (52) for converting receiver analog signals to a digital signal data stream, wherein the digital signal data stream includes symbols separated by guard segments. The receiver also includes an I/Q demodulator (54) for producing a first set of complex I and Q components from the digital data stream and a guard segment length detector (58) using the first set of I and Q components. It further includes an extractor (62) for extracting and removing the guard segments of the detected length from the digital signal data stream and an FFT demodulator (64) for demodulating the symbols of the digital signal data stream to produce second sets of complex I and Q components.

Abstract: A scalar Kalman filter is applied for a Least-Square estimated value Hs at s. The filter has an input for receiving Hs, a filter equation and an out for the corrected estimated value Hsk for the kth variable. The filter equation is Hsk=KgainSn[k] wherein: correction Sn[k]=S+Kn(Hs?S); prediction of the correction S=KaSn[k]; Kalman filter gain Kn=P/(1+P); minimum predication MSE P=Ka2Pn[k]+Kb; minimum MSE Pn[k]=P (1?Kn); and Ka, Kgain and Kb are constants.

Abstract: An analog TV receiver implementation on DSP allows mobile platforms to view analog TV broadcasting on LCD displays. The analog television receiver includes a demodulator for demodulating a received analog television signal, an analog to digital converter for digitizing the demodulated television signal and a digital signal processor for producing display signals from the digitized television signals. The digital signal processor being programmed to search for a horizontal synchronization signal in the television signal, track the horizontal synchronization signal and search for a vertical synchronization signal in the television signal. Next the processor separates a luminance and a pair of chrominance components of the television signal and demodulates the pair of chrominance components. Red, green and blue values are constructed from the demodulated chrominance components and the luminance components. Display signals are produced from the red, green and blue values.

Abstract: A method and apparatus for decoding a coded data stream of bits using an inner decoder, deinterleaver and an outer decoder. The outer decoder first decodes by error correction decoding for r errors per word. The decoding is terminated and a decoded word is outputted if the syndromes of the corrected word of the first decoding are all zeros. If the syndromes of the corrected word of the first decoding are not all zeros, a second decoding is performed by error decoding and erasure for the number of errors reduced by one and the number of erasures increased to two. The decoding is terminated and a decoded word is outputted if the syndromes of the corrected word of the second decoding are all zeros. If the syndromes of the corrected word of the second decoding are not all zeros, the second decoding by correcting and erasure decoding is repeated for the number of errors reduced by one and the number of erasures increased by two for each iteration of the second decoding.

Abstract: A receiver for orthogonal frequency division multiplexing (OFDM) signals, including an A/D converter for converting received analog signals to a digital signal data stream and an OFDM demodulator for producing a first set of complex I and Q components of subcarriers from the digital signal data stream. The receiver includes a CSI estimator for estimating Channel State Information (CSI) from the sets of complex I and Q components and a TPS decoder for decoding TPS data from the sets of complex I and Q components using the CSI.

Abstract: A codec detects congestion in a packet network and responds via a session control protocol to re-negotiate codec-type and/or parameters with the receiving codec to reduce bit rate for supporting a session. Once the connection and session are established, encoded packets start flowing between the two codecs. A control entity sends and receives network congestion control packets periodically in the session. The congestion control packets provide a “heartbeat” signal to the receiving codec. When the network is not congested, all “heartbeat” packets will be passed through the network. As network congestion increases, routers within the network discard excess packets to prevent network failure. The codecs respond to the missing packets by slowing down the bit rate or proceeding to renegotiate a lower bit rate via the session control protocol. If there are no missing packets, the codecs detect if the session is operating at the highest bit rate, and if not, re-negotiate a higher bit rate.

Abstract: A packet network redistributes excess bandwidth for voice and data sessions applying a Quality of Service (QoS) algorithm. The network includes interacting client stations using H.323 protocol managing bit rate according to an algorithm as voice and data sessions are added or removed from the network. The client stations include codecs coupled to the network. The codecs provide voice sessions at a minimum bandwidth using a voice codec bit rate and preferred bandwidth using another voice codec bit rate. A first algorithm applies the QoS algorithm allocating bandwidth between interacting client stations after the addition of a new voice or data session when there is insufficient bandwidth for the new session to receive preferred bandwidth. A second algorithm is applied when a voice or data session is removed from the interacting client stations. If any session is allocated minimum bandwidth the QoS increases a voice session at minimum bandwidth to preferred bandwidth if excess bandwidth is available.

Abstract: A codec detects congestion in a packet network and responds via a session control protocol to re-negotiate codec-type and/or parameters with the receiving codec to reduce bit rate for supporting a session. Once the connection and session are established, encoded packets start flowing between the two codecs. A control entity sends and receives network congestion control packets periodically in the session. The congestion control packets provide a “heartbeat” signal to the receiving codec. When the network is not congested, all “heartbeat” packets will be passed through the network As network congestion increases, routers within the network discard excess packets to prevent network failure. The codecs respond to the missing packets by slowing down the bit rate or proceeding to renegotiate a lower bit rate via the session control protocol. If there are no missing packets, the codecs detect if the session is operating at the highest bit rate, and if not, re-negotiate a higher bit rate.

Abstract: A packet network congestion control system using a biased packet discard policy includes a plurality of end points having codecs operating in a framework, e.g. ITU-T H.323 protocol to establish a communication session. The protocol enables the codecs to negotiate codec type and associated parameters. Once a connection and session are established, compressed voice and data packets start flowing between the two end points. A control entity supplies congestion control packets periodically. The control packets provide a “heartbeat” signal to the codec at the other end of the session. Each codec receiver uses the “heartbeat” signal as an indication of network congestion. As network congestion increases, routers within the network discard excess packets to prevent network failure. The network discards all packets classified as congestion control packets whenever a flow control mechanism detects congestion or a trend toward congestion.

Abstract: A receiver for orthogonal frequency division multiplexing (OFDM) signals, including an A/D converter for converting received analog signals to a digital signal data stream and an OFDM demodulator for producing a first set of complex I and Q components of subcarriers from the digital signal data stream. The receiver includes a CSI estimator for estimating Channel State Information (CSI) from the sets of complex I and Q components and a TPS decoder for decoding TPS data from the sets of complex I and Q components using the CSI.

Abstract: Receivers, methods, and computer program products can be used to demodulate a data signal transmitted from a digital source, which has a network sampling rate that is synchronized with a network clock. In an illustrative embodiment, a receiver includes a two-stage interpolator that receives digital samples of the data signal as an input and produces an interpolated digital sample stream to be filtered by an adaptive fractionally spaced decision feedback equalizer. The digital samples received in the interpolator are synchronized with a local clock; however, the interpolated sample stream is synchronized with the network clock. A slicer generates symbols for the samples output from the decision feedback equalizer by comparing the samples with a reference signaling alphabet. The receiver can be used in a V.90 client modem to demodulate pulse code modulated (PCM) data transmitted as pulse amplitude modulated (PAM) signals from a digital network.

Abstract: Methods, systems and computer program products are provided which utilize a variable threshold for carrier drop detection. The carrier drop detection threshold is updated based on a recognized data sequence contained within the signal received by the modem. The received signal is demodulated to obtain the signal data and an updated threshold is latched when a desired data sequence is recognized in the demodulated data. Accordingly, the threshold may be updated and set as an offset from or a percentage of the carrier signal level at the time of receipt of the desired data sequence. For example, in a V.90 modem using a V.8 phase 1 sequence, receipt of the CM signal (for the answer modem) or the JM signal (for the call modem) may be used to latch an updated level for the carrier drop detection threshold, which may then be used for detecting carrier drop during the silence transmission at the end of phase 1 to allow reliable preparation of the modem for receipt of the INFO0 signal at the start of phase 2.

Abstract: Packetized voice, video, and data traffic (data frames) are received in a communication traffic sorter. The data frames have a dispatch priority corresponding to their transmission characteristics (flow) and a quality of service parameters. The communication traffic sorter analyzes information in data packets within each data frame and determines an optimum flow for the data frames. A data frame is assigned to a selected queue based on an analysis of the information in its data packets. A data frame may also be assigned to a queue based on a prior analysis of a data frame with like transmission characteristics. Results of analysis are stored and indexed to facilitate processing of subsequent data frames. The network access sorter has circuits to un-pack and re-pack the data frame, when called for, to allow user transmitted data to be processed to create a modified data frame.

Abstract: A method, computer program product and system for facilitating inter-digital signal processing (DSP) data communications. A direct memory access (DMA) controller may be configured to facilitate transfers of data between a first and a second DSP processor core coupled to the DMA controller. The DMA controller may read a data structure, referred to as a “buffer descriptor block,” to perform the data transfer. The buffer descriptor block may store both a source address and a destination address indicating where the data is to be retrieved and stored. The buffer descriptor block may further store a value, e.g., number of bytes, indicating a size of the data to be transferred. The DMA controller may then transfer the data located at the source address in the first DSP processor core, with a size, e.g., number of bytes, indicated from the buffer descriptor block, to the destination address in the second DSP processor core.

Abstract: The current invention provides a safe and convenient escaping system in buildings to save life when catching fire and method for making it. The escaping system includes a released rope pulley and a lever on the outside wall of buildings, and can be hided in outside wall of buildings or hanging there. When fire takes place in the building, people trapped in will run to the position of escaping system, pulling the insured clasp of the free end of safe rope, hanging life belt or temporary one made of enough firm fabric on one's body on the clasp and sliding down safely. The invented escaping system can be used for all people including seniors, women, and children, because it slides down at a controlled safe speed.