Abstract: A control device having an output pin expansion function and an output pin expansion method thereof are provided. The method includes: connecting at least a shift register unit having a plurality of data transmission pins to a control unit such that the shift register unit can receive strobe signals, a multi-bit data stream, clock signals and enable signals generated by the control unit; sending an enable signal by the control unit so as to allow the shift register unit to shift and store each bit of a multi-bit data stream according to a clock signal generated by the control unit; and sending a strobe signal by the control unit so as to allow the shift register unit to output the multi-bit data in parallel format as opposed to the received serial format through the plurality of data transmission pins, thereby allowing a processing device to interface with more devices (such as LED state indicators) than its fixed number of dedicated output pins would conveniently allow, thus saving costs and board space.

Abstract: A method is provided for fabricating source/drain electrodes of a thin film transistor. The method generally provides a substrate having a first gate electrode and a second gate electrode adjacent and electrically connected. The method further provides coating a photoresist layer on the metal layer, and performing an exposure process on the photoresist layer by a photomask. The method further performs a development process on the exposed photoresist layer to form a photoresist pattern layer with different thicknesses on the metal layer, and then etches the metal layer using the photoresist pattern layer as an etch mask, to form a pair of first source/drain electrodes on the first gate electrode and a pair of second source/drain electrodes on the second gate electrode.

Abstract: An image processing apparatus includes a memory control circuit that stores pixel data in a frame memory, an image processing circuit that processes the pixel data stored in the frame memory, and an output circuit that outputs processed pixel data. The memory control circuit divides the pixel data into upper bit portions and lower bit portions, and a lower bit processing circuit stores the lower bit portions in the frame memory by one of (i) dividing lower bit portion of each of the pixel data into n unit portions and storing corresponding one of n unit portions in the frame memory during each of n successive frame periods, and (ii) dividing pixels constituting each of the frames into n groups and storing the lower bit portions of the pixel data of pixels in corresponding one of n groups in the frame memory during each of n successive frame periods.

Abstract: A method for producing a phosphor includes: providing a blend composed of: (i) a magnesium source; (ii) a silicon source; (iii) an aluminum source; (iv) an oxygen source; (v) a solid nitrogen source; (vi) an ammonium halide; and (vii) an activator ion source; coating the blend with an initiator to obtain a tablet; placing the tablet in a heat insulator; placing a ceramic powder between the tablet and the heat insulator; and heating the tablet to obtain a magnesium-alpha-SiAlON-hosted phosphor.

Abstract: A power generating device includes a power generating unit and a frame, wherein the power generating unit is connected to the frame by two outer casings with two respective arms. The power generating unit has an input shaft and a roller is mounted to the input shaft. The frame is connected to the exerciser and a shock-absorbing member is located beneath the frame. Two resilient members are connected to two ends of the frame and two ends of each resilient member are respectively connected to the frame and the power generating unit so as to urge the roller to contact against the energy transferring end. The shock-absorbing member absorbs vibration from the power generating unit. The users operate the exerciser and generate electric power.

Abstract: A method for preparing an ester is provided. The method includes steps of mixing an acid and an alcohol in a reactive distillation column to generate a first gas mixture; transporting the first gas mixture out of the reactive distillation column; cooling down the first gas mixture for a phase separation to obtain a first liquid mixture in an upper phase; transporting the first liquid mixture back to the reactive distillation column; obtaining a second liquid mixture at a middle section of the reactive distillation column; transporting the second liquid mixture to a separative distillation column; and obtaining the ester at a bottom section of the separative distillation column.

Abstract: A photomask for fabricating a thin film transistor (TFT) is disclosed. The photomask includes a translucent layer disposed on a transparent substrate and covering U-shaped and rectangular channel-forming regions of the transparent substrate. First and second light-shielding layers are disposed on the translucent layer and located at the outer and inner sides of the U-shaped channel-forming region, respectively, and third and fourth light-shielding layers are disposed on the translucent layer and located at opposite sides of the rectangular channel-forming region, respectively, to serve as source/drain-forming regions. An end of the third light-shielding layer extends to the first light-shielding layer. A plurality of first light-shielding islands is disposed on the translucent layer and located within the rectangular channel-forming region. A method for fabricating source/drain electrodes of a TFT is also disclosed.

Abstract: The present invention provides a circuit board of a communication product and a manufacturing method thereof. The circuit board comprises a main body of a circuit board and an isolation cover. A surface of the main body of the circuit board has a power transistor, an insulating layer, a plurality of first openings disposed at intervals on the insulating layer and around the power transistor, and a plurality of soldering portions exposed from the first openings respectively. The isolation cover comprises a cover body and a plurality of second openings equidistantly opened on a lateral side of the cover body. The isolation cover is disposed on the surface of the main body of the circuit board, and is soldered to the soldering portions through a local spot soldering process.

Abstract: The present invention is directed toward a power distribution apparatus being connected to a power source. The invention having a control, or master, power outlet to be connected to a control device, at least one automatically switched, or slave, power outlet to be connected to at least one automatically switched device, a computing component for determining when a power level associated with the control device fall below or rises above a threshold in response to the control device being turned on and off, and for interrupting a power supply on a time delay basis to the at least one automatically switched power outlet when the computing component determines the power levels associated with the control device fall below or rises above the threshold.

Abstract: The present invention provides a circuit board having an isolation cover and an assembling method thereof. The circuit board of the present invention comprises a main body and an isolation cover disposed on the circuit board main body. The main body and the isolation cover have a plurality of corresponding first and second positioning portions, and a ground portion is disposed on at least one side of each first positioning portion. The isolation cover is disposed on a first surface of the main body, and each second positioning portion passes through a second surface of the main body and each first positioning portion. An end of each second positioning portion is connected to each ground portion.

Abstract: A pixel structure fabricating method is provided. A gate is formed on a substrate. A gate insulation layer covering the gate is formed on the substrate. A channel layer, a source, and a drain are simultaneously formed on the gate insulation layer above the gate. The gate, channel layer, source, and drain form a thin film transistor (TFT). A passivation layer is formed on the TFT and the gate insulation layer. A black matrix is formed on the passivation layer. The black matrix has a contact opening above the drain and a color filter containing opening. A color filer layer is formed within the color filter containing opening through inkjet printing. A dielectric layer is formed on the black matrix and the color filter layer. The dielectric layer and the passivation layer are patterned to expose the drain. A pixel electrode electrically connected to the drain is formed.

Abstract: The present invention is directed toward a combined wireless bridge and power strip including a housing defining an interior and an exterior. A power cord is coupled to the housing. A power surge protector coupled to the power cord is disposed in the housing. An electrical power switch is coupled to the surge protector and is disposed in the housing. An array of electrical outlets is coupled to the electrical power switch and is disposed in the housing in operative communication between the interior and the exterior. A power transformer is coupled to the power surge protector in the housing interior. A wireless bridge is coupled to the power transformer and can be disposed in the housing interior or on its exterior. The wireless bridge includes one or more ports to provide entry points for devices requiring wired LAN entry points.

Abstract: An assembly device includes a base having a supporting portion upon which an isolation cover and a main body are disposed. A press-fitting mechanism is movably connected to the base, and includes a press-fitting portion facing the supporting portion and disposed corresponding in position to the supporting portion, and further portions for guiding and bending second positioning portions. The further portions are movably disposed on external side faces of the press-fitting portion. The press-fitting mechanism also has first portions for holding the further portions to the external side faces of the press-fitting portion, and has second portions passing through upper ends of the further portions. A drive mechanism is disposed at the base and has a drive portion connected to the press-fitting mechanism, for driving the press-fitting mechanism to move towards the supporting portion via the drive portion, so as to bend and fasten ends of second positioning portions.

Abstract: The invention discloses a lens adjusting module for adjusting the position of a lens module. The lens adjusting module includes an input rod and an output rod, wherein the input rod is configured along a first direction and has an inclined surface. The output rod is configured along a second direction perpendicular to the first direction. The output rod has a first contact surface contacting the inclined surface, and a second contact surface contacting the lens module. When the input rod moves along the first direction, the first contact surface of the output rod moves along the inclined surface of the input rod, and the lens module moves with the output rod along the second direction.

Abstract: A photomask for fabricating a thin film transistor (TFT) is disclosed. The photomask includes a translucent layer disposed on a transparent substrate and covering U-shaped and rectangular channel-forming regions of the transparent substrate. First and second light-shielding layers are disposed on the translucent layer and located at the outer and inner sides of the U-shaped channel-forming region, respectively, and third and fourth light-shielding layers are disposed on the translucent layer and located at opposite sides of the rectangular channel-forming region, respectively, to serve as source/drain-forming regions. An end of the third light-shielding layer extends to the first light-shielding layer. A plurality of first light-shielding islands is disposed on the translucent layer and located within the rectangular channel-forming region. A method for fabricating source/drain electrodes of a TFT is also disclosed.

Abstract: There is provided a method for use by an echo canceller to cancel a far echo at a variable delay and a near echo at a fixed delay. The method comprises constructing an echo signal model based on an incoming signal, determining a variable echo delay for a far echo caused by a far echo source, determining a fixed echo delay for a near echo caused by a near echo source, subtracting the echo signal model from an outgoing signal at a window placed around the variable echo delay to cancel far echo, e.g. when the echo canceller determines existence of the far echo, and subtracting the echo signal model from the outgoing signal at a window placed around the fixed echo delay to cancel near echo, e.g. regardless of existence of the near echo, wherein the fixed echo delay is smaller than the variable echo delay.

Abstract: The present invention is directed toward a power distribution apparatus being connected to a power source. The invention having a control, or master, power outlet to be connected to a control device, at least one automatically switched, or slave, power outlet to be connected to at least one automatically switched device, a computing component for determining when a wattage level associated with the control device fall below or rises above a threshold in response to the control device being turned on and off, and for interrupting a power supply on a time delay basis to the at least one automatically switched power outlet when the computing component determines the wattage levels associated with the control device fall below or rises above the threshold.

Abstract: There is provided a method of detecting and reporting poor voice quality for use by a gateway device. The method comprises facilitating a connection between a telephone and a remote telephone via a network, and detecting a poor voice quality indictor during the connection. The method further comprises capturing, for a pre-determined period of time, telephone voice data being exchanged between the gateway and the telephone, network voice data being exchanged between the gateway and the network, and gateway parameters. The method also comprises packetizing the telephone voice data, the network voice data and the gateway parameters into a plurality packets having a network address of a network storage, and transmitting the plurality packets destined for the network storage via the network. In one aspect, the poor voice quality indictor may be generated by a user of the telephone in response to a poor voice quality of the connection.

Abstract: The present invention provides a deshydroxy vancomycin compound,a method of its preparation and a pharmaceutical composition comprising a pharmaceutically effective amount of the deshydroxy vancomycin and the use of the said composition in the preparation of drugs for the treatment of susceptible bacteria infections. The method includes the following steps: (1) preparing a concentrated vancomycin solution containing the deshydroxy vancomycin by fermentations of Amycolatopsis Orientalis with Deposit No. CGMCCNO.1183; (2) separating and purifing the concentrated vancomycin solution to obtain a refined filtrate of vancomycin hydrochloride containing the deshydroxy vancomycin by column chromatography; and (3) further separating and purifing the refined filtrate to obtain the deshydroxy vancomycin by chromatography.

Abstract: A system and method of updating firmware and a method of creating firmware are provided. The system includes a firmware storage module having first firmware and second firmware. The first and second firmware each have image header file data, including a cyclic redundancy checksum (CRC) and an image header file creation time. The method of updating firmware includes determining whether the first and second firmware have an abnormality according to the CRC information. When an abnormality is present in the first or second firmware, the abnormality-stricken firmware is replaced with new firmware. When the abnormality is absent from the first and second firmware, the first firmware is compared with the second firmware in terms of the image header file creation time such that the firmware with the earlier creation time is replaced by the new firmware. Operable firmware is available even if the firmware updating operation fails.