Patents by Inventor Huanlong Liu

Huanlong Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180175287
    Abstract: A magnetic tunnel junction is disclosed wherein the reference layer and free layer each comprise one layer having a boron content from 25 to 50 atomic %, and an adjoining second layer with a boron content from 1 to 20 atomic %. One of the first and second layers in each of the free layer and reference layer contacts the tunnel barrier. Each boron containing layer has a thickness of 1 to 10 Angstroms and may include one or more B layers and one or more Co, Fe, CoFe, or CoFeB layers. As a result, migration of non-magnetic metals along crystalline boundaries to the tunnel barrier is prevented, and the MTJ has a low defect count of around 10 ppm while maintaining an acceptable TMR ratio following annealing to temperatures of about 400° C. The boron containing layers are selected from CoB, FeB, CoFeB and alloys thereof including CoFeNiB.
    Type: Application
    Filed: December 8, 2017
    Publication date: June 21, 2018
    Inventors: Huanlong Liu, Yuan-Jen Lee, Jian Zhu, Guenole Jan, Po-Kang Wang
  • Publication number: 20180026179
    Abstract: A laminated seed layer stack with a smooth top surface having a peak to peak roughness of 0.5 nm is formed by sequentially sputter depositing a first seed layer, a first amorphous layer, a second seed layer, and a second amorphous layer where each seed layer may be Mg and has a resputtering rate 2 to 30× that of the amorphous layers that are TaN, SiN, or a CoFeM alloy. A template layer that is NiCr or NiFeCr is formed on the second amorphous layer. As a result, perpendicular magnetic anisotropy in an overlying magnetic layer that is a reference layer, free layer, or dipole layer is substantially maintained during high temperature processing up to 400° C. and is advantageous for magnetic tunnel junctions in embedded MRAMs, spintronic devices, or in read head sensors. The laminated seed layer stack may include a bottommost Ta or TaN buffer layer.
    Type: Application
    Filed: September 18, 2017
    Publication date: January 25, 2018
    Inventors: Jian Zhu, Guenole Jan, Yuan-Jen Lee, Huanlong Liu, Ru-Ying Tong, Po-Kang Wang
  • Patent number: 9842988
    Abstract: A magnetic tunnel junction is disclosed wherein the reference layer and free layer each comprise one layer having a boron content from 25 to 50 atomic %, and an adjoining second layer with a boron content from 1 to 20 atomic %. One of the first and second layers in each of the free layer and reference layer contacts the tunnel barrier. Each boron containing layer has a thickness of 1 to 10 Angstroms and may include one or more B layers and one or more Co, Fe, CoFe, or CoFeB layers. As a result, migration of non-magnetic metals along crystalline boundaries to the tunnel barrier is prevented, and the MTJ has a low defect count of around 10 ppm while maintaining an acceptable TMR ratio following annealing to temperatures of about 400° C. The boron containing layers are selected from CoB, FeB, CoFeB and alloys thereof including CoFeNiB.
    Type: Grant
    Filed: July 20, 2015
    Date of Patent: December 12, 2017
    Assignee: Headway Technologies, Inc.
    Inventors: Huanlong Liu, Yuan-Jen Lee, Jian Zhu, Guenole Jan, Po-Kang Wang
  • Patent number: 9812184
    Abstract: A high speed, low power method to control and switch the magnetization direction of a magnetic region in a magnetic device for memory cells using spin polarized electrical current. The magnetic device comprises a pinned magnetic layer, a reference magnetic layer with a fixed magnetization direction and a free magnetic layer with a changeable magnetization direction. The magnetic layers are separated by insulating non-magnetic layers. A current can be applied to the device to induce a torque that alters the magnetic state of the device so that it can act as a magnetic memory for writing information. The resistance, which depends on the magnetic state of the device, can be measured to read out the information stored in the device.
    Type: Grant
    Filed: August 31, 2016
    Date of Patent: November 7, 2017
    Assignee: NEW YORK UNIVERSITY
    Inventors: Andrew Kent, Daniel Bedau, Huanlong Liu
  • Patent number: 9805816
    Abstract: An integrated circuit includes a magnetic OTP memory array formed of multiple magnetic OTP memory cells having an MTJ stack with a fixed magnetic layer, a tunnel barrier insulating layer, a free magnetic layer, and a second electrode. When a voltage is applied across the magnetic OTP memory cell, the resistance of the MTJ stack and the gating transistor form a voltage divider to apply a large voltage across the MTJ stack to breakdown the tunnel barrier to short the fixed layer to the free layer. The integrated circuit has multiple MRAM arrays configured such that each of the multiple MRAM arrays have performance and density criteria that match MOS transistor based memory including SRAM, DRAM, and flash memory. The integrated circuit may include a functional logic unit connected with the magnetic OTP memory arrays and the MRAM arrays for providing digital data storage.
    Type: Grant
    Filed: March 23, 2016
    Date of Patent: October 31, 2017
    Assignee: Headway Technologies, Inc.
    Inventors: Guenole Jan, Po-Kang Wang, Yuan-Jen Lee, Jian Zhu, Huanlong Liu
  • Patent number: 9780299
    Abstract: A seed layer stack with a smooth top surface having a peak to peak roughness of 0.5 nm is formed by sputter depositing an amorphous layer on a seed layer such as Mg where the seed layer has a resputtering rate 2 to 30× that of the amorphous layer. The uppermost seed layer is a template layer that is NiCr or NiFeCr. As a result, perpendicular magnetic anisotropy in an overlying magnetic layer that is a reference layer, free layer, or dipole layer is substantially maintained during high temperature processing up to 400° C. and is advantageous for magnetic tunnel junctions in embedded MRAMs, spintronic devices, or in read head sensors. The amorphous seed layer is SiN, TaN, or CoFeM where M is B or another element with a content that makes CoFeM amorphous as deposited. The seed layer stack may include a bottommost Ta or TaN buffer layer.
    Type: Grant
    Filed: November 23, 2015
    Date of Patent: October 3, 2017
    Assignee: Headway Technologies, Inc.
    Inventors: Jian Zhu, Guenole Jan, Yuan-Jen Lee, Huanlong Liu, Ru-Ying Tong, Po-Kang Wang
  • Publication number: 20170256703
    Abstract: A seed layer stack with a uniform top surface having a peak to peak roughness of 0.5 nm is formed by sputter depositing an amorphous layer on a smoothing layer such as Mg where the latter has a resputtering rate 2 to 30× that of the amorphous layer. The uppermost seed (template) layer is NiW, NiMo, or one or more of NiCr, NiFeCr, and Hf while the bottommost seed layer is one or more of Ta, TaN, Zr, ZrN, Nb, NbN, Mo, MoN, TiN, W, WN, and Ru. Accordingly, perpendicular magnetic anisotropy in an overlying magnetic layer is substantially maintained during high temperature processing up to 400° C. and is advantageous for magnetic tunnel junctions in embedded MRAMs, spintronic devices, or in read head sensors. The amorphous seed layer is SiN, TaN, or CoFeM where M is B or another element with a content that makes CoFeM amorphous as deposited.
    Type: Application
    Filed: May 19, 2017
    Publication date: September 7, 2017
    Inventors: Jian Zhu, Guenole Jan, Yuan-Jen Lee, Huanlong Liu, Ru-Ying Tong, Jodi Mari Iwata, Vignesh Sundar, Luc Thomas, Yu-Jen Wang, Sahil Patel
  • Publication number: 20170236570
    Abstract: A high speed, low power method to control and switch the magnetization direction of a magnetic region in a magnetic device for memory cells using spin polarized electrical current. The magnetic device comprises a pinned magnetic layer, a reference magnetic layer with a fixed magnetization direction and a free magnetic layer with a changeable magnetization direction. The magnetic layers are separated by insulating non-magnetic layers. A current can be applied to the device to induce a torque that alters the magnetic state of the device so that it can act as a magnetic memory for writing information. The resistance, which depends on the magnetic state of the device, can be measured to read out the information stored in the device.
    Type: Application
    Filed: August 31, 2016
    Publication date: August 17, 2017
    Applicant: New York University
    Inventors: Andrew Kent, Daniel Bedau, Huanlong Liu
  • Patent number: 9721631
    Abstract: A magnetic device that includes a perpendicular magnetized polarizing layer configured to provide a first spin-torque and an in-plane magnetized free layer having a magnetization vector having at least a first stable state and a second stable state. The magnetic device also includes a reference layer configured to provide a second spin-torque. The first spin-torque and the second spin-torque can combine. The in-plane magnetized free layer and the reference layer form a magnetic tunnel junction and the combined first spin-torque and second spin-torque influences the magnetic state of the in-plane magnetized free layer. An application of a voltage pulse, having either positive or negative polarity and a selected amplitude and duration, through the magnetic device causes the magnetization vector to oscillate between the first stable state and the second stable state for a portion of the duration regardless of an initial state of the magnetization vector.
    Type: Grant
    Filed: March 14, 2014
    Date of Patent: August 1, 2017
    Assignee: NEW YORK UNIVERSITY
    Inventors: Andrew Kent, Huanlong Liu
  • Patent number: 9673385
    Abstract: A seed layer stack with a smooth top surface having a peak to peak roughness of about 0.5 nm over a range of 100 nm is formed by sputter depositing an X layer such as Mo on a Ni layer where the X layer has one or both of a larger bond energy and a greater atomic number than Ni. A (Ni/X)m laminate is formed and then an uppermost NiCr seed layer is deposited to enhance perpendicular magnetic anisotropy (PMA) in an overlying ferromagnetic layer. A <111> NiCr crystal structure promotes <111> texture in the ferromagnetic layer. X layers serve as a diffusion barrier to Ta migration from a bottom electrode and have good lattice matching with the adjoining Ni layer and uppermost NiCr layer. As a result of the smooth seed layer stack in a magnetic tunnel junction (MTJ), MTJ properties are improved and more reproducible.
    Type: Grant
    Filed: March 24, 2016
    Date of Patent: June 6, 2017
    Assignee: Headway Technologies, Inc.
    Inventors: Huanlong Liu, Ru-Ying Tong, Guenole Jan
  • Publication number: 20170148977
    Abstract: A seed layer stack with a smooth top surface having a peak to peak roughness of 0.5 nm is formed by sputter depositing an amorphous layer on a seed layer such as Mg where the seed layer has a resputtering rate 2 to 30× that of the amorphous layer. The uppermost seed layer is a template layer that is NiCr or NiFeCr. As a result, perpendicular magnetic anisotropy in an overlying magnetic layer that is a reference layer, free layer, or dipole layer is substantially maintained during high temperature processing up to 400° C. and is advantageous for magnetic tunnel junctions in embedded MRAMs, spintronic devices, or in read head sensors. The amorphous seed layer is SiN, TaN, or CoFeM where M is B or another element with a content that makes CoFeM amorphous as deposited. The seed layer stack may include a bottommost Ta or TaN buffer layer.
    Type: Application
    Filed: November 23, 2015
    Publication date: May 25, 2017
    Inventors: Jian Zhu, Guenole Jan, Yuan-Jen Lee, Huanlong Liu, Ru-Ying Tong, Po-Kang Wang
  • Publication number: 20170025602
    Abstract: A magnetic tunnel junction is disclosed wherein the reference layer and free layer each comprise one layer having a boron content from 25 to 50 atomic %, and an adjoining second layer with a boron content from 1 to 20 atomic %. One of the first and second layers in each of the free layer and reference layer contacts the tunnel barrier. Each boron containing layer has a thickness of 1 to 10 Angstroms and may include one or more B layers and one or more Co, Fe, CoFe, or CoFeB layers. As a result, migration of non-magnetic metals along crystalline boundaries to the tunnel barrier is prevented, and the MTJ has a low defect count of around 10 ppm while maintaining an acceptable TMR ratio following annealing to temperatures of about 400° C. The boron containing layers are selected from CoB, FeB, CoFeB and alloys thereof including CoFeNiB.
    Type: Application
    Filed: July 20, 2015
    Publication date: January 26, 2017
    Inventors: Huanlong Liu, Yuan-Jen Lee, Jian Zhu, Guenole Jan, Po-Kang Wang
  • Publication number: 20160293268
    Abstract: An integrated circuit includes a magnetic OTP memory array formed of multiple magnetic OTP memory cells having an MTJ stack with a fixed magnetic layer, a tunnel barrier insulating layer, a free magnetic layer, and a second electrode. When a voltage is applied across the magnetic OTP memory cell, the resistance of the MTJ stack and the gating transistor form a voltage divider to apply a large voltage across the MTJ stack to breakdown the tunnel barrier to short the fixed layer to the free layer. The integrated circuit has multiple MRAM arrays configured such that each of the multiple MRAM arrays have performance and density criteria that match MOS transistor based memory including SRAM, DRAM, and flash memory. The integrated circuit may include a functional logic unit connected with the magnetic OTP memory arrays and the MRAM arrays for providing digital data storage.
    Type: Application
    Filed: March 23, 2016
    Publication date: October 6, 2016
    Inventors: Guenole Jan, Po-Kang Wang, Yuan-Jen Lee, Jian Zhu, Huanlong Liu
  • Patent number: 9449668
    Abstract: A high speed, low power method to control and switch the magnetization direction of a magnetic region in a magnetic device for memory cells using spin polarized electrical current. The magnetic device comprises a pinned magnetic layer, a reference magnetic layer with a fixed magnetization direction and a free magnetic layer with a changeable magnetization direction. The magnetic layers are separated by insulating non-magnetic layers. A current can be applied to the device to induce a torque that alters the magnetic state of the device so that it can act as a magnetic memory for writing information. The resistance, which depends on the magnetic state of the device, can be measured to read out the information stored in the device.
    Type: Grant
    Filed: July 7, 2015
    Date of Patent: September 20, 2016
    Assignee: New York University
    Inventors: Andrew Kent, Daniel Bedau, Huanlong Liu
  • Patent number: 9425387
    Abstract: A magnetic tunnel junction (MTJ) is disclosed wherein a free layer has an interface with a tunnel barrier and a second interface with a metal oxide layer to promote perpendicular magnetic anisotropy (PMA) therein. A diffusion barrier is formed on a side of the metal oxide layer opposite the second interface to prevent non-magnetic metals in a hard mask or electrode from migrating to the second interface and degrading free layer PMA. A second diffusion barrier may be formed between a second electrode and a reference layer. The diffusion barrier may be a single layer of SiN, TiN, TaN, Mo, or CoFeX where X is Zr, P, B, or Ta, or is a multilayer such as CoFeX/Mo wherein CoFeX contacts the metal oxide layer and Mo adjoins a hard mask. As a result, coercivity is maintained or increased in the MTJ after annealing at 400° C. for 30 minutes.
    Type: Grant
    Filed: September 8, 2015
    Date of Patent: August 23, 2016
    Assignee: Headway Technologies, Inc.
    Inventors: Huanlong Liu, Yuan-Jen Lee, Jian Zhu, Guenole Jan, Ruth Tong, Luc Thomas
  • Publication number: 20160035401
    Abstract: A magnetic device that includes a perpendicular magnetized polarizing layer configured to provide a first spin-torque and an in-plane magnetized free layer having a magnetization vector having at least a first stable state and a second stable state. The magnetic device also includes a reference layer configured to provide a second spin-torque. The first spin-torque and the second spin-torque can combine. The in-plane magnetized free layer and the reference layer form a magnetic tunnel junction and the combined first spin-torque and second spin-torque influences the magnetic state of the in-plane magnetized free layer. An application of a voltage pulse, having either positive or negative polarity and a selected amplitude and duration, through the magnetic device causes the magnetization vector to oscillate between the first stable state and the second stable state for a portion of the duration regardless of an initial state of the magnetization vector.
    Type: Application
    Filed: March 14, 2014
    Publication date: February 4, 2016
    Applicant: New York University
    Inventors: Andrew KENT, Huanlong LIU
  • Patent number: 9236103
    Abstract: A magnetic device includes a magnetized polarizing layer, a free magnetic layer, and a reference layer. The free magnetic layer forms a first electrode and is separated from the magnetized polarizing layer by a first non-magnetic metal layer. The free magnetic layer has a magnetization vector having a first and second stable state. The reference layer forms a second electrode and is separated from the free-magnetic layer by a second non-magnetic layer. Unipolar current is sourced through the polarizing, free magnetic and reference layers. Switching of the magnetization vector of the free magnetic layer from the first stable state to the second state is initiated by application of a first unipolar current pulse, and switching of the magnetization vector of the free magnetic layer from the second stable state to the first stable state is initiated by application of a second unipolar current pulse.
    Type: Grant
    Filed: April 29, 2014
    Date of Patent: January 12, 2016
    Assignee: New York University
    Inventors: Andrew Kent, Daniel Bedau, Huanlong Liu
  • Publication number: 20150357015
    Abstract: A high speed, low power method to control and switch the magnetization direction of a magnetic region in a magnetic device for memory cells using spin polarized electrical current. The magnetic device comprises a pinned magnetic layer, a reference magnetic layer with a fixed magnetization direction and a free magnetic layer with a changeable magnetization direction. The magnetic layers are separated by insulating non-magnetic layers. A current can be applied to the device to induce a torque that alters the magnetic state of the device so that it can act as a magnetic memory for writing information. The resistance, which depends on the magnetic state of the device, can be measured to read out the information stored in the device.
    Type: Application
    Filed: July 7, 2015
    Publication date: December 10, 2015
    Applicant: NEW YORK UNIVERSITY
    Inventors: Andrew Kent, Daniel Bedau, Huanlong Liu
  • Publication number: 20150333254
    Abstract: A method of forming a MTJ with a tunnel barrier having a high tunneling magnetoresistance ratio, and low resistance x area value is disclosed. The method preserves perpendicular magnetic anisotropy in bottom and top magnetic layers that adjoin bottom and top surfaces of the tunnel barrier. A key feature is a passive oxidation step of a first Mg layer that is deposited on the bottom magnetic layer wherein a maximum oxygen pressure is 10?5 torr. A bottom portion of the first Mg layer remains unoxidized thereby protecting the bottom magnetic layer from substantial oxidation during subsequent oxidation and anneal processes that are employed to complete the fabrication of the tunnel barrier and MTJ. An uppermost Mg layer may be formed as the top layer in the tunnel barrier stack before a top magnetic layer is deposited.
    Type: Application
    Filed: May 15, 2014
    Publication date: November 19, 2015
    Applicant: Headway Technologies, Inc.
    Inventors: Huanlong Liu, Jian Zhu, Keyu Pi, Ru-Ying Tong
  • Patent number: 8941196
    Abstract: Orthogonal spin-torque bit cells whose spin torques from a perpendicular polarizer and an in-plane magnetized reference layer are constructively or destructively combined. An orthogonal spin-torque bit cell includes a perpendicular magnetized polarizing layer configured to provide a first spin-torque; an in-plane magnetized free layer and a reference layer configured to provide a second spin-torque. The first spin-torque and the second spin-torque combine and the combined first spin-torque and second spin-torque influences the magnetic state of the in-plane magnetized free layer. The in-plane magnetized free layer and the reference layer form a magnetic tunnel junction. The first spin-torque and second spin-torque can combine constructively to lower a switching current, increase a switching speed, and/or torque decrease an operating energy of the orthogonal spin-torque bit cell.
    Type: Grant
    Filed: July 3, 2013
    Date of Patent: January 27, 2015
    Assignee: New York University
    Inventors: Daniel Bedau, Huanlong Liu, Andrew David Kent