Patents by Inventor Huaqiang Wu

Huaqiang Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240110660
    Abstract: A mechanical apparatus levelling mechanism has a base (10), an adjusting screw rod (20), an adjusting plate (30) and a support plate (40). The adjusting screw rod penetrates into the adjusting plate in an axial direction and is connected to the base. The adjusting plate is located on the base; the support plate is mounted at a top end of the adjusting screw rod and is located above the adjusting plate; and the adjusting plate rotates to drive the adjusting screw rod to rotate, such that the support plate is adjusted vertically. This simplifies the operation procedure, improving the assembly accuracy and improving the working efficiency. The method is simple to operate. These adjusting mechanisms are convenient to move and simple to adjust, are time-saving and labour-saving, and have adjustment dimensions that can be quantified. Moreover, the installation is simple, and the adjusting mechanisms themselves can be reused.
    Type: Application
    Filed: March 24, 2021
    Publication date: April 4, 2024
    Inventors: Shaowen Zheng, Dengyou Chen, Huaqiang Hui, Gang Wu, Qingsong Zhao, Long Qian, Pengbo Hao
  • Publication number: 20240046086
    Abstract: Disclosed are a quantization method and quantization apparatus for a weight of a neural network, and a storage medium. The neural network is implemented on the basis of a crossbar-enabled analog computing-in-memory (CACIM) system, and the quantization method includes: acquiring a distribution characteristic of a weight; and determining, according to the distribution characteristic of the weight, an initial quantization parameter for quantizing the weight to reduce a quantization error in quantizing the weight. The quantization method provided by the embodiments of the present disclosure does not pre-define the quantization method used, but determines the quantization parameter used for quantizing the weight according to the distribution characteristic of the weight to reduce the quantization error, so that the effect of the neural network model is better under the same mapping overhead, and the mapping overhead is smaller under the same effect of the neural network model.
    Type: Application
    Filed: December 13, 2021
    Publication date: February 8, 2024
    Applicant: TSINGHUA UNIVERSITY
    Inventors: Huaqiang WU, Qingtian ZHANG, Lingjun DAI
  • Patent number: 11803360
    Abstract: A compilation method, a compilation apparatus suitable for an In-Memory Computing apparatus, a computing device and a storage medium. The compilation method includes: acquiring calculation information of an algorithm to be compiled; converting the algorithm to be compiled into the first intermediate representation according to the calculation information; mapping the first intermediate representation to the second intermediate representation; and compiling the algorithm to be compiled into instruction information recognized by the In-Memory Computing apparatus according to the hardware information, to make the In-Memory Computing apparatus execute the instruction information. The compilation method may compile the calculation information into instructions that may be directly executed by the In-Memory Computing apparatus, so as to realize the effect of accelerating the operations of various algorithms by using the In-Memory Computing apparatus.
    Type: Grant
    Filed: November 2, 2021
    Date of Patent: October 31, 2023
    Assignee: TSINGHUA UNIVERSITY
    Inventors: Huaqiang Wu, Ruihua Yu, Yilong Guo, Jianshi Tang, Bin Gao, He Qian
  • Patent number: 11717227
    Abstract: A signal processing device and a signal processing method. The signal processing device includes a receiver, a memristor array and a classifier. The receiver is configured to receive a first signal. The memristor array includes a plurality of memristor units, each of the plurality of memristor units includes a memristor, and the memristor array is configured to apply the first signal that has been received to at least one memristor unit of the plurality of memristor units and output a second signal based on a memristor resistance value distribution of the memristor array. The classifier is configured to classify the second signal outputted from the memristor array to obtain a type of the first signal.
    Type: Grant
    Filed: January 23, 2020
    Date of Patent: August 8, 2023
    Assignee: Tsinghua University
    Inventors: Xinyi Li, Huaqiang Wu, He Qian, Bin Gao
  • Publication number: 20230244919
    Abstract: At least one embodiment of the present disclosure provides a reservoir computing apparatus and a data processing method. The reservoir computing apparatus includes: a signal input circuit, configured to receive an input signal; a reservoir circuit, including a plurality of reservoir sub-circuits, in which each reservoir sub-circuit includes a mask sub-circuit and a rotating neuron sub-circuit, the mask sub-circuit is configured to perform a first processing on the input signal with a first weight to obtain a first processing result, and the rotating neuron sub-circuit is configured to perform a second processing on the first processing result to obtain a second processing result; and an output layer circuit, configured to multiply a plurality of second processing results by a second weight matrix to obtain a third processing result. The reservoir computing apparatus optimizes operation efficiency and reduces implementation costs.
    Type: Application
    Filed: January 17, 2023
    Publication date: August 3, 2023
    Applicant: TSINGHUA UNIVERSITY
    Inventors: Huaqiang WU, Xiangpeng LIANG, Ya?nan ZHONG, Jianshi TANG, Bin GAO, He QIAN
  • Publication number: 20230168891
    Abstract: An in-memory computing processor, an in-memory computing processing system, an in-memory computing processing apparatus, and a deployment method of an algorithm model based on the in-memory computing processor are disclosed. The in-memory computing processor includes a first master control unit and a plurality of memristor processing modules, and the first master control unit is configured to be capable of dispatching and controlling the plurality of memristor processing modules, the plurality of memristor processing modules are configured to be capable of calculating under the dispatch and control of the first master control unit, and the plurality of memristor processing modules are further configured to be capable of communicating independently of the first master control unit to calculate.
    Type: Application
    Filed: November 5, 2021
    Publication date: June 1, 2023
    Applicant: TSINGHUA UNIVERSITY
    Inventors: Peng YAO, Bin GAO, Dabin WU, Hu HE, Jianshi TANG, He QIAN, Huaqiang WU
  • Patent number: 11639328
    Abstract: A method for preparing amantadine includes chlorinating adamantane with chlorine gas in a solvent in the presence of a Lewis acid catalyst to obtain a reaction liquid, and then removing the solvent and residues containing the catalyst in the reaction liquid, to obtain a chlorinated product. The chlorinated product is mixed with urea to a mixture, and the mixture is subjected to an amination reaction, to obtain amantadine. The results of examples show that the purity of the prepared amantadine could reach 99.5% or more.
    Type: Grant
    Filed: May 19, 2020
    Date of Patent: May 2, 2023
    Assignee: Shandong Holly Pharmaceutical Co., Ltd.
    Inventors: Lanhua Li, Yuenan Qiu, Donghong Xu, Zhiyuan Liu, Huaqiang Wu, Zhufeng Zhou, Lihong Chen, Zhen Lin
  • Patent number: 11594623
    Abstract: A nanowire transistor and a manufacture method thereof are provided. The nanowire transistor includes a semiconductor wire, a semiconductor layer, a source electrode and a drain electrode. The semiconductor wire includes a first semiconductor material and includes a source region, a drain region, and a channel region, along an axial direction of the semiconductor wire, the channel region is between the source region and the drain region; the semiconductor layer includes a second semiconductor material and covers the channel region of the semiconductor wire; the source electrode is in the source region of the semiconductor wire and is in direct contact with the source region of the semiconductor wire, and the drain electrode is in the drain region of the semiconductor wire and is in direct contact with the drain region of the semiconductor wire.
    Type: Grant
    Filed: August 3, 2018
    Date of Patent: February 28, 2023
    Assignee: TSINGHUA UNIVERSITY
    Inventors: Feng Xu, Bin Gao, Xinyi Li, Huaqiang Wu, He Qian
  • Publication number: 20230044537
    Abstract: A resistive random access memory array and an operation method therefor, and a resistive random access memory circuit. The resistive random access memory array includes multiple memory cells, multiple bit lines, multiple word lines, multiple block selection circuits, and multiple initialization circuits. Each memory cell includes a resistive random access memory device and a switching device. The multiple memory cells are arranged into multiple memory cell rows and multiple memory cell columns in a first direction and a second direction, and the multiple bit lines and the multiple memory cell columns are connected in one-to-one correspondence. Each block selection circuit is configured to write a read/write operation voltage into a correspondingly connected bit line in response to a block selection voltage. Each initialization circuit is configured to write an initialization operation voltage to a correspondingly connected bit line in response to an initialization control voltage.
    Type: Application
    Filed: December 30, 2020
    Publication date: February 9, 2023
    Applicant: TSINGHUA UNIVERSITY
    Inventors: Liyang PAN, Jingyao SUN, Huaqiang WU
  • Patent number: 11574199
    Abstract: A generative adversarial network device and a training method thereof. The generative adversarial network device includes a generator and a discriminator. The generator is configured to generate a first sample according to an input data; the discriminator is coupled to the generator, and is configured to receive the first sample and be trained based on the first sample; the generator includes a first memristor array serving as a first weight array. The generative adversarial network device can omit a process of adding noise to fake samples generated by the generator, thereby saving training time, reducing resource consumption and improving training speed of the generative adversarial network.
    Type: Grant
    Filed: December 1, 2019
    Date of Patent: February 7, 2023
    Assignee: Tsinghua University
    Inventors: Huaqiang Wu, Bin Gao, Yudeng Lin, He Qian
  • Publication number: 20230004357
    Abstract: A method for generating a random number and a random number generator are provided. The method for generating a random number includes: performing n writing operations on at least one analog resistive random access memory, where each of the n writing operations includes applying at least one writing operation pulse to change a conductance value of an operated analog resistive access memory; and generating the random number based on n writing operation pulse numbers respectively corresponding to the n writing operations, where n is a positive integer. The method for generating a random number generates random numbers based on the analog characteristics of the analog resistive random access memory, the generated random number does not need back-end correction, and have both high speed and high reliability.
    Type: Application
    Filed: November 13, 2020
    Publication date: January 5, 2023
    Applicant: TSINGHUA UNIVERSITY
    Inventors: Huaqiang WU, Bohan LIN, Bin GAO, Jianshi TANG, He QIAN
  • Patent number: 11538177
    Abstract: Disclosed are a video stitching method and a video stitching device. The video stitching method is applicable for stitching a first video and a second video, and includes: performing feature extraction, feature matching and screening on a first target frame of the first video and a second target frame of the second video, so as to obtain a first feature point pair set; performing forward tracking on the first target frame and the second target frame, so as to obtain a second feature point pair set; performing backward tracking on the first target frame and the second target frame, so as to obtain a third feature point pair set; and calculating a geometric transformation relationship between the first target frame and the second target frame according to a union of the first feature point pair set, the second feature point pair set and the third feature point pair set.
    Type: Grant
    Filed: December 24, 2019
    Date of Patent: December 27, 2022
    Assignee: TSINGHUA UNIVERSITY
    Inventors: Huaqiang Wu, Qinglin He, Chen Hu, Xuguang Wang
  • Publication number: 20220374688
    Abstract: A training method and a training device for a neural network based on memristors are provided. The neural network includes a plurality of neuron layers connected one by one and weight parameters between the plurality of neuron layers, and the training method includes: training the weight parameters of the neural network, and programming a memristor array based on the weight parameters after being trained to write the weight parameters after being trained into the memristor array; and updating a critical layer or several critical layers of the weight parameters of the neural network by adjusting conductance values of at least part of memristors of the memristor array.
    Type: Application
    Filed: March 6, 2020
    Publication date: November 24, 2022
    Applicant: TSINGHUA UNIVERSITY
    Inventors: Huaqiang WU, Peng YAO, Bin GAO, Qingtian ZHANG, He QIAN
  • Publication number: 20220374694
    Abstract: A neural network circuit is described that includes a first sample-and-hold circuit, a reference voltage generation circuit, a first comparator circuit, and a first output circuit. The first sample-and-hold circuit generates a first analog voltage based on a first output current output by a first neural network computation array. The reference voltage generation circuit generates a reference voltage based on a first control signal. The first comparator circuit is connected to the first sample-and-hold circuit and the reference voltage generation circuit, and outputs a first level signal based on the first analog voltage and the reference voltage. The first output circuit samples the first level signal based on a second control signal, and outputs a first computation result that meets the first computation precision.
    Type: Application
    Filed: August 5, 2022
    Publication date: November 24, 2022
    Inventors: Bin GAO, Qi LIU, Leibin NI, Kanwen WANG, Huaqiang WU
  • Publication number: 20220335278
    Abstract: Disclosed are a parallel acceleration method for a memristor-based neural network, a parallel acceleration processor based on a memristor-based neural network and a parallel acceleration device based on a memristor-based neural network. The neural network includes a plurality of functional layers sequentially provided, wherein the plurality of functional layers include a first functional layer and a second functional layer following the first functional layer, the first functional layer includes a plurality of first memristor arrays in parallel, and the plurality of first memristor arrays are configured to execute an operation of the first functional layer in parallel and to output a result of the operation to the second functional layer. The parallel acceleration method includes: executing the operation of the first functional layer in parallel via the plurality of first memristor arrays and outputting the result of the operation to the second functional layer.
    Type: Application
    Filed: January 10, 2020
    Publication date: October 20, 2022
    Applicant: TSINGHUA UNIVERSITY
    Inventors: Huaqiang WU, Peng YAO, Bin GAO, He QIAN
  • Patent number: 11468300
    Abstract: A circuit structure and a driving method thereof, a neural network are disclosed. The circuit structure includes at least one circuit unit, each circuit unit includes a first group of resistive switching devices and a second group of resistive switching devices, the first group of resistive switching devices includes a resistance gradual-change device, the second group of resistive switching devices includes a resistance abrupt-change device, the first group of resistive switching devices and the second group of resistive switching devices are connected in series, in a case that no voltage is applied, a resistance value of the first group of resistive switching devices is larger than a resistance value of the second group of resistive switching devices.
    Type: Grant
    Filed: November 14, 2017
    Date of Patent: October 11, 2022
    Assignee: Tsinghua University
    Inventors: Xinyi Li, Huaqiang Wu, Sen Song, Qingtian Zhang, Bin Gao, He Qian
  • Publication number: 20220277866
    Abstract: This application discloses a conductive paste, a preparation method thereof, and a preparation method of a conductive film using the conductive paste. The conductive paste comprises: a thermoplastic polyurethane, conductive particles, and an organic solvent, the thermoplastic polyurethane and the conductive particles being proportionally mixed in the organic solvent, and the thermoplastic polyurethane being dispersed in the form of particles among the conductive particles. A thermoplastic polyurethane elastomer is used as a binder, and the conductive particles are mixed in the organic solvent containing the thermoplastic polyurethane elastomer. The conductive particles ensure the conductivity of the conductive film prepared using the conductive paste. The thermoplastic polyurethane has strong adhesion ability, and is suitable for use on the surface of most substrates, to form a conductive film with good adhesion and no cracking.
    Type: Application
    Filed: May 18, 2022
    Publication date: September 1, 2022
    Inventors: Jianshi TANG, Zhenxuan ZHAO, Yuan DAI, Wangwei LEE, Zhengyou ZHANG, Jian YUAN, Huaqiang WU, He QIAN, Bin GAO
  • Publication number: 20220277199
    Abstract: A method for data processing in a neural network system and a neural network system are provided. The method includes: inputting training data into a neural network system to obtain first output data, and adjusting, based on a deviation between the first output data and target output data, a weight value stored in at least one in-memory computing unit in some neural network arrays in a plurality of neural network arrays in the neural network system using parallel acceleration. The some neural network arrays are configured to implement computing of some neural network layers in the neural network system. The method may improve performance and recognition accuracy of the neural network system.
    Type: Application
    Filed: May 20, 2022
    Publication date: September 1, 2022
    Inventors: Bin GAO, Peng YAO, Kanwen WANG, Jianxing LIAO, Tieying WANG, Huaqiang WU
  • Publication number: 20220275220
    Abstract: Embodiments of this application provide a method for preparing a thin film piezoresistive material, a thin film piezoresistive material, a robot, and a device. The method includes: determining a mass ratio of conductive particles to a cross-linked polymer in preparation of the thin film piezoresistive material, a value range of the mass ratio being 3:97 to 20:80; dispersing the conductive particles and the cross-linked polymer in a solvent according to the mass ratio, to obtain a first dispersion; and curing the first dispersion by using a liquid dropping method within a temperature range of 25° C. to 200° C., to obtain the thin film piezoresistive material. The technical solutions provided by the embodiments of this application provide a method for preparing a thin film piezoresistive material through liquid dropping, thereby effectively controlling the thickness of the piezoresistive material, so that the prepared thin film piezoresistive material has a relatively small thickness.
    Type: Application
    Filed: May 18, 2022
    Publication date: September 1, 2022
    Inventors: Jianshi TANG, Zhenxuan ZHAO, Yuan DAI, Zhengyou ZHANG, Jian YUAN, Huaqiang WU, He QIAN, Bin GAO
  • Publication number: 20220251023
    Abstract: A method for preparing amantadine includes chlorinating adamantane with chlorine gas in a solvent in the presence of a Lewis acid catalyst to obtain a reaction liquid, and then removing the solvent and residues containing the catalyst in the reaction liquid, to obtain a chlorinated product. The chlorinated product is mixed with urea to a mixture, and the mixture is subjected to an amination reaction, to obtain amantadine. The results of examples show that the purity of the prepared amantadine could reach 99.5% or more.
    Type: Application
    Filed: May 19, 2020
    Publication date: August 11, 2022
    Inventors: Lanhua Li, Yuenan Qiu, Donghong Xu, Zhiyuan Liu, Huaqiang Wu, Zhufeng Zhou, Lihong Chen, Zhen Lin