Abstract: A method of obtaining a doped semiconductor layer, including the successive steps of: a) performing, in a first single-crystal layer made of a semiconductor alloy of at least a first element A1 and a second element A2, an ion implantation of a first element B which is a dopant for the alloy and of a second element C which is not a dopant for the alloy, to make an upper portion of the first layer amorphous and to preserve the crystal structure of a lower portion of the first layer; and b) performing a solid phase recrystallization anneal of the upper portion of the first layer, resulting in transforming the upper portion of the first layer into a doped single-crystal layer of the alloy.

Abstract: A process for producing at least two adjacent regions, each comprising an array of light-emitting wires connected together in a given region by a transparent conductive layer, comprises: producing, on a substrate, a plurality of individual zones for growing wires extending over an area greater than the cumulative area of the two chips; growing wires in the individual growth zones; removing wires from at least one zone forming an initial free area to define the arrays of wires, the initial free area comprising individual growth zones level with the removed wires; and depositing a transparent conductive layer on each array of wires to electrically connect the wires of a given array of wires, each conductive layer being separated from the conductive layer of the neighbouring region by a free area. A device obtained using the process of the invention is also provided.

Abstract: A method of manufacturing an electronic device, including the successive steps of: a) performing an ion implantation of indium or of aluminum into an upper portion of a first single-crystal gallium nitride layer, to make the upper portion of the first layer amorphous and to preserve the crystal structure of a lower portion of the first layer; and b) performing a solid phase recrystallization anneal of the upper portion of the first layer, resulting in transforming the upper portion of the first layer into a crystalline indium gallium nitride or aluminum gallium nitride layer.

Abstract: An optoelectronic device manufacturing method including the steps of: a) forming an active diode stack including first and second of opposite conductivity types; b) forming an integrated control circuit including a plurality of elementary control cells each including at least one MOS transistor; c) after steps a) and b), transferring the integrated control circuit onto the upper surface of the active diode stack; and d) after step c), forming trenches extending vertically through the integrated control circuit and emerging into or onto the first layer and delimiting a plurality of pixels each including a diode and an elementary control cell.

Abstract: A method of manufacturing an optoelectronic device, including the steps of: a) providing an active diode stack comprising a first doped semiconductor layer of a first conductivity type and a second doped semiconductor layer of the first conductivity type, coating the upper surface of the first layer; b) arranging a third semiconductor layer on the upper surface of the active stack; c) after step b), forming at least one MOS transistor inside and on top of the third semiconductor layer; and d) after step b), before or after step c), forming trenches vertically extending from the upper surface of the third layer and emerging into or onto the upper surface of the first layer and delimiting a plurality of pixels, each including a diode and an elementary diode control cell.

Abstract: An optoelectronic device including: a first, p-doped semiconductor layer and a second, n-doped semiconductor layer which are superposed and form a p-n junction; a first electrode electrically connected to the first semiconductor layer and forming an anode of the device; a gate positioned against at least one lateral flank of the first semiconductor layer; a second electrode, positioned against a lateral flank of the second semiconductor layer, electrically connected to the second semiconductor layer and electrically isolated from the first semiconductor layer; and in which a portion of the second electrode is positioned against the gate such that the second electrode is electrically connected to the gate and forms both a gate electrode and a cathode of the device.

Abstract: A method for obtaining mesas that are made at least in part of a nitride (N), the method includes providing a stack comprising a substrate and at least the following layers disposed in succession from the substrate a first layer, referred to as the flow layer, and a second, crystalline layer, referred to as the crystalline layer; forming pads by etching the crystalline layer and at least one portion of the flow layer such that: —each pad includes at least: —a first section, referred to as the flow section, formed by at least one portion of the flow layer, and a second, crystalline section, referred to as the crystalline section, framed by the crystalline layer and overlying the flow section, the pads are distributed over the substrate so as to form a plurality of sets of pads; and epitaxially growing a crystallite on at least some of said pads and continuing the epitaxial growth of the crystallites until the crystallites carried by the adjacent pads of the same set coalesce.

Abstract: A method of manufacturing an optoelectronic device, including: a) transferring, onto a connection surface of a control circuit, an active diode stack including at least first and second semiconductor layers of opposite conductivity types, so that the second semiconductor layer in the stack faces the connection surface of the control circuit and is separated from the connection surface of the control circuit by at least one insulating layer; b) forming in the active stack trenches delimiting a plurality of diodes, the trenches extending through the insulating layer and emerging onto the connection surface of the control circuit; and c) forming in the trenches metallizations connecting the second semiconductor layer to the connection surface of the control circuit.

Abstract: A method of manufacturing an optoelectronic device, including: a) transferring, onto a surface of a control circuit, a diode stack including first and second semiconductor layers of opposite conductivity types, so that the second layer is electrically connected to metal pads of the control circuit; b) forming in the active stack trenches delimiting a plurality of diodes connected to separate metal pads of the control circuit; c) depositing an insulating layer on the lateral walls of the trenches; d) partially removing the insulating layer to expose the sides of the portions of the first layer delimited by the trenches; and e) forming a metallization coating the lateral walls and the bottom of the trenches and contacting the sides of the portions of the first layer delimited by the trenches.

Abstract: An optoelectronic device manufacturing method including the steps of: a) forming an active diode stack including first and second of opposite conductivity types; b) forming an integrated control circuit including a plurality of elementary control cells each including at least one MOS transistor; c) after steps a) and b), transferring the integrated control circuit onto the upper surface of the active diode stack; and d) after step c), forming trenches extending vertically through the integrated control circuit and emerging into or onto the first layer and delimiting a plurality of pixels each including a diode and an elementary control cell.

Abstract: A method of manufacturing an electronic device, including the successive steps of: a) performing an ion implantation of indium or of aluminum into an upper portion of a first single-crystal gallium nitride layer, to make the upper portion of the first layer amorphous and to preserve the crystal structure of a lower portion of the first layer; and b) performing a solid phase recrystallization anneal of the upper portion of the first layer, resulting in transforming the upper portion of the first layer into a crystalline indium gallium nitride or aluminum gallium nitride layer.

Abstract: A process for producing at least two adjacent regions, each comprising an array of light-emitting wires connected together in a given region by a transparent conductive layer, comprises: producing, on a substrate, a plurality of individual zones for growing wires extending over an area greater than the cumulative area of the two chips; growing wires in the individual growth zones; removing wires from at least one zone forming an initial free area to define the arrays of wires, the initial free area comprising individual growth zones level with the removed wires; and depositing a transparent conductive layer on each array of wires to electrically connect the wires of a given array of wires, each conductive layer being separated from the conductive layer of the neighbouring region by a free area. A device obtained using the process of the invention is also provided.

Abstract: A diode including: first and second doped semi-conductor portions forming a p-n junction, a first part of the first portion being arranged between a second part of the first portion and the second portion; dielectric portions covering side walls of the second portion and the first part of the first portion; a first electrode arranged against outer side walls of the dielectric portions and against side walls of the second part of the first portion, electrically connected to the first portion only by contact with said side walls, and passing through the entire thickness of the first portion; a second optically reflecting electrode electrically connected to the second portion such that the second portion is arranged between the second electrode and the first portion.

Abstract: A process for producing at least two adjacent regions, each comprising an array of light-emitting wires connected together in a given region by a transparent conductive layer, comprises: producing, on a substrate, a plurality of individual zones for growing wires extending over an area greater than the cumulative area of the two chips; growing wires in the individual growth zones; removing wires from at least one zone forming an initial free area to define the arrays of wires, the initial free area comprising individual growth zones level with the removed wires; and depositing a transparent conductive layer on each array of wires to electrically connect the wires of a given array of wires, each conductive layer being separated from the conductive layer of the neighbouring region by a free area. A device obtained using the process of the invention is also provided.

Abstract: A method of obtaining a doped semiconductor layer, including the successive steps of: a) performing, in a first single-crystal layer made of a semiconductor alloy of at least a first element A1 and a second element A2, an ion implantation of a first element B which is a dopant for the alloy and of a second element C which is not a dopant for the alloy, to make an upper portion of the first layer amorphous and to preserve the crystal structure of a lower portion of the first layer; and b) performing a solid phase recrystallization anneal of the upper portion of the first layer, resulting in transforming the upper portion of the first layer into a doped single-crystal layer of the alloy.

Abstract: A light-emitting diode including: a first n-doped semiconductor layer configured to form a cathode, and a second p-doped semiconductor layer configured to form an anode, and together forming a p-n junction of the diode; an active zone located between the first layer and the second layer, including at least two emissive layers including a semiconductor capable of forming quantum wells, and a plurality of semiconductor barrier layers such that each emissive layer is located between two barrier layers; an n-doped semiconductor buffer layer located between the first layer and the active zone, the n-dope semiconductor of the buffer layer having a band gap energy less than or equal to about 97% of the band gap energy of the p-doped semiconductor of the second layer.

Abstract: An optoelectronic device including a support having a rear surface and a front surface opposite each other, a plurality of nucleation conductive strips forming first polarization electrodes, an intermediate insulating layer covering the nucleation conductive strips, a plurality of diodes, each of which having a first, three-dimensional doped region and a second doped region, and a plurality of top conductive strips forming second polarization electrodes and resting on the intermediate insulating layer, each top conductive strip being disposed in such a way as to be in contact with the second doped regions of a set of diodes of which the first doped regions are in contact with different nucleation conductive strips.

Abstract: An optoelectronic device including: a first, p-doped semiconductor layer and a second, n-doped semiconductor layer which are superposed and form a p-n junction; a first electrode electrically connected to the first semiconductor layer and forming an anode of the device; a gate positioned against at least one lateral flank of the first semiconductor layer; a second electrode, positioned against a lateral flank of the second semiconductor layer, electrically connected to the second semiconductor layer and electrically isolated from the first semiconductor layer; and in which a portion of the second electrode is positioned against the gate such that the second electrode is electrically connected to the gate and forms both a gate electrode and a cathode of the device.

Abstract: A method of manufacturing an optoelectronic device, including: a) transferring, onto a surface of a control circuit, a diode stack including first and second semiconductor layers of opposite conductivity types, so that the second layer is electrically connected to metal pads of the control circuit; b) forming in the active stack trenches delimiting a plurality of diodes connected to separate metal pads of the control circuit; c) depositing an insulating layer on the lateral walls of the trenches; d) partially removing the insulating layer to expose the sides of the portions of the first layer delimited by the trenches; and e) forming a metallization coating the lateral walls and the bottom of the trenches and contacting the sides of the portions of the first layer delimited by the trenches.

Abstract: A method of manufacturing an optoelectronic device, including the steps of: a) providing an active diode stack comprising a first doped semiconductor layer of a first conductivity type and a second doped semiconductor layer of the first conductivity type, coating the upper surface of the first layer; b) arranging a third semiconductor layer on the upper surface of the active stack; c) after step b), forming at least one MOS transistor inside and on top of the third semiconductor layer; and d) after step b), before or after step c), forming trenches vertically extending from the upper surface of the third layer and emerging into or onto the upper surface of the first layer and delimiting a plurality of pixels, each including a diode and an elementary diode control cell.