Patents by Inventor Huei Peng

Huei Peng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Structure and formation method of semiconductor device structure
    Patent number: 9834435
    Abstract: Structures and formation methods of a semiconductor device structure are provided. A semiconductor device structure includes a semiconductor substrate including a cavity and a movable feature in the cavity. The semiconductor device structure also includes a cap substrate bonded to the semiconductor substrate to seal the cavity. There is an interface between the cap substrate and the semiconductor substrate. The semiconductor device structure further includes a sealing feature embedded in the semiconductor substrate and surrounding the cavity. The sealing feature extends across the interface and penetrates through the cap substrate.
    Type: Grant
    Filed: November 29, 2016
    Date of Patent: December 5, 2017
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ping-Yin Liu, Xin-Hua Huang, Yeong-Jyh Lin, Jung-Huei Peng
  • Semiconductor MEMS structure and manufacturing method thereof
    Patent number: 9828234
    Abstract: The present disclosure provides a method of manufacturing a structure. The method comprises: providing a first substrate; forming a plurality of conductive pads over the first substrate; forming a film on a first subset of the plurality of conductive pads, thereby leaving a second subset of the plurality of conductive pads exposed from the film; forming a self-assembled monolayer (SAM) over the film; and forming a cavity by the first substrate and a second substrate through bonding a portion of the second substrate to the second subset of the plurality of conductive pads that are exposed from the film.
    Type: Grant
    Filed: April 29, 2016
    Date of Patent: November 28, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company Ltd.
    Inventors: Yuan-Chih Hsieh, Hsing-Lien Lin, Jung-Huei Peng, Yi-Chien Wu
  • MEMS and CMOS integration with low-temperature bonding
    Patent number: 9822000
    Abstract: The present disclosure relates an integrated chip having one or more MEMS devices. In some embodiments, the integrated chip has a carrier substrate with one or more cavities disposed within a first side of the carrier substrate. A dielectric layer is disposed between the first side of the carrier substrate and a first side of a micro-electromechanical system (MEMS) substrate. The dielectric layer has sidewalls that are laterally set back from sidewalls of openings extending through the MEMs substrate to the one or more cavities. A bonding structure, including an intermetallic compound having a plurality of metallic elements, abuts a second side of the MEMS substrate and is electrically connected to a metal interconnect layer within a dielectric structure disposed over a CMOS substrate.
    Type: Grant
    Filed: June 1, 2016
    Date of Patent: November 21, 2017
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chun-Wen Cheng, Chia-Hua Chu, Jung-Huei Peng
  • Method to Produce Chemical Pattern In Micro-Fluidic Structure
    Publication number: 20170326548
    Abstract: The present disclosure provides flow cells and methods of fabricating flow cells. The method includes combining three portions: a first substrate, a second substrate, and microfluidic channels between the first substrate and the second substrate having walls of a photoresist dry film. Through-holes for inlet and outlet are formed in the first substrate or the second substrate. Patterned capture sites are stamped on the first substrate and the second substrate by a nanoimprint lithography process. In other embodiments, parts of the patterned capture sites are selectively attached to a surface chemistry pattern formed of silicon oxide islands each disposed on an outcrop of a soft bottom layer.
    Type: Application
    Filed: May 23, 2017
    Publication date: November 16, 2017
    Inventors: Shang-Ying Tsai, Li-Min Hung, Jung-Huei Peng
  • SEMICONDUCTOR MEMS STRUCTURE AND MANUFACTURING METHOD THEREOF
    Publication number: 20170313574
    Abstract: The present disclosure provides a method of manufacturing a structure. The method comprises: providing a first substrate; forming a plurality of conductive pads over the first substrate; forming a film on a first subset of the plurality of conductive pads, thereby leaving a second subset of the plurality of conductive pads exposed from the film; forming a self-assembled monolayer (SAM) over the film; and forming a cavity by the first substrate and a second substrate through bonding a portion of the second substrate to the second subset of the plurality of conductive pads that are exposed from the film.
    Type: Application
    Filed: April 29, 2016
    Publication date: November 2, 2017
    Inventors: YUAN-CHIH HSIEH, HSING-LIEN LIN, JUNG-HUEI PENG, YI-CHIEN WU
  • GETTER ELECTRODE TO IMPROVE VACUUM LEVEL IN A MICROELECTROMECHANICAL SYSTEMS (MEMS) DEVICE
    Publication number: 20170297904
    Abstract: A microelectromechanical systems (MEMS) package with high gettering efficiency is provided. A MEMS device is arranged over a logic chip, within a cavity that is hermetically sealed. A sensing electrode is arranged within the cavity, between the MEMS device and the logic chip. The sensing electrode is electrically coupled to the logic chip and is a conductive getter material configured to remove gas molecules from the cavity. A method for manufacturing the MEMS package is also provided.
    Type: Application
    Filed: July 8, 2016
    Publication date: October 19, 2017
    Inventors: Shiang-Chi Lin, Jung-Huei Peng, Yu-Chia Liu, Yi-Chien Wu
  • MULTI-PRESSURE MEMS PACKAGE
    Publication number: 20170283250
    Abstract: The present disclosure relates to a microelectromechanical systems (MEMS) package having two MEMS devices with different pressures, and an associated method of formation. In some embodiments, the (MEMS) package includes a device substrate and a cap substrate bonded together. The device substrate includes a first trench and a second trench. A first MEMS device is disposed over the first trench and a second MEMS device is disposed over the second trench. A first stopper is raised from a first trench bottom surface of the first trench but below a top surface of the device substrate and a second stopper is raised from a second trench bottom surface of the second trench but below the top surface of the device substrate. A first depth of the first trench is greater than a second depth of the second trench.
    Type: Application
    Filed: June 19, 2017
    Publication date: October 5, 2017
    Inventors: Yu-Chia Liu, Chia-Hua Chu, Chun-Wen Cheng, Kuei-Sung Chang, Jung-Huei Peng
  • Multi-pressure MEMS package
    Patent number: 9695039
    Abstract: The present disclosure relates to a microelectromechanical systems (MEMS) package having two MEMS devices with different pressures, and an associated method of formation. In some embodiments, the (MEMS) package includes a device substrate and a cap substrate bonded together. The device substrate includes a first trench and a second trench. A first MEMS device is disposed over the first trench and a second MEMS device is disposed over the second trench. A first stopper is raised from a first trench bottom surface of the first trench but below a top surface of the device substrate and a second stopper is raised from a second trench bottom surface of the second trench but below the top surface of the device substrate. A first depth of the first trench is greater than a second depth of the second trench.
    Type: Grant
    Filed: May 2, 2016
    Date of Patent: July 4, 2017
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yu-Chia Liu, Chia-Hua Chu, Chun-Wen Cheng, Kuei-Sung Chang, Jung-Huei Peng
  • CMOS-MEMS STRUCTURE AND METHOD OF FORMING THE SAME
    Publication number: 20170183222
    Abstract: The present disclosure provides a CMOS structure, including a substrate, a metallization layer over the substrate, a sensing structure over the metallization layer, and a signal transmitting structure adjacent to the sensing structure. The sensing structure includes an outgassing layer over the metallization layer, a patterned outgassing barrier over the outgassing layer; and an electrode over the patterned outgassing barrier. The signal transmitting structure electrically couples the electrode and the metallization layer.
    Type: Application
    Filed: March 13, 2017
    Publication date: June 29, 2017
    Inventors: JUNG-HUEI PENG, CHIA-HUA CHU, FEI-LUNG LAI, SHIANG-CHI LIN
  • Methods of forming a gyroscope sensor and a structure for a gyroscope sensors
    Patent number: 9677884
    Abstract: A method of forming a structure for a gyroscope sensor includes forming a first dielectric over a substrate and a material layer over the first dielectric layer. A first portion of the material layer is removed to form a recess and a second portion of the material layer is removed to define a first channel between a gyro disk and a frame. A second channel is formed in the substrate corresponding to the first channel, and a portion of the first dielectric is removed to form a second dielectric between the gyro disk and the substrate.
    Type: Grant
    Filed: June 10, 2014
    Date of Patent: June 13, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ting-Hau Wu, Chun-Ren Cheng, Jiou-Kang Lee, Jung-Huei Peng, Shang-Ying Tsai
  • Method and apparatus for a wafer seal ring
    Patent number: 9673169
    Abstract: A wafer seal ring may be formed on a wafer having a pattern structure with a pattern density. The wafer seal ring pattern structure may include a plurality of lines having a width and a spacing that may be approximately equal to a width and a spacing of die bond rings on the wafer. The wafer having the wafer seal ring formed thereon may be bonded to a wafer that may not have a wafer seal ring. A pair of wafers may be formed with respective wafer seal rings formed in a corresponding manner. The pair of wafers may be bonded together with the wafer seal rings aligned and bonded together to form a seal ring structure between the bonded wafers.
    Type: Grant
    Filed: February 5, 2013
    Date of Patent: June 6, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Chuan Teng, Jung-Huei Peng, Shang-Ying Tsai, Hsin-Ting Huang, Li-Min Hung, Yao-Te Huang, Chin-Yi Cho
  • Method to produce chemical pattern in micro-fluidic structure
    Patent number: 9656260
    Abstract: The present disclosure provides flow cells and methods of fabricating flow cells. The method includes combining three portions: a first substrate, a second substrate, and microfluidic channels between the first substrate and the second substrate having walls of a photoresist dry film. Through-holes for inlet and outlet are formed in the first substrate or the second substrate. Patterned capture sites are stamped on the first substrate and the second substrate by a nanoimprint lithography process. In other embodiments, parts of the patterned capture sites are selectively attached to a surface chemistry pattern formed of silicon oxide islands each disposed on an outcrop of a soft bottom layer.
    Type: Grant
    Filed: May 27, 2016
    Date of Patent: May 23, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shang-Ying Tsai, Li-Min Hung, Jung-Huei Peng
  • Semiconductor device and package and manufacturing method thereof
    Patent number: 9643838
    Abstract: A semiconductor device includes a substrate, an interconnection layer, an outgassing layer, and a patterned outgassing barrier layer. The interconnection layer is over the substrate. The outgassing layer is over the interconnection layer. The patterned outgassing barrier layer is over the outgassing layer. The patterned outgassing barrier layer includes a plurality of barrier structures and a plurality of openings. The plurality of openings expose a portion of an upmost surface of the outgassing layer, and a bottommost surface of the patterned outgassing barrier layer is substantially coplanar with the upmost surface of the outgassing layer.
    Type: Grant
    Filed: February 5, 2016
    Date of Patent: May 9, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD
    Inventors: Chia-Hua Chu, Jung-Huei Peng, Yi-Chien Wu, Li-Min Hung
  • Semiconductor sensing structure
    Patent number: 9630831
    Abstract: The present disclosure provides a CMOS structure, including a substrate, a metallization layer over the substrate, a sensing structure over the metallization layer, and a signal transmitting structure adjacent to the sensing structure. The sensing structure includes an outgassing layer over the metallization layer, a patterned outgassing barrier over the outgassing layer; and an electrode over the patterned outgassing barrier. The signal transmitting structure electrically couples the electrode and the metallization layer.
    Type: Grant
    Filed: October 15, 2015
    Date of Patent: April 25, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Jung-Huei Peng, Chia-Hua Chu, Fei-Lung Lai, Shiang-Chi Lin
  • SEMICONDUCTOR SENSING STRUCTURE
    Publication number: 20170107099
    Abstract: The present disclosure provides a CMOS structure, including a substrate, a metallization layer over the substrate, a sensing structure over the metallization layer, and a signal transmitting structure adjacent to the sensing structure. The sensing structure includes an outgassing layer over the metallization layer, a patterned outgassing barrier over the outgassing layer; and an electrode over the patterned outgassing barrier. The signal transmitting structure electrically couples the electrode and the metallization layer.
    Type: Application
    Filed: October 15, 2015
    Publication date: April 20, 2017
    Inventors: JUNG-HUEI PENG, CHIA-HUA CHU, FEI-LUNG LAI, SHIANG-CHI LIN
  • Semiconductor device
    Patent number: 9617143
    Abstract: A method of forming a semiconductor device comprises bonding a capping wafer and a base wafer to form a wafer package. The base wafer comprises a plurality of chip package portions. The capping wafer comprises a plurality of isolation trenches. Each isolation trench of the plurality of isolation trenches is configured to substantially align with a corresponding chip package portion of the plurality of chip package portions. The method also comprises separating the wafer package into a plurality of chip packages. Each chip package of the plurality of chip packages comprises at least one chip package portion of the plurality of chip package portions.
    Type: Grant
    Filed: December 30, 2014
    Date of Patent: April 11, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chun-wen Cheng, Jung-Huei Peng, Shang-Ying Tsai, Hung-Chia Tsai, Yi-Chuan Teng
  • Self-removal anti-stiction coating for bonding process
    Patent number: 9611141
    Abstract: The present disclosure provides a device having a doped active region disposed in a substrate. The doped active region having an elongate shape and extends in a first direction. The device also includes a plurality of first metal gates disposed over the active region such that the first metal gates each extend in a second direction different from the first direction. The plurality of first metal gates includes an outer-most first metal gate having a greater dimension measured in the second direction than the rest of the first metal gates. The device further includes a plurality of second metal gates disposed over the substrate but not over the doped active region. The second metal gates contain different materials than the first metal gates. The second metal gates each extend in the second direction and form a plurality of respective N/P boundaries with the first metal gates.
    Type: Grant
    Filed: December 9, 2014
    Date of Patent: April 4, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ping-Yin Liu, Li-Cheng Chu, Hung-Hua Lin, Shang-Ying Tsai, Yuan-Chih Hsieh, Jung-Huei Peng, Lan-Lin Chao, Chia-Shiung Tsai, Chun-Wen Cheng
  • Fluid Deposition Apparatus and Method
    Publication number: 20170065958
    Abstract: The present disclosure relates to a method of depositing a fluid onto a substrate. In some embodiments, the method may be performed by mounting a substrate to a micro-fluidic probe card, so that the substrate abuts a cavity within the micro-fluidic probe card that is in communication with a fluid inlet and a fluid outlet. A first fluidic chemical is selectively introduced into the cavity via the fluid inlet of the micro-fluidic probe card.
    Type: Application
    Filed: November 18, 2016
    Publication date: March 9, 2017
    Inventors: Chun-Wen Cheng, Jung-Huei Peng, Yi-Shao Liu, Fei-Lung Lai, Shang-Ying Tsai
  • MEMS AND CMOS INTEGRATION WITH LOW-TEMPERATURE BONDING
    Publication number: 20170057814
    Abstract: The present disclosure relates an integrated chip having one or more MEMS devices. In some embodiments, the integrated chip has a carrier substrate with one or more cavities disposed within a first side of the carrier substrate. A dielectric layer is disposed between the first side of the carrier substrate and a first side of a micro-electromechanical system (MEMS) substrate. The dielectric layer has sidewalls that are laterally set back from sidewalls of openings extending through the MEMs substrate to the one or more cavities. A bonding structure, including an intermetallic compound having a plurality of metallic elements, abuts a second side of the MEMS substrate and is electrically connected to a metal interconnect layer within a dielectric structure disposed over a CMOS substrate.
    Type: Application
    Filed: June 1, 2016
    Publication date: March 2, 2017
    Inventors: Chun-Wen Cheng, Chia-Hua Chu, Jung-Huei Peng
  • MICRO-ELECTRO-MECHANICAL SYSTEM AND MANUFACTURING METHOD THEREOF
    Publication number: 20170044004
    Abstract: Some embodiments of the present disclosure provide a microelectromechanical systems (MEMS). The MEMS includes a semiconductive block. The semiconductive block includes a protruding structure. The protruding structure includes a bottom surface. The semiconductive block includes a sensing structure. A semiconductive substrate includes a conductive region. The conductive region includes a first surface under the sensing structure. The first surface is substantially coplanar with the bottom surface. A dielectric region includes a second surface not disposed over the first surface.
    Type: Application
    Filed: August 14, 2015
    Publication date: February 16, 2017
    Inventors: CHUN-WEN CHENG, JUNG-HUEI PENG, CHIA-HUA CHU, NIEN-TSUNG TSAI, YAO-TE HUANG, LI-MIN HUNG, YU-CHIA LIU