Abstract: A wound-size measuring method for use in a portable electronic device is provided. The method includes the following steps: obtaining an input image via a camera device of the portable electronic device; using a CNN (convolutional neural network) model to recognize the input image, and selecting a part of the input image with the highest probability of containing a wound as an output wound image; and calculating an actual height and an actual width of the output wound image according to a lens-focal-length parameter reported by an operating system running on the portable electronic device, a plurality of reference calibration parameters corresponding to a pitch angle of the portable electronic device, and a pixel-height ratio and a pixel-width ratio of the output wound image.

Abstract: An infrared sensor uses an infrared lens with infrared filtering and focusing functions. Thus, an infrared filter can be omitted to reduce the costs and volume. In addition, a getter on the inside of a metal cover of the infrared sensor can be activated when the metal cover is soldered to the substrate of the infrared sensor. Therefore, the packaging process of the infrared sensor can be simplified.

Abstract: Embodiments of the present application provide a footwear strap and a footwear having the same. Among others, the footwear strap comprises a strap element and a rigid heel structural element; wherein the rigid heel structural element is disposed inside the strap element, and the rigid heel structural element comprises an upper rear portion; when the footwear strap is assembled to a footwear, the upper rear portion extends in a direction from the position where the footwear contacts the heel toward the position where the footwear contacts the toe, and inclines downward of the footwear; the upper rear portion has a convex curvature which is adapted to the shape of the heel so as to facilitate easily receiving the heel; when the footwear strap is assembled to the footwear, an inner lower portion of the convex curvature faces an opening of the footwear.

Abstract: The present disclosure provides a display control method of a spliced screen including a plurality of sub-display screens, including: sending a display control signal to each sub-display screen in a wireless sending manner according to a time code signal; receiving, by each sub-display screen, the display control signal in a wired receiving manner, and reporting status information of each sub-display screen to the display controller; and controlling, by the display controller, displaying of each sub-display screen according to the status information of each sub-display screen, where the time code signal indicates a current time point; the display control signal is configured for controlling the sub-display screen to perform corresponding display processing on display content stored, so that the sub-display screens display a target display content together. The present disclosure further provides a display control device, a display system, an electronic device, and a computer readable storage medium.

Abstract: The present application relates to a battery cell and a manufacturing method and device thereof, a battery, and a power consumption apparatus, belonging to the field of battery manufacturing technologies. The battery cell includes: a shell with a first wall; an electrode assembly; and a first current collecting member, where the first wall has a first surface facing the first current collecting member, the first current collecting member has a second surface facing the first wall, one of the first surface and the second surface is provided with a protrusion and the other abuts against the protrusion to form a gap between the first wall and the first current collecting member; and the first current collecting member is provided with a first hole and a second hole, and the first hole is configured to be in communication with the second hole through the gap.

Abstract: An active single-ended transmission cable is disclosed. The active single-ended transmission cable allows connection between a first and a second electronic device and comprises a first port, a second port, and a transmission wire. The first or second port is used for receiving or transmitting a differential signal between the first and the second electronic devices, and for converting between a differential signal and a single-ended signal. The transmission wire is used for transmitting the single-ended signal. This allows the conversion between the received or transmitted differential signal at the first and second ports into the single-ended signal so as to allow the transmission of the single-ended signal within the transmission wire.

Abstract: The present invention generally relates to a hydroponic culture medium and a hydroponic planting system, more particularly to a Houttuynia cordata hydroponic culture medium, a Houttuynia cordata hydroponic planting system, Houttuynia cordata extracts, a method, and applications thereof. The Houttuynia cordata hydroponic culture medium includes a plant fertilizer and a Houttuynia cordata growth-promoting additive. The Houttuynia cordata growth-promoting additive is selected from the group consisting of: vitamin B complex, seaweed essence, amino acid, microorganism, and a combination thereof. An electronic conductivity of the Houttuynia cordata hydroponic culture medium is between 0.4 ms/cm and 2.0 ms/cm.

Abstract: Embodiments receive a plurality of incoming requests, determine that the plurality of incoming requests comprise a plurality of instant requests, create a software image based on the instant requests, and pull the software image based on a deployed configuration.

Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a first metal layer over a substrate, forming a dielectric layer over the first metal layer. The method includes forming a trench in the dielectric layer, and performing a surface treatment process on a sidewall surface of the trench to form a hydrophobic layer. The hydrophobic layer is formed on a sidewall surface of the dielectric layer. The method further includes depositing a metal material in the trench and over the hydrophobic layer to form a via structure.

Abstract: Provided are a battery cell, a method for manufacturing a battery cell, a battery, and an electric device. The battery cell includes: a housing provided with a first electrode lead-out portion and a second electrode lead-out portion that have opposite polarities; an electrode assembly arranged in the housing, the electrode assembly including an electrode body, and a first tab and a second tab that extend from one side of the electrode body; and a current collector assembly arranged at a side of the electrode body close to the first tab and the second tab. The current collector assembly includes a first current collector and a second current collector. The first tab and the first electrode lead-out portion are electrically connected to each other by the first current collector, and the second tab and the second electrode lead-out portion are electrically connected to each other by the second current collector.

Abstract: A layout method and a semiconductor device are disclosed. The layout method includes: generating a design layout by placing a cell, wherein the cell includes: a first conductive segment overlapping a source/drain region and disposed immediately adjacent to a first power rail, wherein the first conductive segment has a length substantially equal to a cell length; a second conductive segment; and a third conductive segment between the first and second conductive segments. The layout method further includes: providing a fourth conductive segment and a fifth conductive segment to the design layout, wherein the fourth and fifth conductive segments are aligned in a first direction.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate. The semiconductor device structure includes a gate stack over the substrate. The semiconductor device structure includes a cap layer over the gate stack. The semiconductor device structure includes a protective layer over the cap layer, wherein a lower portion of the protective layer extends into the cap layer. The semiconductor device structure includes a contact structure passing through the protective layer and the cap layer.

Abstract: In a method of manufacturing a semiconductor device, first and second gate structures are formed. The first (second) gate structure includes a first (second) gate electrode layer and first (second) sidewall spacers disposed on both side faces of the first (second) gate electrode layer. The first and second gate electrode layers are recessed and the first and second sidewall spacers are recessed, thereby forming a first space and a second space over the recessed first and second gate electrode layers and first and second sidewall spacers, respectively. First and second protective layers are formed in the first and second spaces, respectively. First and second etch-stop layers are formed on the first and second protective layers, respectively. A first depth of the first space above the first sidewall spacers is different from a second depth of the first space above the first gate electrode layer.

Abstract: Provided are semiconductor dies and methods for manufacturing semiconductor devices on a die. A method for manufacturing semiconductor devices on a die includes forming semiconductor devices with a gate length of 3 nanometers (nm) and having metal gates, wherein over 99% of the semiconductor devices with the gate length of 3 nanometers (nm) have a gate height of from 10 to 14 nanometers (nm).

Abstract: Embodiments of the present application provide a footwear strap and a footwear having the same. Among others, the footwear strap comprises a strap element and a rigid heel structural element; wherein the rigid heel structural element is disposed inside the strap element, and the rigid heel structural element comprises an upper rear portion; when the footwear strap is assembled to a footwear, the upper rear portion extends in a direction from the position where the footwear contacts the heel toward the position where the footwear contacts the toe, and inclines downward of the footwear; the upper rear portion has a convex curvature which is adapted to the shape of the heel so as to facilitate easily receiving the heel; when the footwear strap is assembled to the footwear, an inner lower portion of the convex curvature faces an opening of the footwear.

Abstract: Semiconductor devices, integrated circuits and methods of forming the same are provided. In one embodiment, a method includes depositing a first dielectric layer over a metal pad disposed over a workpiece, forming a first opening in the first dielectric layer to expose a portion of the metal pad, after the forming of the first opening, forming a second dielectric layer over the exposed portion of the metal pad, depositing a first polymeric material over the second dielectric layer, forming a second opening through the first polymeric material and the second dielectric layer to expose the metal pad, and forming a bump feature over the exposed metal pad.

Abstract: Provided is a chemical-mechanical polishing apparatus, a retaining ring for a chemical-mechanical polishing apparatus, and a chemical-mechanical polishing method. A chemical-mechanical polishing apparatus includes a polishing pad; a polishing head configured to receive a wafer and to hold the wafer against the polishing pad; and a retaining ring configured to engage with the polishing head, wherein the retaining ring is formed with channels configured for flowing a slurry in a flow direction from outside the retaining ring to inside the retaining ring, wherein the channels have a cross-sectional flow area that decreases in the flow direction.

Abstract: A transistor includes a gate structure that has a first gate dielectric layer and a second gate dielectric layer. The first gate dielectric layer is disposed over the substrate. The first gate dielectric layer contains a first type of dielectric material that has a first dielectric constant. The second gate dielectric layer is disposed over the first gate dielectric layer. The second gate dielectric layer contains a second type of dielectric material that has a second dielectric constant. The second dielectric constant is greater than the first dielectric constant. The first dielectric constant and the second dielectric constant are each greater than a dielectric constant of silicon oxide.

Abstract: A device includes a semiconductor substrate, a fin structure on the semiconductor substrate, a gate structure on the fin structure, and a pair of source/drain features on both sides of the gate structure. The gate structure includes an interfacial layer on the fin structure, a gate dielectric layer on the interfacial layer, and a gate electrode layer of a conductive material on and directly contacting the gate dielectric layer. The gate dielectric layer includes nitrogen element.