Abstract: In an embodiment, a method includes: stacking a plurality of first dies to form a device stack; revealing testing pads of a topmost die of the device stack; testing the device stack using the testing pads of the topmost die; and after testing the device stack, forming bonding pads in the topmost die, the bonding pads being different from the testing pads.

Abstract: A complementary metal-oxide-semiconductor (CMOS) semiconductor device includes a substrate. The CMOS semiconductor device further includes an isolation region in the substrate. The CMOS semiconductor device further includes a P-metal gate electrode extending over the isolation region, wherein the P-metal gate electrode includes a first function metal and a TiN layer doped with a first material. The CMOS semiconductor device further includes an N-metal gate electrode extending over the isolation region, wherein the N-metal gate electrode includes a second function metal and a TiN layer doped with a second material different from the first material, a portion of the P-metal gate electrode is between a portion of the N-metal gate electrode and the substrate, and a portion of the TiN layer doped with the second material is between the portion of the P-metal gate electrode and the substrate.

Abstract: A circuit that includes: a photodiode configured to absorb photons and to generate photo-carriers from the absorbed photons; a first MOSFET transistor that includes: a first channel terminal coupled to a first terminal of the photodiode and configured to collect a portion of the photo-carriers generated by the photodiode; a second channel terminal; and a gate terminal coupled to a first control voltage source; a first readout circuit configured to output a first readout voltage; a second readout circuit configured to output a second readout voltage; and a current-steering circuit configured to steer the photo-carriers generated by the photodiode to one or both of the first readout circuit and the second readout circuit.

Abstract: Examples described herein provide for an electronic device apparatus with multiple thermally conductive paths for heat dissipation. In an example, an electronic device apparatus includes a package comprising a die attached to a package substrate. The electronic device apparatus further includes a ring stiffener disposed around the die and on the package substrate, a heat sink disposed on the package, and a wedge disposed between the heat sink and the ring stiffener.

Abstract: A method for fabricating an optical sensor includes: forming, over a substrate, a first material layer comprising a first alloy of germanium and silicon having a first germanium composition; forming, over the first material layer, a graded material layer comprising germanium and silicon; and forming, over the graded material layer, a second material layer comprising a second alloy of germanium and silicon having a second germanium composition. The first germanium composition is lower than the second germanium composition and a germanium composition of the graded material layer is between the first germanium composition and the second germanium composition and varies along a direction perpendicular to the substrate.

Abstract: Structures and techniques introduced here enable the design and fabrication of photodetectors (PDs) and/or other electronic circuits using typical semiconductor device manufacturing technologies meanwhile reducing the adverse impacts on PDs' performance. Examples of the various structures and techniques introduced here include, but not limited to, a pre-PD homogeneous wafer bonding technique, a pre-PD heterogeneous wafer bonding technique, a post-PD wafer bonding technique, their combinations, and a number of mirror equipped PD structures. With the introduced structures and techniques, it is possible to implement PDs using typical direct growth material epitaxy technology while reducing the adverse impact of the defect layer at the material interface caused by lattice mismatch.

Abstract: A CMOS semiconductor device includes a substrate comprising an isolation region separating a P-active region and an N-active region. The CMOS semiconductor device further includes a P-metal gate electrode over the P-active region and extending over the isolation region, wherein the P-metal gate electrode includes a P-work function metal and a doped TiN layer between the P-work function metal and substrate. The CMOS semiconductor device further includes an N-metal gate electrode over the N-active region and extending over the isolation region, wherein the N-metal gate electrode includes an N-work function metal and a nitrogen-rich TiN layer between the N-work function metal and substrate, wherein a portion of the P-metal gate electrode is between a portion of the N-metal gate electrode and the substrate.

Abstract: Structures and techniques introduced here enable the design and fabrication of photodetectors (PDs) and/or other electronic circuits using typical semiconductor device manufacturing technologies meanwhile reducing the adverse impacts on PDs' performance. Examples of the various structures and techniques introduced here include, but not limited to, a pre-PD homogeneous wafer bonding technique, a pre-PD heterogeneous wafer bonding technique, a post-PD wafer bonding technique, their combinations, and a number of mirror equipped PD structures. With the introduced structures and techniques, it is possible to implement PDs using typical direct growth material epitaxy technology while reducing the adverse impact of the defect layer at the material interface caused by lattice mismatch.

Abstract: In an embodiment, a method includes: stacking a plurality of first dies to form a device stack; revealing testing pads of a topmost die of the device stack; testing the device stack using the testing pads of the topmost die; and after testing the device stack, forming bonding pads in the topmost die, the bonding pads being different from the testing pads.

Abstract: A baculovirus displaying a porcine epidemic diarrhea virus S protein or S1 domain thereof is provided for preventing porcine epidemic diarrhea virus infection.

Abstract: A display device includes a backlight module, and the backlight module includes a light-guiding plate, a light-emitting assembly, and an adhesive member. The light-emitting assembly is disposed corresponding to the light-guiding plate and includes a substrate and a plurality of light-emitting elements. The substrate includes a first surface, and the first surface includes a component arrangement region and a planar region. A first gap is formed between the planar region and the component arrangement region, and the planar region and the component arrangement region are electrically isolated from each other. The light-emitting elements are disposed on the component arrangement region. The adhesive member connects the light-guiding plate and the planar region. An assembling method of the display device is also provided. This disclosure can improve the non-uniform brightness issue (hotspots) or enhance the optical performance.

Abstract: A circuit, including: a photodetector including a first readout terminal and a second readout terminal different than the first readout terminal; a first readout circuit coupled with the first readout terminal and configured to output a first readout voltage; a second readout circuit coupled with the second readout terminal and configured to output a second readout voltage; and a common-mode analog-to-digital converter (ADC) including: a first input terminal coupled with a first voltage source; a second input terminal coupled with a common-mode generator, the common-mode generator configured to receive the first readout voltage and the second readout voltage, and to generate a common-mode voltage between the first and second readout voltages; and a first output terminal configured to output a first output signal corresponding to a magnitude of a current generated by the photodetector.

Abstract: A method forming a gate dielectric over a substrate, and forming a metal gate structure over the semiconductor substrate and the gate dielectric. The metal gate structure includes a first metal material. The method further includes forming a seal on sidewalls of the metal gate structure. The method further includes forming a dielectric film on the metal gate structure, the dielectric film including a first metal oxynitride comprising the first metal material and directly on the metal gate structure without extending over the seal formed on sidewalls of the metal gate structure.

Abstract: A circuit, including: a photodetector including a first readout terminal and a second readout terminal different than the first readout terminal; a first readout circuit coupled with the first readout terminal and configured to output a first readout voltage; a second readout circuit coupled with the second readout terminal and configured to output a second readout voltage; and a common-mode analog-to-digital converter (ADC) including: a first input terminal coupled with a first voltage source; a second input terminal coupled with a common-mode generator, the common-mode generator configured to receive the first readout voltage and the second readout voltage, and to generate a common-mode voltage between the first and second readout voltages; and a first output terminal configured to output a first output signal corresponding to a magnitude of a current generated by the photodetector.

Abstract: A method including rotating a plate of a pad conditioner about an axis parallel to an axis of rotation of a planarization pad of a planarization device. The method further includes dispensing a fluid material onto an upper surface of the planarization pad through a nozzle opening of the pad conditioner during a planarization process, wherein the fluid material comprises an acid. The method further includes maintaining the pad conditioner at a position spaced from the upper surface of the planarization pad during the dispensing of the fluid material and the rotating of the plate.

Abstract: A management method and apparatus for supporting multiple SIM cards to share an RF processor. The method includes: after receiving a resource request sent by a first baseband communications processor, determining whether the RF processor is authorized be used by a second baseband communications processor in at least a part of a time period required for using the RF processor by the first baseband communications processor; if yes, comparing whether a priority of a type of a first communications service that needs to be performed by the first baseband communications processor is higher than a priority of a type of a second communications service performed by the second baseband communications processor; and if yes, sending an authorization message to the first baseband communications processor and instructing the second baseband communications processor to stop performing the second communications service.

Abstract: An integrated circuit includes a semiconductor substrate, a gate dielectric over the substrate, and a metal gate structure over the semiconductor substrate and the gate dielectric. The metal gate structure includes a first metal material. The integrated circuit further includes a seal formed on sidewalls of the metal gate structure. The integrated circuit further includes a dielectric film on the metal gate structure, the dielectric film including a first metal oxynitride comprising the first metal material and directly on the metal gate structure without extending over the seal formed on sidewalls of the metal gate structure.

Abstract: A light emitting device driver circuit includes: a power conversion circuit, an error amplifier circuit, a sample-and-hold circuit, a load current generation circuit and a feed-forward capacitor. When the light emitting device driver circuit is in a disable phase, the sample-and-hold circuit connects a feedback signal with a second reference voltage and the sample-and-hold circuit disconnects the feedback signal from a load node, whereby the feed-forward capacitor samples a sample voltage and holds it after the disable phase transits to an enable phase. In the enable phase, the sample-and-hold circuit disconnects the feedback signal from the second reference voltage and the sample-and-hold circuit connects the feedback signal with the load node, so that during a predetermined period following the transition, there is a sufficient difference between two input terminals of the error amplifier circuit so that the load current is raised to a desired current level within the predetermined period.

Abstract: A light emitting device driver circuit includes: a power conversion circuit, an error amplifier circuit, a sample-and-hold circuit, a load current generation circuit and a feed-forward capacitor. When the light emitting device driver circuit is in a disable phase, the sample-and-hold circuit connects a feedback signal with a second reference voltage and the sample-and-hold circuit disconnects the feedback signal from a load node, whereby the feed-forward capacitor samples a sample voltage and holds it after the disable phase transits to an enable phase. In the enable phase, the sample-and-hold circuit disconnects the feedback signal from the second reference voltage and the sample-and-hold circuit connects the feedback signal with the load node, so that during a predetermined period following the transition, there is a sufficient difference between two input terminals of the error amplifier circuit so that the load current is raised to a desired current level within the predetermined period.

Abstract: A thermally conductive resin is provided. The thermally conductive resin has the formula In the formula, X1 is X2 is m is an integer ranging from 0 to 95, n is an integer ranging from 1 to 50, and o is an integer ranging from 1 to 80. A thermal interface material including the thermally conductive resin is also provided.