Abstract: The present disclosure discloses a fixed quick-release apparatus. It includes: a gear turntable, configured to connect a cycling bracket, where a limiting gear ring is disposed on a top circle of the gear turntable; a housing, configured to mount the gear turntable; and a gear stand, mounted inside the housing, where a positioning gear ring that is opposite to the limiting gear ring is disposed on a bottom circle of the gear stand, an anti-rotation plate is disposed at a top of the gear stand, and a limiting spring, disposed at a bottom of the gear stand. Because the gear stand is driven to move by pressing the button, the positioning gear ring is engaged with the limiting gear ring, to limit rotation of the locking turntable and the unlocking of the anti-rotation plate on the terminal device. Because the spring steel beads abut against the arc-shaped groove, the terminal device can be adjusted and positioned by rotating 360°.

Abstract: A pressure measurement device is configured to adjust a gas pressure in an external gas cavity that is fluidly coupled thereto and measure the adjusted gas pressure in the external gas cavity. The pressure measurement device includes a port, a pressure control module, a port pressure sensor, and a gas discharging port. The pressure measurement device is fluidly coupled to the external gas cavity through the port. The pressure control module is coupled to the port through a gas passage and configured to operably provide pressurized gas to the external gas cavity or draw gas from the external gas cavity. The port pressure sensor is coupled to the port and configured to measure a gas pressure at the port. The gas discharging port is coupled to the port and the pressure control module, and configured to operably discharge gas from the port or the pressure control module to an external environment.

Abstract: The present disclosure discloses a preparation system of hydrosol solution, which includes a mixing and shearing device, a controller, and a plurality of feeding stations. The plurality of feeding stations are configured to store materials with different material properties, and all of the plurality of feeding stations are connected with the mixing and shearing device and transport the materials with different material properties to the mixing and shearing device. The controller is electrically connected with the plurality of feeding stations and controls material transportation speeds of the plurality of feeding stations. The controller is electrically connected with the mixing and shearing device and controls the operation of the mixing and shearing device, and the mixing and shearing device is configured to simultaneously mix and shear the materials with different material properties to obtain the hydrosol solution.

Abstract: The present disclosure discloses a fixed quick-release apparatus. It includes: a gear turntable, configured to connect a cycling bracket, where a limiting gear ring is disposed on a top circle of the gear turntable; a housing, configured to mount the gear turntable; and a gear stand, mounted inside the housing, where a positioning gear ring that is opposite to the limiting gear ring is disposed on a bottom circle of the gear stand, an anti-rotation plate is disposed at a top of the gear stand, and a limiting spring, disposed at a bottom of the gear stand. Because the gear stand is driven to move by pressing the button, the positioning gear ring is engaged with the limiting gear ring, to limit rotation of the locking turntable and the unlocking of the anti-rotation plate on the terminal device. Because the spring steel beads abut against the arc-shaped groove, the terminal device can be adjusted and positioned by rotating 360°.

Abstract: The present disclosure provides a positive electrode of lithium-ion battery, an all-solid-state lithium-ion battery and a preparation method thereof, and an electrical device. The all-solid-state lithium-ion battery of the present disclosure includes a positive electrode, a solid electrolyte, and a negative electrode; wherein the positive electrode includes a positive electrode current collector and a positive electrode material layer provided on a surface of the positive electrode current collector, a positive electrode active material in the positive electrode material layer is a manganese oxygen compound; and the negative electrode includes a negative electrode current collector and a negative electrode material layer provided on a surface of the negative electrode current collector, a negative electrode active material in the negative electrode material layer is a titanium oxygen compound.

Abstract: The present invention relates to a scalable process for the making of elagolix, its salts and the process of intermediate compounds.

Abstract: The present invention teaches a pixel unit including thin film transistors (TFTs) and pixel electrodes corresponding to the TFTs. The pixel electrodes are connected to the source electrodes of the TFTs. Each pixel electrode includes multiple arc-shaped electrode units arranged at intervals along an axial direction around a periphery of a corresponding TFT. The electrode units are electrically connected together. The present invention adopts arc-shaped pixels (similar to concentric circles) so that liquid crystal molecules are closer to being isotropic. Then, by having different vertical alignment (VA) TFT designs in the primary pixel region and secondary pixel region and utilizing the differences in W/L and capacitance, different voltage levels for primary pixel electrode and secondary pixel electrode are achieved. The color shift problem is improved and the viewing angle is enhanced.

Abstract: An array substrate and a method of manufacturing the same are provided. The array substrate includes a substrate, a gate layer, a first insulating layer, a gate tracking layer, and a second insulating layer. The method of manufacturing the array substrate includes a substrate providing step, a gate layer forming step, a first insulating layer forming step, a gate tracking layer forming step, and a second insulating layer forming step.

Abstract: The present disclosure proposes a thin film transistor and a related circuit. The thin film includes a gate, a drain and a source. The gate includes one or more gate units. The gate unit includes two or more strip-shaped gate branches, and a first gap is arranged between the two adjacent strip-shaped gate branches to separate them.

Abstract: The present invention provides an IPS TFT array substrate and a manufacturing method thereof. The manufacturing method of an IPS TFT array substrate of the present invention includes: forming a gate electrode, a scan line, a pixel electrode, and a common electrode with a first mask-involved operation, forming a first through hole and a second through hole in the gate insulation layer and an active layer with a second mask-involved operation, and forming a source electrode, a drain electrode, a data line, and a common electrode line with a third mask-involved operation. The present invention uses only three mask-involved operations to complete the manufacturing of an IPS TFT array substrate. Compared to the state of the art, the number of masks used is reduced, the manufacturing time is shortened, and thus the manufacturing cost is lowered. The IPS TFT array substrate of the present invention has a simple manufacturing process, a low manufacturing cost, and excellent electrical properties.

Abstract: A manufacturing method of TFT substrate and a TFT substrate are provided. The method provides a dual-gate structure symmetrically disposed on both sides of active layer, which prevents TFT threshold voltage from changing and improve TFT conduction state switching; by first manufacturing the active layer before the gate insulating layer to make the insulating layer directly grow on active layer, the contact interface between the gate insulating layer and active layer is improved, leading to further improving TFT conduction state switching. The TFT substrate makes the gate located between the source and the pixel electrode in vertical direction, and the dual-gate is symmetrically disposed on both sides of active layer to prevent TFT threshold voltage from changing and improve TFT conduction state switching, as well as improve the contact interface between the gate insulating layer and active layer, leading to further improving TFT conduction state switching.

Abstract: An array substrate, a manufacturing method and a display panel thereof are provided. A single mask process is used for completing formation of a flat layer and a pixel definition layer, or the flat layer, the pixel definition layer and a spacer. A light emitting unit is located within an anode so that the light of the emitting unit is reflected by the anode to accumulate. The risk of color mixing on the display panel is reduced, and the light intensity on the light exit side is enhanced.

Abstract: An array substrate, a manufacturing method thereof, and a display panel are provided in the present application. A gate electrode and source and drain electrodes of different thickness are formed on an electroplated substrate by metal electroplating. By using a height difference between the gate electrode and the source and drain electrodes, a dielectric layer covering the gate electrode and exposing the source and drain electrodes is formed on a substrate, so that an active layer is electrically connected to the source and drain electrodes. Moreover, separation is realized by means of the dielectric layer and the gate electrode, so an etching stop layer is not needed, which simplifies an IGZO manufacturing process and reduces production costs.

Abstract: The present invention relates to a scalable process for the making of elagolix, its salts and the process of intermediate compounds.

Abstract: A thin-film transistor and a manufacturing method for the same are disclosed.

Abstract: The present invention teaches a TFT array substrate and its manufacturing method including the following steps. A data line and a ring-shaped source electrode are formed on a substrate. A first insulation layer is formed on the substrate. A ring trough exposing the source electrode is formed on the first insulation layer. A semiconductor active layer is formed in the ring trough. A channel is formed on the first insulation layer in an area surrounded by the ring trough. A gate line, a gate electrode in the channel, and a drain electrode connected to the semiconductor active layer are formed on the first insulation layer. A second insulation layer is formed on the first insulation layer, and a pixel via is formed on the second insulation layer. A pixel electrode is formed on the second insulation layer, and is connected to the drain electrode through the pixel via.

Abstract: The present invention teaches a pixel unit including thin film transistors (TFTs) and pixel electrodes corresponding to the TFTs. The pixel electrodes are connected to the source electrodes of the TFTs. Each pixel electrode includes multiple arc-shaped electrode units arranged at intervals along an axial direction around a periphery of a corresponding TFT. The electrode units are electrically connected together. The present invention adopts arc-shaped pixels (similar to concentric circles) so that liquid crystal molecules are closer to being isotropic. Then, by having different vertical alignment (VA) TFT designs in the primary pixel region and secondary pixel region and utilizing the differences in W/L and capacitance, different voltage levels for primary pixel electrode and secondary pixel electrode are achieved. The color shift problem is improved and the viewing angle is enhanced.

Abstract: The present invention teaches a TFT array substrate and its manufacturing method including the following steps. A data line and a ring-shaped source electrode are formed on a substrate. A first insulation layer is formed on the substrate. A ring trough exposing the source electrode is formed on the first insulation layer. A semiconductor active layer is formed in the ring trough. A channel is formed on the first insulation layer in an area surrounded by the ring trough. A gate line, a gate electrode in the channel, and a drain electrode connected to the semiconductor active layer are formed on the first insulation layer. A second insulation layer is formed on the first insulation layer, and a pixel via is formed on the second insulation layer. A pixel electrode is formed on the second insulation layer, and is connected to the drain electrode through the pixel via.