Patents by Inventor Hui YI

Hui YI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11966077
    Abstract: A light emission apparatus includes a laser diode configured to emit a light; a laser driver electrically coupled to the laser diode, the laser driver being configured to drive the laser diode to generate the light; and an optical module arranged to receive the light emitted by the laser diode, the optical module comprising at least one optical element and being configured to adjust the light and emits a transmitting light; wherein the transmitting light emits from the optical module with an illumination angle and the optical module adjusts the light to vary the illumination angle.
    Type: Grant
    Filed: July 8, 2019
    Date of Patent: April 23, 2024
    Assignee: Artilux, Inc.
    Inventors: Yun-Chung Na, Chien-Lung Chen, Chieh-Ting Lin, Yu-Yi Hsu, Hui-Wen Chen, Bo-Jiun Chen, Shih-Tai Chuang
  • Patent number: 11968908
    Abstract: In an embodiment, a method includes: forming a first inter-metal dielectric (IMD) layer over a semiconductor substrate; forming a bottom electrode layer over the first IMD layer; forming a magnetic tunnel junction (MTJ) film stack over the bottom electrode layer; forming a first top electrode layer over the MTJ film stack; forming a protective mask covering a first region of the first top electrode layer, a second region of the first top electrode layer being uncovered by the protective mask; forming a second top electrode layer over the protective mask and the first top electrode layer; and patterning the second top electrode layer, the first top electrode layer, the MTJ film stack, the bottom electrode layer, and the first IMD layer with an ion beam etching (IBE) process to form a MRAM cell, where the protective mask is etched during the IBE process.
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: April 23, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tai-Yen Peng, Hui-Hsien Wei, Han-Ting Lin, Sin-Yi Yang, Yu-Shu Chen, An-Shen Chang, Qiang Fu, Chen-Jung Wang
  • Patent number: 11956972
    Abstract: A semiconductor memory device includes a substrate having a memory area and a logic circuit area thereon, a first interlayer dielectric layer on the substrate, and a second interlayer dielectric layer on the substrate. An embedded memory cell structure is disposed within the memory area between the first interlayer dielectric layer and the second interlayer dielectric layer. The second interlayer dielectric layer includes a first portion covering the embedded memory cell structure within the memory area and a second portion covering the logic circuit area. A top surface of the first portion is coplanar with a top surface of the second portion.
    Type: Grant
    Filed: April 13, 2021
    Date of Patent: April 9, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Si-Han Tsai, Ching-Hua Hsu, Chen-Yi Weng, Po-Kai Hsu
  • Patent number: 11957064
    Abstract: A semiconductor device includes a magnetic tunneling junction (MTJ) on a substrate, a spacer adjacent to the MTJ, a liner adjacent to the spacer, and a first metal interconnection on the MTJ. Preferably, the first metal interconnection includes protrusions adjacent to two sides of the MTJ and a bottom surface of the protrusions contact the liner directly.
    Type: Grant
    Filed: October 18, 2022
    Date of Patent: April 9, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Chen-Yi Weng, Yi-Wei Tseng, Chin-Yang Hsieh, Jing-Yin Jhang, Yi-Hui Lee, Ying-Cheng Liu, Yi-An Shih, I-Ming Tseng, Yu-Ping Wang
  • Publication number: 20240111330
    Abstract: A foldable electronic device is provided, including a first body, a second body, a supporting member, a first hinge connecting the first body and the supporting member, a second hinge connecting the supporting member and the second body, and a gravity-type latch movably disposed in the supporting member. The first body and the supporting member are rotated relatively to be folded or unfolded via the first hinge, and the second body and the supporting member are rotated relatively to be folded or unfolded via the second hinge. In a transforming process of the first body folding to the supporting member and together unfolding relative to the second body, the gravity-type latch is latched onto the first body once the unfolding angle is less than a predetermined value, and the gravity-type latch is de-latched from the first body once the unfolding angle is equal to or greater than the predetermined value.
    Type: Application
    Filed: May 4, 2023
    Publication date: April 4, 2024
    Applicant: Acer Incorporated
    Inventors: Jui-Yi Yu, Chun-Hsien Chen, Hui-Ping Sun, Chun-Hung Wen, Yen-Chou Chueh
  • Publication number: 20240111339
    Abstract: A cabling structure of a foldable electronic device includes a first body, a second body, a hinge module connecting the first body and the second body, a sliding member movably disposed in the second body, a flexible electrical connecting member connected to the first body, the second body, and the sliding member and being driven when the first body and the second body are rotated relatively, and a restoring module disposed in the second body and providing a force to the sliding member. The first body and the second body are rotated relatively to each other through the hinge module. When being rotated relatively to each other, the first body and the second body drive the flexible electrical connecting member and the sliding member. The restoring module restores the sliding member and the flexible electrical connecting member via the force.
    Type: Application
    Filed: May 8, 2023
    Publication date: April 4, 2024
    Applicant: Acer Incorporated
    Inventors: Hui-Ping Sun, Jui-Yi Yu, Chun-Hung Wen, Yen-Chou Chueh, Chun-Hsien Chen
  • Publication number: 20240107890
    Abstract: A method for fabricating semiconductor device includes the steps of forming an inter-metal dielectric (IMD) layer on a substrate, forming a metal interconnection in the IMD layer, forming a magnetic tunneling junction (MTJ) on the metal interconnection, and performing a trimming process to shape the MTJ. Preferably, the MTJ includes a first slope and a second slope and the first slope is less than the second slope.
    Type: Application
    Filed: October 24, 2022
    Publication date: March 28, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Chen-Yi Weng, Ching-Hua Hsu, Jing-Yin Jhang
  • Publication number: 20240106171
    Abstract: An electrical connector assembly includes: a male connector, provided with a conductive shell; a first substrate, accommodated in the conductive shell and used to transmit receiving signals; a second substrate, accommodated in the conductive shell and used to transmit sending signals; a shielding sheet, located between the first substrate and the second substrate; a female connector, provided with a first conductive body and a second conductive body; a plurality of first signal terminals, accommodated in the first conductive body and used to transmit receiving signals; and a plurality of second signal terminals, accommodated in the second conductive body and used to transmit sending signals. The first signal terminals and the first substrate are electrically contacted to each other. The second signal terminals and the second substrate are electrically contacted to each other. The first conductive body and/or the second conductive body are used to lap joint with the shielding sheet.
    Type: Application
    Filed: September 13, 2023
    Publication date: March 28, 2024
    Inventors: Po Jui Chou, Zhi Guo Peng, Chien Chih Ho, Hui Yi
  • Publication number: 20240098932
    Abstract: A foldable electronic device, including a first body, a second body, an air valve movably disposed in the first body, at least one triggering member, and a hinge connecting the first body and the second body, is provided. The first body has multiple openings respectively located at two opposite surfaces. The triggering member is movably disposed in the first body and has a part exposed outside the first body. The air valve and the triggering member are mutually on moving paths of each other. The first body and the second body are rotated to be folded or unfolded relative to each other by the hinge. A part of the triggering member is suitable for bearing a force such that the triggering member drives the air valve, so that the air valve opens or closes the openings.
    Type: Application
    Filed: July 19, 2023
    Publication date: March 21, 2024
    Applicant: Acer Incorporated
    Inventors: Hui-Ping Sun, Jui-Yi Yu, Chun-Hung Wen, Yen-Chou Chueh, Yu-Ming Lin, Chun-Hsien Chen
  • Publication number: 20240099154
    Abstract: A magnetoresistive random access memory (MRAM) device includes a first array region and a second array region on a substrate, a first magnetic tunneling junction (MTJ) on the first array region, a first top electrode on the first MTJ, a second MTJ on the second array region, and a second top electrode on the second MTJ. Preferably, the first top electrode and the second top electrode include different nitrogen to titanium (N/Ti) ratios.
    Type: Application
    Filed: November 21, 2023
    Publication date: March 21, 2024
    Applicant: UNITED MICROELECTRONICS CORP
    Inventors: Hui-Lin Wang, Si-Han Tsai, Dong-Ming Wu, Chen-Yi Weng, Ching-Hua Hsu, Ju-Chun Fan, Yi-Yu Lin, Che-Wei Chang, Po-Kai Hsu, Jing-Yin Jhang
  • Patent number: 11935871
    Abstract: A semiconductor package including a first semiconductor die, a second semiconductor die, a first insulating encapsulation, a dielectric layer structure, a conductor structure and a second insulating encapsulation is provided. The first semiconductor die includes a first semiconductor substrate and a through silicon via (TSV) extending from a first side to a second side of the semiconductor substrate. The second semiconductor die is disposed on the first side of the semiconductor substrate. The first insulating encapsulation on the second semiconductor die encapsulates the first semiconductor die. A terminal of the TSV is coplanar with a surface of the first insulating encapsulation. The dielectric layer structure covers the first semiconductor die and the first insulating encapsulation. The conductor structure extends through the dielectric layer structure and contacts with the through silicon via.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: March 19, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hao-Yi Tsai, Cheng-Chieh Hsieh, Tsung-Hsien Chiang, Hui-Chun Chiang, Tzu-Sung Huang, Ming-Hung Tseng, Kris Lipu Chuang, Chung-Ming Weng, Tsung-Yuan Yu, Tzuan-Horng Liu
  • Patent number: 11934106
    Abstract: An optical proximity correction (OPC) device and method is provided. The OPC device includes an analysis unit, a reverse pattern addition unit, a first OPC unit, a second OPC unit and an output unit. The analysis unit is configured to analyze a defect pattern from a photomask layout. The reverse pattern addition unit is configured to provide a reverse pattern within the defect pattern. The first OPC unit is configured to perform a first OPC procedure on whole of the photomask layout. The second OPC unit is configured to perform a second OPC procedure on the defect pattern of the photomask layout to enhance an exposure tolerance window. The output unit is configured to output the photomask layout which is corrected.
    Type: Grant
    Filed: August 4, 2022
    Date of Patent: March 19, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Shu-Yen Liu, Hui-Fang Kuo, Chian-Ting Huang, Wei-Cyuan Lo, Yung-Feng Cheng, Chung-Yi Chiu
  • Patent number: 11930448
    Abstract: Embodiments provide a core network selection method, an apparatus, and a system. The method includes the following steps: obtaining first dedicated core network (DCN) information from an access network device, where the first DCN information includes information about at least one DCN that can be accessed by the access network device. The method also includes selecting a to-be-accessed DCN from the at least one DCN according to the first DCN information, and sending information about the to-be-accessed DCN to the access network device, so that the access network device determines a core network device according to the information about the to-be-accessed DCN.
    Type: Grant
    Filed: January 25, 2022
    Date of Patent: March 12, 2024
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Xiaoyan Duan, Hui Jin, Qiang Yi, Yue He
  • Publication number: 20240081157
    Abstract: A semiconductor device includes a magnetic tunneling junction (MTJ) on a substrate, a first spacer on one side of the of the MTJ, a second spacer on another side of the MTJ, a first metal interconnection on the MTJ, and a liner adjacent to the first spacer, the second spacer, and the first metal interconnection. Preferably, each of a top surface of the MTJ and a bottom surface of the first metal interconnection includes a planar surface and two sidewalls of the first metal interconnection are aligned with two sidewalls of the MTJ.
    Type: Application
    Filed: November 6, 2023
    Publication date: March 7, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Chen-Yi Weng, Yi-Wei Tseng, Chin-Yang Hsieh, Jing-Yin Jhang, Yi-Hui Lee, Ying-Cheng Liu, Yi-An Shih, I-Ming Tseng, Yu-Ping Wang
  • Patent number: 11924964
    Abstract: Devices and methods are described for reducing etching due to Galvanic Effect within a printed circuit board (PCB) that may be used in an electronic device. Specifically, a contact trace is coupled to a contact finger that has a substantially larger surface area than the contact trace. The contact finger is configured to couple the electronic device to a host device. The contact trace is electrically isolated from the rest of the PCB circuitry during a fabrication process by a separation distance between an exposed portion of the contact trace and an impedance trace. The contact finger and the exposed portion of the contact trace are plated with a common material to reduce galvanic etching of the contact trace during fabrication. The contact trace is then connected to the impedance trace using a solder joint.
    Type: Grant
    Filed: April 7, 2022
    Date of Patent: March 5, 2024
    Assignee: Western Digital Technologies, Inc.
    Inventors: Lin Hui Chen, Songtao Lu, Chien Te Chen, Yu Ying Tan, Huang Pao Yi, Ching Chuan Hsieh, T. Sharanya Kaminda, Chia-Hsuan Huang
  • Publication number: 20240074328
    Abstract: A semiconductor device includes a magnetic tunneling junction (MTJ) on a substrate, a first spacer on one side of the of the MTJ, a second spacer on another side of the MTJ, a first metal interconnection on the MTJ, and a liner adjacent to the first spacer, the second spacer, and the first metal interconnection. Preferably, each of a top surface of the MTJ and a bottom surface of the first metal interconnection includes a planar surface and two sidewalls of the first metal interconnection are aligned with two sidewalls of the MTJ.
    Type: Application
    Filed: November 6, 2023
    Publication date: February 29, 2024
    Applicant: United Microelectronics Corp.
    Inventors: Hui-Lin Wang, Chen-Yi Weng, Yi-Wei Tseng, Chin-Yang Hsieh, Jing-Yin Jhang, Yi-Hui Lee, Ying-Cheng Liu, Yi-An Shih, I-Ming Tseng, Yu-Ping Wang
  • Patent number: 11917923
    Abstract: A magnetoresistive random access memory (MRAM) structure, including a substrate and multiple MRAM cells on the substrate, wherein the MRAM cells are arranged in a memory region adjacent to a logic region. An ultra low-k (ULK) layer covers the MRAM cells, wherein the surface portion of ultra low-k layer is doped with fluorine, and dents are formed on the surface of ultra low-k layer at the boundaries between the memory region and the logic region.
    Type: Grant
    Filed: April 28, 2021
    Date of Patent: February 27, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Ching-Hua Hsu, Si-Han Tsai, Shun-Yu Huang, Chen-Yi Weng, Ju-Chun Fan, Che-Wei Chang, Yi-Yu Lin, Po-Kai Hsu, Jing-Yin Jhang, Ya-Jyuan Hung
  • Patent number: 11805197
    Abstract: A terminal includes a display screen with an irregular shape and a front panel component disposed on a same layer as the display screen. The display screen includes a target region and a main display region. The display region is a complete rectangular region on the display screen. The target region is an irregular region other than the main display region on the display screen. A gap formed by the irregular region is a reserved region, and the front panel component is disposed in the reserved region.
    Type: Grant
    Filed: August 16, 2021
    Date of Patent: October 31, 2023
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Xiaoxiao Chen, Yanyan Mao, Hao Wu, Qing Wang, Hui Yi, Weiching Chung, Bing Li
  • Patent number: 11730851
    Abstract: The invention provides a limb immobilization device, being an immobilization device having a thermoplastic fixation plate capable of being shaped on a patient by covering a limb portion of the patient to support and/or immobilize that portion of the patient. The limb immobilization device has high air permeability and may replace or assist in use of the traditional plaster cast. The thermoplastic fixation plate is a laminate comprising a soft cloth and a first spacer fabric having a coating layer thereon.
    Type: Grant
    Filed: August 3, 2020
    Date of Patent: August 22, 2023
    Inventor: Hui-Yi Chiang
  • Publication number: 20230150715
    Abstract: A wedge shaped container formed from a folded web of flexible material. The container comprises a base (1), a rear wall (2) connected to the base, and a pair of upstanding side walls decreasing in height from the rear wall to the opposite end of the base. Each side wall is formed of two side wall panels (4, 6) connected at an edge of the base and connected by a hinge joint. From a fold-flat configuration, folding of the rear wall (2) away from the base (1) causes the side wall panels (4, 6) to be folded inwardly into the erected configuration. The container may have an integral lid (8). The invention also extends to a method of making a blank using a sequence of cuts to create unsupported file regions.
    Type: Application
    Filed: January 18, 2023
    Publication date: May 18, 2023
    Inventors: Quang Phung, Hui-Yi Wang