Patents by Inventor Hui YI

Hui YI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12293516
    Abstract: A pulmonary function identifying and treating method includes: obtaining a first image, having first image elements, and a second image, having second image elements, respectively corresponding to a first state and a second state of a lung; extracting first feature points of the first image and second feature points of the second image; registering the first image with the second image using a boundary point set registration method and an inner tissue registration method according to the first feature points and the second feature points, so that the first image elements correspond to the second image elements and tissue units of the lung; determining functional index values representative of the tissue units of the lung using a ventilation function quantification method according to the first image elements and the second image elements corresponding to the first image elements; and treating the lung according to the functional index values.
    Type: Grant
    Filed: August 11, 2022
    Date of Patent: May 6, 2025
    Assignee: BUDDHIST TZU CHI MEDICAL FOUNDATION
    Inventors: Shih-Kai Hung, Moon-Sing Lee, Hon-Yi Lin, Wen-Yen Chiou, Liang-Cheng Chen, Hui-Ling Hsieh, Chih-Ying Yang, Yin-Xuan Zheng, Jing Xiang Wong
  • Patent number: 12292689
    Abstract: An alkaline cleaning composition is provided. The alkaline cleaning composition includes an alkaline compound, 5% to 40% by weight of propylene glycol monomethyl ether, 10% to 30% by weight of water, and a polar solvent. Wherein, the polar solvent includes acetals, glycol ethers, pyrrolidones, or a combination thereof, and the alkaline cleaning composition is free of benzenesulfonic acid.
    Type: Grant
    Filed: December 23, 2021
    Date of Patent: May 6, 2025
    Assignee: Daxin materials corporation
    Inventors: Hui-yi Tang, Tzu-chi Wang, Yu-nung Chen, Yi-cheng Chen
  • Patent number: 12290005
    Abstract: A semiconductor device includes: a substrate comprising a magnetic tunneling junction (MTJ) region and a logic region; a first MTJ on the MTJ region; a first metal interconnection on the logic region; and a cap layer extending from a sidewall of the first MTJ to a sidewall of the first metal interconnection. Preferably, the cap layer on the MTJ region and the cap layer on the logic region comprise different thicknesses.
    Type: Grant
    Filed: May 30, 2024
    Date of Patent: April 29, 2025
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Yu-Ping Wang, Chen-Yi Weng, Chin-Yang Hsieh, Si-Han Tsai, Che-Wei Chang, Jing-Yin Jhang
  • Patent number: 12281650
    Abstract: Disclosed is an oil pump including: a pump module provided with a rotary shaft, an inner rotor coupling with the rotary shaft, an outer rotor rotated engaging with the inner rotor, an inlet for sucking fluid, and an outlet for pressing and discharging the sucked fluid; housings supporting the pump module; and a direction switching unit coupled between the housings and the outer rotor to keep an eccentric distance between the rotary shaft or a central axis line of the inner rotor and a central axis line of the outer rotor. According to the disclosure, there is provided an oil pump used for both forward rotation and reverse rotation, which does not require changing a suction area and a discharge area and direction switching is stably performed even when a power source rotates forwardly and reversely.
    Type: Grant
    Filed: August 5, 2022
    Date of Patent: April 22, 2025
    Assignee: YOUNGSHIN PRECISION CO., LTD
    Inventors: Do Jae Joo, Seong Wook Cha, Gahyeon Yi, Hui Do Ryu
  • Patent number: 12284812
    Abstract: A semiconductor structure includes a substrate, a first dielectric layer on the substrate, a plurality of memory stack structures on the first dielectric layer, an insulating layer conformally covering the memory stack structures and the first dielectric layer, a second dielectric layer on the insulating layer and filling the spaces between the memory stack structures, a first interconnecting structure through the second dielectric layer, wherein a top surface of the first interconnecting structure is flush with a top surface of the second dielectric layer and higher than top surfaces of the memory stack structures, a third dielectric layer on the second dielectric layer, and a plurality of second interconnecting structures through the third dielectric layer, the second dielectric layer and the insulating layer on the top surfaces of the memory stack structures to contact the top surfaces of the memory stack structures.
    Type: Grant
    Filed: April 16, 2024
    Date of Patent: April 22, 2025
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Yu-Ping Wang, Chen-Yi Weng, Chin-Yang Hsieh, Yi-Hui Lee, Ying-Cheng Liu, Yi-An Shih, I-Ming Tseng, Jing-Yin Jhang, Chien-Ting Lin
  • Patent number: 12277709
    Abstract: A wound-size measuring method for use in a portable electronic device is provided. The method includes the following steps: obtaining an input image via a camera device of the portable electronic device; using a CNN (convolutional neural network) model to recognize the input image, and selecting a part of the input image with the highest probability of containing a wound as an output wound image; and calculating an actual height and an actual width of the output wound image according to a lens-focal-length parameter reported by an operating system running on the portable electronic device, a plurality of reference calibration parameters corresponding to a pitch angle of the portable electronic device, and a pixel-height ratio and a pixel-width ratio of the output wound image.
    Type: Grant
    Filed: November 25, 2021
    Date of Patent: April 15, 2025
    Assignee: WISTRON CORP.
    Inventors: Wen Hsin Hu, Ji-Yi Yang, Zhe-Yu Lin, Hui Chi Hsieh, Yin Chi Lin, Chi Lun Huang
  • Patent number: 12275564
    Abstract: A wedge shaped container formed from a folded web of flexible material. The container comprises a base (1), a rear wall (2) connected to the base, and a pair of upstanding side walls decreasing in height from the rear wall to the opposite end of the base. Each side wall is formed of two side wall panels (4, 6) connected at an edge of the base and connected by a hinge joint. From a fold-flat configuration, folding of the rear wall (2) away from the base (1) causes the side wall panels (4, 6) to be folded inwardly into the erected configuration. The container may have an integral lid (8). The invention also extends to a method of making a blank using a sequence of cuts to create unsupported file regions.
    Type: Grant
    Filed: January 18, 2023
    Date of Patent: April 15, 2025
    Assignee: PROAMPAC HOLDINGS INC.
    Inventors: Quang Phung, Hui-Yi Wang
  • Patent number: 12274180
    Abstract: A method for fabricating a semiconductor device includes the steps of forming a magnetic tunneling junction (MTJ) on a MRAM region of a substrate, forming a first inter-metal dielectric (IMD) layer around the MTJ, forming a patterned mask on a logic region of the substrate, performing a nitridation process to transform part of the first IMD layer to a nitride layer, forming a first metal interconnection on the logic region, forming a stop layer on the first IMD layer, forming a second IMD layer on the stop layer, and forming a second metal intercom in the second IMD layer to connect to the MTJ.
    Type: Grant
    Filed: March 17, 2023
    Date of Patent: April 8, 2025
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Chen-Yi Weng, Si-Han Tsai, Che-Wei Chang, Po-Kai Hsu, Jing-Yin Jhang, Yu-Ping Wang, Ju-Chun Fan, Ching-Hua Hsu, Yi-Yu Lin, Hung-Yueh Chen
  • Patent number: 12266639
    Abstract: A semiconductor package including a first semiconductor die, a second semiconductor die, a first insulating encapsulation, a dielectric layer structure, a conductor structure and a second insulating encapsulation is provided. The first semiconductor die includes a first semiconductor substrate and a through substrate via (TSV) extending from a first side to a second side of the semiconductor substrate. The second semiconductor die is disposed on the first side of the semiconductor substrate. The first insulating encapsulation on the second semiconductor die encapsulates the first semiconductor die. A terminal of the TSV is coplanar with a surface of the first insulating encapsulation. The dielectric layer structure covers the first semiconductor die and the first insulating encapsulation. The conductor structure extends through the dielectric layer structure and contacts with the through substrate via.
    Type: Grant
    Filed: August 1, 2023
    Date of Patent: April 1, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hao-Yi Tsai, Cheng-Chieh Hsieh, Tsung-Hsien Chiang, Hui-Chun Chiang, Tzu-Sung Huang, Ming-Hung Tseng, Kris Lipu Chuang, Chung-Ming Weng, Tsung-Yuan Yu, Tzuan-Horng Liu
  • Patent number: 12262647
    Abstract: A semiconductor device includes a magnetic tunneling junction (MTJ) on a substrate, a spacer adjacent to the MTJ, a liner adjacent to the spacer, and a first metal interconnection on the MTJ. Preferably, the first metal interconnection includes protrusions adjacent to two sides of the MTJ and a bottom surface of the protrusions contact the liner directly.
    Type: Grant
    Filed: March 1, 2024
    Date of Patent: March 25, 2025
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Chen-Yi Weng, Yi-Wei Tseng, Chin-Yang Hsieh, Jing-Yin Jhang, Yi-Hui Lee, Ying-Cheng Liu, Yi-An Shih, I-Ming Tseng, Yu-Ping Wang
  • Publication number: 20250079581
    Abstract: A battery cap and a battery including the battery cap. The battery cap comprises a top cover; an anti-explosion valve plate, the anti-explosion valve plate being arranged below the top cover and electrically connected to the top cover, and an outer periphery dimension of the anti-explosion valve plate being smaller than an outer periphery dimension of the top cover; an orifice plate, the orifice plate being arranged below the anti-explosion valve plate, and the orifice plate and the anti-explosion valve plate being electrically connected at a central position, and being separated at a peripheral position with a gap; and an internal washer, the internal washer being used for sealing the gap between the outer peripheries of the anti-explosion valve plate and the orifice plate. The present invention may effectively seal electrolyte under normal operating conditions, and quickly and effectively relieve pressure in an emergency situation.
    Type: Application
    Filed: August 29, 2024
    Publication date: March 6, 2025
    Inventors: Ding Xing YI, Zhi Qing HAN, Xi Hui DING
  • Publication number: 20250073860
    Abstract: A two-size socket tool is provided, wherein the two-size socket tool includes: an outer sleeve including a socket hole, a receiving hole in communication with the socket hole, and a radial protrusion radially protruding between the socket hole and the receiving hole; an inner sleeve non-rotatably inserted in the outer sleeve and including an inner sleeving portion and a connection section connected to each other by insertion, the inner sleeving portion being received in the socket hole and blockable by the radial protrusion, the connection section extending from the inner sleeving portion toward the receiving hole; and a first elastic member received in the receiving hole and between the radial protrusion and the inner sleeve.
    Type: Application
    Filed: August 28, 2023
    Publication date: March 6, 2025
    Inventors: Chia-Yi CHEN, Hui-Chien CHEN
  • Patent number: 12232425
    Abstract: A magnetoresistive random access memory (MRAM) device includes a first array region and a second array region on a substrate, a first magnetic tunneling junction (MTJ) on the first array region, a first top electrode on the first MTJ, a second MTJ on the second array region, and a second top electrode on the second MTJ. Preferably, the first top electrode and the second top electrode include different nitrogen to titanium (N/Ti) ratios.
    Type: Grant
    Filed: November 21, 2023
    Date of Patent: February 18, 2025
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Si-Han Tsai, Dong-Ming Wu, Chen-Yi Weng, Ching-Hua Hsu, Ju-Chun Fan, Yi-Yu Lin, Che-Wei Chang, Po-Kai Hsu, Jing-Yin Jhang
  • Publication number: 20250053210
    Abstract: A laptop computer including a host, a movable door, a display, an input module, and a fan is provided. The host has a first surface and a second surface opposite to each other. The movable door is disposed on the second surface. The display is pivoted to the host to be folding on the first surface or unfolding from the first surface. The input module is disposed on the first surface. The fan is disposed in the host, and the movable door covers the fan. When the movable door is removed from the fan, an impeller of the fan is exposed from the host via the second surface.
    Type: Application
    Filed: January 19, 2024
    Publication date: February 13, 2025
    Applicant: Acer Incorporated
    Inventors: Chun-Hung Wen, Hui-Ping Sun, Chun-Hsien Chen, Jui-Yi Yu, Yen-Chou Chueh
  • Publication number: 20250055166
    Abstract: A battery and an electronic product, where the battery includes battery cell, a housing, a terminal post base and a first insulator, where the housing is provided with an accommodating cavity, and the battery cell is arranged in the accommodating cavity; the terminal post base includes a body and a terminal post, a terminal post hole is arranged on a side wall of the housing, the first insulator is arranged between the housing and the body, and a first positioning hole opposite to the terminal post hole is arranged on the first insulator, and the terminal post sequentially passes through the first positioning hole and the terminal post hole, and the terminal post is connected to a tab of the battery cell; the first insulator is further provided with a third limiting part, and an outer side wall of the housing is provided with a fourth limiting part.
    Type: Application
    Filed: October 28, 2024
    Publication date: February 13, 2025
    Inventors: Zhida WEI, Jichun XIE, Hui ZHANG, Chengbei LI, Peng YI, Yang XI
  • Publication number: 20250048936
    Abstract: A semiconductor device includes: a substrate comprising a magnetic tunneling junction (MTJ) region and a logic region, a MTJ on the MTJ region, a top electrode on the MTJ, a connecting structure on the top electrode, and a first metal interconnection on the logic region. Preferably, the first metal interconnection includes a via conductor on the substrate and a trench conductor, in which a bottom surface of the trench conductor is lower than a bottom surface of the connecting structure.
    Type: Application
    Filed: October 17, 2024
    Publication date: February 6, 2025
    Applicant: United Microelectronics Corp.
    Inventors: Hui-Lin Wang, Po-Kai Hsu, Chen-Yi Weng, Jing-Yin Jhang, Yu-Ping Wang, Hung-Yueh Chen
  • Publication number: 20250035718
    Abstract: A semiconductor device includes a magnetic tunneling junction (MTJ) on a substrate, in which the MTJ includes a pinned layer on the substrate, a reference layer on the pinned layer, a barrier layer on the reference layer, and a free layer on the barrier layer. Preferably, the free layer and the barrier layer have same width and the barrier layer and the reference layer have different widths.
    Type: Application
    Filed: October 15, 2024
    Publication date: January 30, 2025
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Chen -Yi Weng, Che-Wei Chang, Si-Han Tsai, Ching-Hua Hsu, Jing-Yin Jhang, Yu-Ping Wang
  • Publication number: 20250032547
    Abstract: Provided are methods and compositions for obtaining functionally enhanced derivative effector cells obtained from directed differentiation of genomically engineered iPSCs. In various embodiments, the derivative cells provided herein have stable and functional genome editing that delivers improved or enhanced therapeutic effects. Also provided are therapeutic compositions and the use thereof comprising the functionally enhanced derivative effector cells alone, or with antibodies or checkpoint inhibitors in combination therapies.
    Type: Application
    Filed: October 16, 2024
    Publication date: January 30, 2025
    Inventors: Emily CARRON, Eigen PERALTA, Bahram VALAMEHR, Hui-Yi CHU, Tom Tong LEE
  • Patent number: D1059037
    Type: Grant
    Filed: March 3, 2022
    Date of Patent: January 28, 2025
    Assignees: QINGDAO HAIER INNOVATION TECHNOLOGY CO., LTD., HAIER SMART HOME CO., LTD.
    Inventors: Hui An, Zhaojun Fei, Shu Zhou, Zuowei Yi, Fei Qin, Zhiqun Feng, Linkang Yang
  • Patent number: D1071417
    Type: Grant
    Filed: March 3, 2022
    Date of Patent: April 15, 2025
    Assignees: QINGDAO HAIER INNOVATION TECHNOLOGY CO., LTD., HAIER SMART HOME CO., LTD.
    Inventors: Hui An, Zuowei Yi, Shu Zhou, Zhaojun Fei, Linkang Yang, Zhiqun Feng, Fei Qin