Abstract: A display panel, crack detection method therefor, and display device. The display panel comprises a display area (100) provided with at least one first data line (101) and at least one second data line (102), and peripheral area (200) surrounding the display area and provided with a first crack detection line, second crack detection line, first detection switch circuit (51), and second detection switch circuit (52); the first crack detection line and second crack detection line are in different functional layers; the first crack detection line has a first end (A) electrically connected to a first test end and a second end (C) electrically connected to first detection switch circuit; the second crack detection line has a first end (B1) electrically connected to a third node (B) that is different from the first end (A) and second end (C), and a second end (A1 electrically connected to second detection switch circuit.

Abstract: A display substrate includes a scanning driving circuit arranged on a base substrate. The scanning driving circuit includes a plurality of shift register units and a first voltage signal line extending in a first direction. At least one shift register unit includes an output capacitor and a first transistor, a first electrode thereof is coupled to the first voltage signal line, and a second electrode thereof is coupled to an electrode plate of the output capacitor. A maximum distance between an orthogonal projection of the first electrode/second electrode of the first transistor onto the base substrate and an orthogonal projection of the first voltage signal line/the electrode plate of the output capacitor onto the base substrate is smaller than a first/second predetermined distance in a second direction, and the first direction intersects the second direction.

Abstract: A display panel and a display device are provided. The display panel includes: a sub-pixel including a pixel circuit and a light-emitting element, the light-emitting element including a first electrode; a first insulating layer, the first electrode being connected with the pixel circuit through a first via hole penetrating the first insulating layer; a pixel definition layer including an opening; the first electrode includes a main body portion and a connecting portion, the main body portion is at least partially overlapped with the opening, the connecting portion is at least partially overlapped with the first via hole, a size of the connecting portion at the first via hole in a first direction is ? to ? of a size of the main body portion in the first direction.

Abstract: A display panel has a display region and a non-display region located on a periphery of the display region. The display panel includes: a substrate; a first pixel driving circuit disposed in the display region and including first scanning signal patterns and first active patterns; and a second pixel driving circuit disposed in the non-display region and including second scanning signal patterns and second active patterns. A first scanning signal pattern is coupled to a second scanning signal pattern, and an overlapping area of an orthographic projection of each of at least one first scanning signal pattern on the substrate and orthographic projections of the first active patterns on the substrate is less than an overlapping area of an orthographic projection of each of at least one second scanning signal pattern on the substrate and orthographic projections of the second active patterns on the substrate.

Abstract: An array substrate is provided. A first virtual line and a second virtual line respectively cross over a first voltage supply line, a second voltage supply line, and a third voltage supply line. The first voltage supply line, the second voltage supply line, and the third voltage supply line respectively include a first voltage supply line portion, a second voltage supply line portion, and a third voltage supply line portion, respectively between the first virtual line and the second virtual line. An orthographic projection of a third anode of a third light emitting element on a base substrate completely covers an orthographic projection of the third voltage supply line portion on the base substrate. The third voltage supply line portion has a line width greater than a line width of the first voltage supply line portion, and greater than a line width of the second voltage supply line portion.

Abstract: A display apparatus and a method for manufacturing the display apparatus are provided. The display apparatus includes: a flexible panel which includes a display region and a non-display region, where the non-display region includes a bending sub-region and a back sub-region connected to the bending sub-region and arranged opposite to the display region, a multiplexer is arranged in the back sub-region; and a shielding electrode layer located on a side of the multiplexer away from the back sub-region, an orthographic projection of the multiplexer onto a plane where the shielding electrode layer is located being within the shielding electrode layer.

Abstract: A pixel circuit and a driving method thereof, a display substrate, and a display panel are provided. The pixel circuit includes: a data writing sub-circuit configured to write a data voltage into a storage sub-circuit; the storage sub-circuit configured to store the data voltage; a driving sub-circuit electrically connected to a first node and configured to drive a light-emitting component electrically connected to a second node to emit light according to the data voltage; a light-emitting control sub-circuit electrically connected to the first node and the second node, respectively, and configured to achieve to turn on or turn off connection between the driving sub-circuit and the light-emitting component; and a first compensation sub-circuit electrically connected to the first node and the second node, respectively, and configured to compensate a level of the second node according to a level of the first node.

Abstract: An array substrate is provided. The array substrate includes a gate line extending along a first direction. The gate line includes a plurality of wide portions and a plurality of narrow portions respectively arranged along the first direction, the plurality of wide portions having a first dimension greater than a second dimension of the plurality of narrow portions along a second direction, the second direction at an angle in a range of 80 degrees to 100 degrees with respect to the first direction. An orthographic projection of a respective one of the plurality of wide portions in the respective subpixel on the base substrate overlaps with an orthographic projection of a portion of the semiconductor material layer in the respective subpixel on the base substrate, forming an active layer of the data-write transistor in the respective subpixel.

Abstract: Disclosed are a display panel and a display device. The display panel comprises: a base substrate, a plurality of scanning lines, a first insulating layer, a plurality of data lines, an interlayer insulating layer, and an auxiliary power line. The auxiliary power line comprises: a plurality of sub-auxiliary power lines and a plurality of auxiliary conduction lines; the plurality of sub-auxiliary power lines are arranged in a first direction and extend in a second direction, and two sub-auxiliary power lines that are at least partially adjacent are electrically connected by means of at least one auxiliary conduction line; the orthographic projection of at least one of the plurality of auxiliary conduction lines on the base substrate does not overlap the orthographic projections of the scanning lines on the base substrate.

Abstract: A display substrate and a display apparatus. In the display substrate, the first signal line sequentially passes through the first display region, the opening peripheral region and the second display region along a first direction, and includes a first lead portion and a first winding portion that are in the opening peripheral region and connected to each other; the first winding portion partially surrounds the opening; the second signal line provides a second display signal to the pixel array, passes through the peripheral region of the opening along a second direction intersecting with the first direction, includes a second winding portion in the peripheral region of the opening and partially surrounds the opening. The first lead portion and the second signal line have a first overlapping region, and the first winding portion and the second winding portion have a second overlapping region.

Abstract: An array substrate is provided. The array substrate includes a node connecting line in a same layer as a respective one of the plurality of voltage supply lines, connected to a first capacitor electrode through a first via, and connected to a semiconductor material layer through a second via; and an interference preventing block in a same layer as the second capacitor electrode. The respective one of the plurality of voltage supply lines is connected to the interference preventing block through a third via. The interference preventing block includes a first arm and a second arm. Along the first direction, a portion of the node connecting line at a position connecting to the semiconductor material layer through the second via is spaced apart from a first adjacent data line by the first arm, and is spaced apart from a second adjacent data line by the second arm.

Abstract: A display panel and a display device are provided. The display panel includes: a display part including a plurality of data lines; a fan-out part including a plurality of fan-out lines; and a lead wire part including a plurality of first lead wires which are respectively connected with the plurality of data lines through the plurality of fan-out lines, and the plurality of fan-out lines are fanned out between the lead wire part and the display part. The plurality of first lead wires each include a first lead wire subpart and a compensation part to form a plurality of first lead wire subparts and a plurality of compensation parts, the plurality of first lead wire subparts are respectively connected with the plurality of compensation parts; the first lead subparts (WS1) have a width different from that of the compensation parts.

Abstract: The present disclosure provides a display substrate, a manufacturing method thereof, and a display device. In the display substrate, the sub-pixel driving circuit includes a driving transistor and a first reset transistor, and a gate electrode of the first reset transistor is electrically connected to the reset signal line pattern, a first electrode of the first reset transistor is electrically connected to the initialization signal line pattern, and a second electrode of the first reset transistor is electrically connected to a gate electrode of the driving transistor; and the shielding pattern is electrically connected to the power signal line pattern, an orthographic projection of the shielding pattern on the substrate overlaps an orthographic projection of the first electrode of the first reset transistor on the substrate.

Abstract: A display substrate includes a scanning driving circuit arranged on a base substrate. The scanning driving circuit includes a plurality of shift register units and a first voltage signal line extending in a first direction. At least one shift register unit includes an output capacitor and a first transistor, a first electrode thereof is coupled to the first voltage signal line, and a second electrode thereof is coupled to an electrode plate of the output capacitor. A maximum distance between an orthogonal projection of the first electrode/second electrode of the first transistor onto the base substrate and an orthogonal projection of the first voltage signal line/the electrode plate of the output capacitor onto the base substrate is smaller than a first/second predetermined distance in a second direction, and the first direction intersects the second direction.

Abstract: Provided is a display substrate. The display substrate includes: a base substrate, a plurality of sub-pixels, a plurality of data lines, a plurality of data transmission lines, a plurality of electrostatic discharge circuits, a panel crack detection trace, and a plurality of electrostatic discharge dummy circuits. At least one of the electrostatic discharge dummy circuits may be connected to the panel crack detection trace. A display device is also provided.

Abstract: The present disclosure provides a display substrate including a base substrate, and a driving circuit layer and a plurality of light emitting elements formed on the base substrate, a plurality of thin film transistors of a pixel circuit including a data writing transistor and a first light emitting control transistor, and in the same pixel circuit, an active general layer includes a first column-wise active portion including an active layer of the data writing transistor, an active layer of the first light emission control transistor, and a first active connection portion, an orthographic projection of the first active connection portion on the base substrate at least partially overlapping an orthographic projection of a corresponding power supply line on the base substrate, a dimension of the first active connection portion in a row direction of the pixel units being less than a dimension of the active layer of the data writing transistor in the row direction of the pixel units, and, the dimension of the fir

Abstract: A display substrate and a display substrate are provided. The display substrate includes a first signal line, and the first signal line includes a first signal line portion in the display region and a second signal line portion in the peripheral region. The second signal line portion of the first signal line includes a first sub-portion, a second sub-portion and a third sub-portion which are sequentially connected; the first sub-portion and the third sub-portion both include a curved structure, and the second sub-portion is in a linear structure; and the display substrate further includes a first compensation electrode in the peripheral region, and the first compensation electrode is overlapped with the second sub-portion of the second signal line portion of the first signal line in a direction perpendicular to the base substrate to form a compensation capacitor.

Abstract: A display substrate and a display device are provided. The display substrate includes: a base substrate, a pixel driving circuit layer, a first planarization layer, an anode layer, a light emitting functional layer, and a spacer. The first planarization layer includes a first via hole, the anode layer includes a first anode and a second anode, the first anode includes a first main body portion and a first connection portion, the second anode includes a second main body portion and a second connection portion, the spacer is located between the first and second main body portions in adjacent anode group rows. An overlapping area between the spacer and the first via hole is less than 20% of an area of the first via hole.

Abstract: A display substrate and a manufacture method thereof, and a display device are provided. The display substrate includes a display region and a peripheral region, the peripheral region includes a first scan driving circuit and a second scan driving circuit on a first side of the display region, the peripheral region further includes a binding region on a second side of the display region, the peripheral region includes an organic insulation layer, the organic insulation layer at least partially covers the first scan driving circuit and the second scan driving circuit, and includes a first groove that is in a strip shape and extends substantially along a first direction to expose a portion between the first scan driving circuit and the second scan driving circuit, and the first groove also extends from the first side to the second side and extends substantially along a second direction on the second side.

Abstract: A pixel circuit, a display substrate and a display device are disclosed. The pixel circuit includes: a threshold compensation transistor, a shielding element including a first shielding portion and a second shielding portion coupled with each other; a data writing transistor, orthographic projections of an active layer of the data writing transistor and the gate of the data writing transistor on the substrate are overlapped to form a first overlapping area; the first electrode and the active layer of the data writing transistor are in a same layer, orthographic projections of the first electrode of the data writing transistor and the second shielding portion on the substrate are overlapped to form a second overlapping area; a size of the second overlapping area in the first direction is smaller than that of the first overlapping area in the first direction.