Patents by Inventor Huijuan Zhang

Huijuan Zhang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210193700
    Abstract: A thin film transistor, a method for fabricating the same, a display substrate, and a display device are disclosed. The thin film transistor includes a gate, a source, a drain, and an active layer. Forming the active layer includes: forming a pattern comprising a thermal insulation layer; forming a pattern comprising an amorphous silicon layer on the thermal insulation layer, wherein the pattern comprising the amorphous silicon layer includes a first portion on the thermal insulation layer and a second portion extending beyond the thermal insulation layer; and treating the pattern comprising the amorphous silicon layer with a laser annealing process, so that the amorphous silicon layer grows grain in a direction from the second portion to the first portion to form the active layer from polycrystalline silicon.
    Type: Application
    Filed: December 13, 2017
    Publication date: June 24, 2021
    Inventors: Xiaolong LI, Dong LI, Huijuan ZHANG, Zheng LIU
  • Publication number: 20210065588
    Abstract: The present disclosure provides a display substrate, a preparation method thereof and a display apparatus. The display substrate includes a flexible substrate and a compensation layer arranged on the flexible substrate, wherein an OLED pixel is arranged on the compensation layer, a surface of the compensation layer facing the OLED pixel being an inclined surface with respect to the flexible substrate.
    Type: Application
    Filed: June 29, 2020
    Publication date: March 4, 2021
    Inventors: Huijuan ZHANG, Shantao CHEN, Fangxu CAO
  • Publication number: 20210043701
    Abstract: A flexible display panel has a display area, a peripheral area surrounding the display area, and a bending area having at least one overlapping area with the peripheral area. The flexible display panel includes a plurality of conductive layers disposed in the display area, and at least one interdigital capacitor disposed in the at least one overlapping area. One of the at least one interdigital capacitor is disposed in a same layer with a same material as one of the plurality of conductive layers.
    Type: Application
    Filed: December 25, 2019
    Publication date: February 11, 2021
    Inventors: Dong LI, Hongwei TIAN, Chunyang WANG, Huijuan ZHANG, Zheng LIU, Xiaolong LI, Meng ZHAO, Mingche HSIEH
  • Publication number: 20200273703
    Abstract: A poly-silicon layer and a method of manufacturing the same, methods of manufacturing a thin film transistor, and an array substrate are provided. The method of manufacturing the poly-silicon layer includes forming an amorphous silicon layer, crystallizing the amorphous silicon layer to form a first poly-silicon layer, and processing the first poly-silicon layer to form a second poly-silicon layer using a green laser annealing process.
    Type: Application
    Filed: November 7, 2018
    Publication date: August 27, 2020
    Applicant: BOE TECHNOLOGY GROUP CO., LTD.
    Inventor: Huijuan ZHANG
  • Publication number: 20200238268
    Abstract: The present invention discloses a CoFe2O4-WTRs composite magnetic catalyst for efficiently degrading atrazine by activating peroxymonosulfate, preparation method and application thereof. The CoFe2O4-WTRs composite magnetic catalyst is prepared by three steps: the first step is acid-leaching of WTRs, using the WTRs as iron source to provide the iron ions required for the synthesis of CoFe2O4; the second step is preparing of a precursor, synthesizing CoFe2O4 by chemical co-precipitation method and uniformly loading the prepared CoFe2O4 on the WTRs; and the third step is calcining the precursor to synthesize the CoFe2O4-WTRs composite magnetic catalyst. The catalytic performance of the CoFe2O4-WTRs composite magnetic catalyst prepared by the present invention is evaluated using PMS as an oxidant and atrazine as a target pollutant. The CoFe2O4-WTRs can efficiently remove atrazine from the actual water, exhibiting good potential for practical application.
    Type: Application
    Filed: January 25, 2019
    Publication date: July 30, 2020
    Applicant: Beijing Normal University
    Inventors: Xiaowan LI, Xitao LIU, Chunye LIN, Huijuan ZHANG, Zhou ZHOU, Guoxuan FAN, Mengchang HE, Wei OUYANG
  • Publication number: 20200136089
    Abstract: The present disclosure provides a display substrate and a manufacturing method thereof, and a display device. The display substrate includes a stretchable base substrate; a display functional layer provided on the stretchable base substrate, the display functional layer including a plurality of pixel structures spaced apart from each other, each of the pixel structures including at least one inorganic insulation layer; the pixel structure having an upper surface distal to the stretchable base substrate and a first lateral surface connected between the upper surface and the stretchable base substrate; a protection layer covering at least a portion of the first lateral surface of at least one of the pixel structures corresponding to the inorganic insulation layer.
    Type: Application
    Filed: October 23, 2019
    Publication date: April 30, 2020
    Inventors: Huijuan ZHANG, Pinfan WANG
  • Patent number: 10629638
    Abstract: A method for fabricating a LTPS layer, a LTPS layer, a display substrate, and a display device are disclosed. The method includes providing a substrate which comprises a driver thin film transistor region and a non-driver thin film transistor region; depositing an amorphous silicon layer on the substrate; and irradiating the amorphous silicon layer with a laser beam to crystalline the amorphous silicon layer, wherein a scanning parameter with which the laser beam irradiates the amorphous silicon layer in the driver thin film transistor region is different from a scanning parameter with which the laser beam irradiates the amorphous silicon layer in the non-driver thin film transistor region. The driver and non-driver thin film transistor regions are processed in a differentiated manner with different scanning parameters. The amorphous silicon layer in the driver thin film transistor region is crystallized into a the grain size.
    Type: Grant
    Filed: December 15, 2017
    Date of Patent: April 21, 2020
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Huijuan Zhang, Dong Li, Xiaolong Li
  • Patent number: 10615282
    Abstract: The present disclosure provides a method for manufacturing a thin-film transistor and a thin-film transistor manufactured thereby, an array substrate and a display apparatus. The method comprises: forming a first layer; forming at least one etch stopper over the first layer; forming a second layer over the first layer and the at least one etch stopper; forming at least one contact via in the second layer, such that a bottom opening of each contact via contacts with a top surface of one etch stopper; and forming at least one electrode in the at least one contact via, such that each electrode extends in one contact via respectively, and is in contact with, and electrically coupled with, the one etch stopper. The at least one etch stopper comprises a composition.
    Type: Grant
    Filed: November 25, 2016
    Date of Patent: April 7, 2020
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Huijuan Zhang, Chienhung Liu
  • Patent number: 10199506
    Abstract: The embodiments of the present invention disclose a low temperature poly-silicon (LTPS) transistor array substrate and a method of fabricating the same, and a display device. The LTPS transistor array substrate comprises a substrate; a poly-silicon semiconductor active region provided on the substrate; a gate insulated from the poly-silicon semiconductor active region; and a dielectric spacer region provided on a side wall of the gate, wherein a portion of the poly-silicon semiconductor active region corresponding to the dielectric spacer region comprises a buffer region, and the dielectric spacer region surrounds the side wall of the gate and covers the buffer region.
    Type: Grant
    Filed: March 30, 2016
    Date of Patent: February 5, 2019
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xiaoyong Lu, Zheng Liu, Xiaolong Li, Dong Li, Huijuan Zhang, Liang Sun
  • Publication number: 20190027612
    Abstract: The present disclosure provides a method for manufacturing a thin-film transistor and a thin-film transistor manufactured thereby, an array substrate and a display apparatus. The method comprises: forming a first layer; forming at least one etch stopper over the first layer; forming a second layer over the first layer and the at least one etch stopper; forming at least one contact via in the second layer, such that a bottom opening of each contact via contacts with a top surface of one etch stopper; and forming at least one electrode in the at least one contact via, such that each electrode extends in one contact via respectively, and is in contact with, and electrically coupled with, the one etch stopper. The at least one etch stopper comprises a composition.
    Type: Application
    Filed: November 25, 2016
    Publication date: January 24, 2019
    Applicant: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Huijuan ZHANG, Chienhung LIU
  • Publication number: 20180308878
    Abstract: A method for fabricating a LTPS layer, a LTPS layer, a display substrate, and a display device are disclosed. The method includes providing a substrate which comprises a driver thin film transistor region and a non-driver thin film transistor region; depositing an amorphous silicon layer on the substrate; and irradiating the amorphous silicon layer with a laser beam to crystalline the amorphous silicon layer, wherein a scanning parameter with which the laser beam irradiates the amorphous silicon layer in the driver thin film transistor region is different from a scanning parameter with which the laser beam irradiates the amorphous silicon layer in the non-driver thin film transistor region. The driver and non-driver thin film transistor regions are processed in a differentiated manner with different scanning parameters. The amorphous silicon layer in the driver thin film transistor region is crystallized into a the grain size.
    Type: Application
    Filed: December 15, 2017
    Publication date: October 25, 2018
    Inventors: Huijuan ZHANG, Dong LI, Xiaolong LI
  • Patent number: 10084095
    Abstract: The embodiments of present disclosure provide a thin film transistor, a method for manufacturing the same, and an array substrate. The thin film transistor comprises an active layer provided on a substrate, the active layer including a middle channel region, a first high resistance region and a second high resistance region provided respectively on external sides of the middle channel region, a source region provided on an external side of the first high resistance region and a drain region provided on an external side of the second high resistance region, wherein a base material of the active layer is diamond single crystal.
    Type: Grant
    Filed: March 1, 2016
    Date of Patent: September 25, 2018
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Xiaolong Li, Zheng Liu, Xiaoyong Lu, Chunping Long, Huijuan Zhang
  • Patent number: 10048453
    Abstract: In various embodiments, an optical alignment structure may be provided. The optical alignment structure may include a light carrying structure configured to receive an input optical light from an external light source. The optical alignment structure may further include a light redirection mechanism coupled to the light carrying structure. The light redirection mechanism may be configured to receive the input optical light from the light carrying structure. The light redirection mechanism may be further configured to redirect the input optical light back to the light carrying structure, the redirected input optical light configured to be detected by a detector for alignment of the optical alignment structure with the external optical source.
    Type: Grant
    Filed: January 15, 2014
    Date of Patent: August 14, 2018
    Assignee: Agency for Science, Technology and Research
    Inventors: Chao Li, Huijuan Zhang, Guo-Qiang Patrick Lo
  • Publication number: 20180226256
    Abstract: Disclosed are a thin film transistor, a method for fabricating the same, and a display device, where the fabricating method includes: forming a gate insulation layer on a base substrate; and injecting negative ions into the gate insulation layer through ion injection, wherein the negative ions can be bonded with positive ions in the gate insulation layer. In the fabricating method according to the application, the negative ions can be injected into the gate insulation layer to thereby lower the concentration of positive charges in the gate insulation layer so as to alleviate the threshold voltage in the thin film transistor from negative bias, and also lower power consumption in driving a pixel circuit.
    Type: Application
    Filed: September 26, 2017
    Publication date: August 9, 2018
    Inventors: Dong Li, Xiaolong Li, Huijuan Zhang
  • Publication number: 20180217421
    Abstract: Embodiments of the present disclosure provide a display substrate and manufacturing method thereof and a display device. The method of manufacturing the display substrate comprises: forming a pattern including an active layer on a base substrate using an amorphous silicon material, the active layer including at least one step region having a film thickness greater than a film thickness of other regions of the active layer; crystallizing the amorphous silicon material in the active layer into a polysilicon material.
    Type: Application
    Filed: May 23, 2016
    Publication date: August 2, 2018
    Inventors: Shantao Chen, Huijuan Zhang, Yidong Guo
  • Patent number: 9985116
    Abstract: A method for processing a polysilicon thin film and a method for fabricating a thin film transistor are provided. The method for processing a polysilicon thin film includes: etching the polysilicon thin film using etching particles. An angle between an incident direction of the etching particles and the polysilicon thin film is larger than 0° and less than 90°.
    Type: Grant
    Filed: November 14, 2016
    Date of Patent: May 29, 2018
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Xiaolong Li, Zheng Liu, Dong Li, Huijuan Zhang, Jian Min
  • Publication number: 20170194461
    Abstract: A method for processing a polysilicon thin film and a method for fabricating a thin film transistor are provided. The method for processing a polysilicon thin film includes: etching the polysilicon thin film using etching particles. An angle between an incident direction of the etching particles and the polysilicon thin film is larger than 0° and less than 90°.
    Type: Application
    Filed: November 14, 2016
    Publication date: July 6, 2017
    Inventors: Xiaolong Li, Zheng Liu, Dong Li, Huijuan Zhang, Jian Min
  • Publication number: 20170162703
    Abstract: The embodiments of present disclosure provide a thin film transistor, a method for manufacturing the same, and an array substrate. The thin film transistor comprises an active layer provided on a substrate, the active layer including a middle channel region, a first high resistance region and a second high resistance region provided respectively on external sides of the middle channel region, a source region provided on an external side of the first high resistance region and a drain region provided on an external side of the second high resistance region, wherein a base material of the active layer is diamond single crystal.
    Type: Application
    Filed: March 1, 2016
    Publication date: June 8, 2017
    Inventors: Xiaolong LI, Zheng LIU, Xiaoyong LU, Chunping LONG, Huijuan ZHANG
  • Patent number: 9559159
    Abstract: A method for preparing an LTPS membrane, including: forming an amorphous silicon (a-Si) layer (S3) on a substrate (S1) by a patterning process, in which the a-Si layer (S3) comprises a plurality of convex structures (S32) and etched areas (S31) which are disposed along circumference of the plurality of convex structures and partially etched; and performing excimer laser crystallization (ELC) on the a-Si layer (S3) and obtaining the LTPS membrane. A thin-film transistor (TFT) and a display device are further disclosed, which are used for overcoming poor uniformity of the polysilicon membrane prepared by the ELC technology.
    Type: Grant
    Filed: April 23, 2014
    Date of Patent: January 31, 2017
    Assignee: BOE Technology Group Co., Ltd.
    Inventor: Huijuan Zhang
  • Publication number: 20160365360
    Abstract: The present disclosure discloses a smoothing device, a smoothing method, a thin film transistor, a display substrate and a display device. The smoothing device comprises a cavity, a plasma generating component, a magnetic field generating component, an electric field generating component and a carrier located within the cavity. The plasmas generated by the plasma generating component are subjected to the Lorentz force parallel to the surface of the object to be smoothed under the effect of the magnetic field generated by the magnetic field generating component, and subjected to an electric field force in the direction perpendicular to the surface of the object to be smoothed and pointing to the object to be smoothed under the effect of the electric field generated by the electric field generating component.
    Type: Application
    Filed: April 11, 2016
    Publication date: December 15, 2016
    Inventors: Xiaolong LI, Huijuan ZHANG, Xiaoyong LU, Zheng LIU, Yucheng CHAN, Chunping LONG