Abstract: A micro chip-scale-package system including providing a metal pattern on an adhesion material, attaching an integrated circuit die to the metal pattern, and molding an encapsulant over the integrated circuit die and the metal pattern.

Abstract: A semiconductor package system is provided including forming a support platform, mounting a first device over the support platform, forming a bump on the support platform, and mounting a second device on the first device and the bump.

Abstract: In a semiconductor assembly having stacked elements, discrete bumps made of a polymer such as an electrically nonconductive epoxy are interposed between the upper surface of a substrate and the lower surface of the overhanging part of an elevated element (die or package). The bumps are dimensioned to provide a clearance between the upper surface of the “bottom” substrate and the under surface of the second die or “top” package. The invention is carried out by first determining what height is required for the support; then depositing one or more of the polymer bumps at one or more suitable sites on the substrate; and placing the overhanging die or package onto the feature or features upon which it is stacked. The required height is the same as the accumulated thickness of the feature or features upon which the die or package is stacked (including the sum of thicknesses of, for example, any die, packages, spacers, adhesives layers, etc.).

Abstract: A wire bond interconnection between a die pad and a bond finger includes a support pedestal at a bond site of the lead finger, a ball bond on the die pad, and a stitch bond on the support pedestal, in which a width of the lead finger at the bond site is less than a diameter of the support pedestal. Also, a semiconductor package including a die mounted onto and electrically connected by a plurality of wire bonds to a substrate, in which each of the wire bonds includes a wire ball bonded to a pad on the die and stitch bonded to a support pedestal on a bond site on a lead finger, and in which the width of the lead finger at the bond site is less than the diameter of the support pedestal. Also, such a package in which the package substrate includes a two-tier substrate, each tier including a plurality of lead fingers having a lead finger bond pitch about twice the die pad pitch, the lead fingers of the first tier and the second tier having a staggered arrangement.

Abstract: A semiconductor package system includes providing a die having a plurality of contact pads. A leadframe is formed having a plurality of lead fingers with the plurality of lead fingers having a fine pitch and each having a substantially trapezoidal cross-section. A plurality of bumps is formed on the plurality of lead fingers, the plurality of bumps are on the tops and extend down the sides of the plurality of lead fingers. A plurality of bond wires is attached to the plurality of contact pads and to the plurality of bumps. An encapsulant is formed over the plurality of lead fingers, the die, and the plurality of bond wires, the encapsulant leaving lower surfaces of the plurality of lead fingers exposed.

Abstract: A capillary tip for a wire bonding tool has a chamfer provided with at least one annular groove. The annular groove is generally oriented in a plane perpendicular to the axis of the capillary. In a sectional view thru the capillary axis, the groove profile may be generally part-oval or part circular, such as semicircular or half-oval; or generally rectangular; or generally triangular. In some embodiments the width of the groove profile at the face of the chamfer is at least about one-tenth, more usually at least about one-fifth, the length of the chamfer face; and less than about one-half, more usually less than about one-third, the length of the chamfer face. In some embodiments two or more such grooves are provided. The grooved chamfer can improve the transmission of ultrasonic energy to the wire ball during formation of the bond.