Abstract: A technique to operate a wireless (IEEE 802.15) and powerline (Broadband PLC) mesh network uses bridges to bridge the different network types. Each bridge has a an IEEE 802.15 MAC/PHY and a Broadband PLC MAC/PHY.

Abstract: A SCO estimator comprises the following units. A module obtains a first data output by a first unit and copies the first data to obtain copied data. A QAM unit quadrature modulates the copied data into each sub-carrier of each OFDM symbol to regenerate transmitted modulated data. A first phase unit obtains a first phase of each sub-carrier of each OFDM symbol of the modulated data. A second phase unit obtains a second data from a second unit, and obtains a second phase of each sub-carrier of each OFDM symbol of the second data. A comparator generates a comparing result according to the first phase and the second phase of each sub-carrier of each OFDM symbol. A divider divides the comparing result of each sub-carrier by the subcarrier index within each OFDM symbol and the OFDM symbol index of each OFDM symbol. An averaging unit averages the divided comparing result over number of sub-carriers and number of OFDM symbols.

Abstract: A system connected to power lines in a network includes a wireless component; a wired component interfaced with the power lines; a conversion component coupled to the wireless component and the wired component and performs at least unidirectional conversion of a transmission unit between wireless and wired, the conversion employs only MAC addresses for addressing.

Abstract: A SCO estimator comprises the following units. A module obtains a first data output by a first unit and copies the first data to obtain copied data. A QAM unit quadrature modulates the copied data into each sub-carrier of each OFDM symbol to regenerate transmitted modulated data. A first phase unit obtains a first phase of each sub-carrier of each OFDM symbol of the modulated data. A second phase unit obtains a second data from a second unit, and obtains a second phase of each sub-carrier of each OFDM symbol of the second data. A comparator generates a comparing result according to the first phase and the second phase of each sub-carrier of each OFDM symbol. A divider divides the comparing result of each sub-carrier by the subcarrier index within each OFDM symbol and the OFDM symbol index of each OFDM symbol. An averaging unit averages the divided comparing result over number of sub-carriers and number of OFDM symbols.

Abstract: An ultra wideband receiver, based on multiband orthogonal frequency division multiplexing (MB-OFDM), combines digital data from multiple channels after signal processing and before decoding. The receiver provides a master controller that synthesizes packet synchronization, frame synchronization, and sampling frequency offset information from multiple channels into signals that simultaneously control all channels of the receiver.

Abstract: An ultra-wideband clear channel assessment system uses a double-window energy technique for energy detection, which indicates a clear or busy channel.

Abstract: The invention enables automatic gain control in ultra wideband applications over multiple channels and frequency bands.

Abstract: A method is presented for packet detection and symbol boundary location using a two-step sign correlation procedure. When the correlation crosses a threshold, a packet detection signal is generated to initiate processing of downstream blocks, and a symbol boundary location signal is generated for use in aligning data during processing.

Abstract: A receiver sets weights for an antenna array according to a series of algorithms including an energy algorithm, a least squares algorithm and a least mean square algorithm.

Abstract: A system and method set up a beacon group for both wired and wireless UWB nodes along a single superframe with a single time frequency code and then transmits data between the wired and wireless nodes per the single superframe and time frequency code.

Abstract: A semiconductor wafer and a method for fabricating a semiconductor wafer having improved dicing lanes are provided. The dicing lanes include grooves formed by photolithography and etching processes. The wafer also includes a plating layer on a back side of the wafer to facilitate bonding of individual circuit chips to a suitable substrate and to effect efficient heat transfer between the chip and the substrate. Photolithography and etching processes are employed to etch horizontal and vertical lanes in the plating layer to facilitate breaking of the individual chips from the wafer. The horizontal and vertical lanes etched in the plating layer are coincident to the grooves etched in the substrate. The wafer can then be broken into individual circuit chips by applying stress to the back of the wafer, such that the wafer cleanly breaks along the horizontal and vertical dicing lanes and the etched grooves.

Abstract: A semiconductor wafer and a method for fabricating a semiconductor wafer having improved dicing lanes are provided. The dicing lanes include grooves formed by photolithography and etching processes. The wafer also includes a plating layer on a back side of the wafer to facilitate bonding of individual circuit chips to a suitable substrate and to effect efficient heat transfer between the chip and the substrate. Photolithography and etching processes are employed to etch horizontal and vertical lanes in the plating layer to facilitate breaking of the individual chips from the wafer. The horizontal and vertical lanes etched in the plating layer are coincident to the grooves etched in the substrate. The wafer can then be broken into individual circuit chips by applying stress to the back of the wafer, such that the wafer cleanly breaks along the horizontal and vertical dicing lanes and the etched grooves.

Abstract: An architecture that utilizes the cross-check code associated with the error correction code in a data communications system as a data integrity code to protect data stored in a temporary storage buffer within a data channel. In a preferred embodiment, a cross-check encoder and comparison circuit is added to an interface circuit which receives data from a host processing system. Incoming host data is encoded to produce redundant information according to the same Reed-Solomon code implemented in the cross-check circuitry already provided in the data path to detect miscorrections by the error correction code. Cross-check redundancy generated by the interface cross-check encoder is appended to its associated data block in the block memory buffer. The integrity of the data blocks passing through the buffer is checked by utilizing the cross-check circuitry to regenerate the redundant cross-check bytes and then performing a comparison of the regenerated cross-check bytes with the cross-check bytes from the buffer.

Abstract: A large array or pagewidth printhead fabricated from printhead elements or subunits. The printhead subunits are butted together at either adjacent channel elements or adjacent heater elements to form a pagewidth printhead. The butting element, either heater or channel element, is slightly wider than the non-butting element thereby providing gaps between the non-butting elements of a printhead element array. Where channel elements are used as the butting element, gaps between the heater elements provide for reduction or elimination of potentially damaging thermal compressive forces between adjacent heater elements. Where heater elements are used as the butting element, structural strength is increased since the heater wafer is stronger than the channel wafer. In addition, the width of the polyimide wall at the edges of the heater wafer is increased providing greater protection for thermal transducers located at the edges of individual heater elements.

Abstract: A synchronous DMA burst transfer method is provided for transferring data between a host device and a peripheral drive device connected by an ATA bus. The method provides synchronous data transfer capability in an asynchronous system by having one device in charge of both a strobe signal and a data signal. When a host read or write command is delivered to the peripheral drive device, the peripheral device decides when to start the synchronous DMA burst. For a read command, the peripheral device requests the synchronous DMA burst then drives a data word onto the ATA bus after the host acknowledges that it is ready to begin the burst. After allowing time for the data signal to settle, the peripheral device toggles a strobe signal from a high state to a low state. The host sees the edge of the strobe signal at which time the host latches the data word on the bus. Additional data words can be driven on the bus and the strobe signal can be retoggled to latch the additional data words into the host.

Abstract: A method in which several high voltage chips may be packaged within a single, typically low voltage plastic package. The high voltage chips are packaged to remain electrically isolated from each other to avoid undesirable side effects such as arcing between the chips but able to share electronic data and communicate with each other electronically through their input and ouput nodes. Due to the unique packaging method, the typically low voltage plastic packaging can be made to withstand operating voltages up to 35 times greater than previously attained by such low voltage plastic packaging.

Abstract: An adaptive filter for use in disk drive systems includes coefficient adaptation circuitry operating at a slower rate than the filter and consequently at a reduced power level. The adaptive filter receives input data samples corresponding to raw data read from a disk in the disk drive system and converted to digital form and provides processed output data samples. The action of the filter is defined by characteristic filter coefficients having values that are updated by adaptation circuitry during the operation of the filter. The adaptive filter is independently clocked from the adaptation circuitry, such that the input data samples and the processed output data samples are clocked through the adaptive filter at a clock rate 1/T, and the filter coefficients are updated according to a prescribed algorithm at an update rate slower than the 1/T clock rate. Filter coefficient updating occurs preferably at a rate equal to 1/J, where J is an integer greater than unity and generally in the range of 2 to 8.

Abstract: A synchronous sampling data detection channel includes a data transducer head positioned by a servo-controlled actuator over a recording track of a rotating data storage disk, a preamplifier for receiving electrical analog signals magnetically induced by the data transducer head from flux transitions present in at least the servo information field, a digital sampler for synchronously sampling the electrical analog signals to produce digital samples, and a Viterbi detector coupled to receive digital samples from the synchronous sampling data detection channel for decoding 1/4 T coded wide biphase servo information patterns patterns as maximum likelihood servo data sequences, wherein the wide biphase magnet patterns are arranged e.g. as ++-- magnet patterns for a binary zero information value and --++ magnet patterns for a binary one information value.

Abstract: A method for fabricating a liquid ink printhead orifice plate for use in a liquid ink printhead and printer. The liquid ink orifice plate is formed of a thermal plastic resin which is stamped between an orifice plate mandrel which includes the ink carrying features and a flat mandrel. Once the orifice plate has been stamped, excess material is removed from the orifice plate to reveal ink carrying features of the stamped orifice plate. The orifice plate mandrel is formed by electroforming a mandrel on an etched silicon wafer which defines a plurality of ink carrying channels and ink reservoirs. The electroform mandrel can be made of any number of metals which includes nickel.

Abstract: A large array or pagewidth printhead fabricated from printhead elements or subunits having adhesive-free butting edges. Each of the printhead elements includes a heater element and a channel element bonded together by an adhesive such as an epoxy. A space or adhesive-receiving aperture is formed between the channel element and the heater element before mating so that any adhesive forced from between the channel element and heater element by the pressure of mating does not flow onto the butting surfaces, but instead overflows into the space thereby maintaining an adhesive free butting edge. The channel element includes an etch trough which forms the space. The printhead elements are butted together to form a large array printhead. The absence of adhesive on the butting edges improves manufacturability of the large array printhead.