Patents by Inventor Hung-Chih Liu

Hung-Chih Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12255062
    Abstract: A method includes performing a plasma activation on a surface of a first package component, removing oxide regions from surfaces of metal pads of the first package component, and performing a pre-bonding to bond the first package component to a second package component.
    Type: Grant
    Filed: November 14, 2023
    Date of Patent: March 18, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Xin-Hua Huang, Ping-Yin Liu, Hung-Hua Lin, Hsun-Chung Kuang, Yuan-Chih Hsieh, Lan-Lin Chao, Chia-Shiung Tsai, Xiaomeng Chen
  • Publication number: 20250089311
    Abstract: In some embodiments, the present disclosure relates to an integrated device, including a substrate comprising a channel region; a gate structure disposed on the substrate over the channel region; a first doped region of a first doping type on a first side of the gate structure; a second doped region of the first doping type on a second side of the gate structure; a shallow trench isolation (STI) structure disposed on an opposite side of the first doped region from the gate structure and having a bottom surface at a first depth beneath a top surface of the substrate; a shallow-shallow trench isolation (SSTI) structure extending from the second doped region to the gate structure, the SSTI structure having a bottom surface at a second depth beneath the top surface of the substrate, where the second depth is less than the first depth.
    Type: Application
    Filed: September 8, 2023
    Publication date: March 13, 2025
    Inventors: Hung-Chih Tsai, Liang-Yu Su, Ruey-Hsin Liu, Hsueh-Liang Chou, Ming-Ta Lei
  • Patent number: 12249776
    Abstract: A composite antenna and an electronic device are proposed. The electronic device includes the composite antenna, and the composite antenna includes a substrate, a first antenna structure, two contact springs, an antenna holder and a second antenna structure. The first antenna structure is disposed on the substrate, and two ends of the first antenna structure are coupled to a feeding point and a grounding point, respectively. The two contact springs are disposed on the first antenna structure, and electrically connected to the feeding point and the grounding point, respectively. The antenna holder is removably disposed on the substrate. The second antenna structure is disposed on the antenna holder and electrically connected to the two contact springs.
    Type: Grant
    Filed: March 15, 2023
    Date of Patent: March 11, 2025
    Assignee: Universal Global Technology (Kunshan) Co., Ltd.
    Inventors: Shang Hao Liu, Yu Sheng Su, Hung Wei Chiu, Jui Chih Chien
  • Publication number: 20250062119
    Abstract: In a semiconductor manufacturing method, a mask is disposed on a semiconductor layer or semiconductor substrate. The semiconductor layer or semiconductor substrate is etched in an area delineated by the mask to form a cavity. With the mask disposed on the semiconductor layer or semiconductor substrate, the cavity is lined to form a containment structure. With the mask disposed on the semiconductor layer or semiconductor substrate, the containment structure is filled with a base semiconductor material. After filling the containment structure with the base semiconductor material, the mask is removed. At least one semiconductor device is fabricated in and/or on the base semiconductor material deposited in the containment structure.
    Type: Application
    Filed: November 4, 2024
    Publication date: February 20, 2025
    Inventors: Hung-Te Lin, Chia-Wei Liu, Hung-Chih Yu
  • Publication number: 20250056877
    Abstract: A semiconductor structure includes a substrate, an isolation structure disposed in the substrate, and a hybrid structure disposed over the isolation structure. The hybrid structure is substantially conformal with respect to a profile of the isolation structure. The hybrid structure includes an oxide component, a nitride component surrounding the oxide component, and a first polysilicon component alongside the nitride component. The nitride component includes a first upper surface closed to the first polysilicon component, and a second upper surface distal to the first polysilicon component. The second upper surface is lower than the first upper surface.
    Type: Application
    Filed: October 30, 2024
    Publication date: February 13, 2025
    Inventors: HUNG-SHU HUANG, JHIH-BIN CHEN, MING CHYI LIU, YU-CHANG JONG, CHIEN-CHIH CHOU, JHU-MIN SONG, YI-KAI CIOU, TSUNG-CHIEH TSAI, YU-LUN LU
  • Publication number: 20240173597
    Abstract: A glowing golf ball is provided. A mounting hole is mounted in a light permeable ball and a light emitting member is mounted in the mounting hole. The light emitting member consists of a tube, a light emitting cap, a miniature battery, and a tube base. The tube is provided with a mounting room for mounting the light emitting cap. A light source is disposed on the light emitting cap and the miniature battery is fixed on the tube base. When the tube base and the tube are covered and fixed by each other, the miniature battery and the light source of the light emitting cap are electrically connected. Thus the light source emits light for allowing golf players to see flight paths and final landing positions of the golf ball in a more eye-catching way under poor light condition.
    Type: Application
    Filed: November 30, 2022
    Publication date: May 30, 2024
    Inventor: HUNG-CHIH LIU
  • Patent number: 11975244
    Abstract: A glowing golf ball is provided. A mounting hole is mounted in a light permeable ball and a light emitting member is mounted in the mounting hole. The light emitting member consists of a tube, a light emitting cap, a miniature battery, and a tube base. The tube is provided with a mounting room for mounting the light emitting cap. A light source is disposed on the light emitting cap and the miniature battery is fixed on the tube base. When the tube base and the tube are covered and fixed by each other, the miniature battery and the light source of the light emitting cap are electrically connected. Thus the light source emits light for allowing golf players to see flight paths and final landing positions of the golf ball in a more eye-catching way under poor light condition.
    Type: Grant
    Filed: November 30, 2022
    Date of Patent: May 7, 2024
    Assignee: Guan Dai Technology Company Ltd.
    Inventor: Hung-Chih Liu
  • Patent number: 11637395
    Abstract: The present disclosure provides a socket structure including a casing, a main body, a frame and a cover. The casing includes plural lateral walls, a bottom, an opening and an accommodation space. The opening is defined by the lateral walls. The accommodation space is defined by the lateral walls and the bottom and is in communication with the opening. The main body is disposed in the accommodation space and includes a circuit board and a connection port disposed on the circuit board. The frame includes at least one plate and a first extending portion. The plate surrounds the periphery of the opening. The first extending portion is extended from the plate and is connected to one of the lateral walls. The cover covers the opening and includes a through hole. The through hole is configured to allow a plug to pass through and connect to the connection port.
    Type: Grant
    Filed: July 27, 2021
    Date of Patent: April 25, 2023
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Hung-Chih Liu, Wei-Kai Hsiao
  • Publication number: 20220302626
    Abstract: The present disclosure provides a socket structure including a casing, a main body, a frame and a cover. The casing includes plural lateral walls, a bottom, an opening and an accommodation space. The opening is defined by the lateral walls. The accommodation space is defined by the lateral walls and the bottom and is in communication with the opening. The main body is disposed in the accommodation space and includes a circuit board and a connection port disposed on the circuit board. The frame includes at least one plate and a first extending portion. The plate surrounds the periphery of the opening. The first extending portion is extended from the plate and is connected to one of the lateral walls. The cover covers the opening and includes a through hole. The through hole is configured to allow a plug to pass through and connect to the connection port.
    Type: Application
    Filed: July 27, 2021
    Publication date: September 22, 2022
    Inventors: Hung-Chih Liu, Wei-Kai Hsiao
  • Patent number: 11057248
    Abstract: A baseband system includes: an estimation and compensation circuit estimating frequency-independent non-ideal effects based on an original IQ signal pair, and compensating the original IQ signal pair based on a result of the estimation to obtain a compensated IQ signal pair; a channel estimation and equalization circuit performing channel estimation and equalization based on the compensated IQ signal pair to obtain an equalized IQ signal pair; and a tracking and compensation circuit obtaining a result of tracking of residual quantities of the aforesaid non-ideal effects based on the equalized IQ signal pair, and compensating the equalized IQ signal pair based on the result of the tracking to obtain an output IQ signal pair.
    Type: Grant
    Filed: June 8, 2020
    Date of Patent: July 6, 2021
    Assignee: NATIONAL CHIAO TUNG UNIVERSITY
    Inventors: Zheng-Chun Huang, Wei-Che Lee, Hung-Chih Liu, Chih-Wei Jen, Shyh-Jye Jou, Yu-Hwai Tseng
  • Patent number: 11038740
    Abstract: A communication system includes a baseband circuit, a transmitting end circuit, and a receiving end circuit is disclosed. The transmitting end circuit includes a digital analog conversion circuit and a transmitting end filtering circuit. The receiving end circuit includes a receiving end amplifying circuit, a receiving end filtering circuit, and an analog digital conversion circuit. A first data signal is transmitted to the analog digital conversion circuit through the digital analog conversion circuit and the transmitting end filtering circuit, so that the baseband circuit obtains a first compensation parameter. A second data signal is transmitted to the receiving end filtering circuit, the receiving end amplifying circuit and the analog digital conversion circuit through the digital analog conversion circuit and the transmitting end filtering circuit, so that the baseband circuit obtains a second compensation parameter.
    Type: Grant
    Filed: October 15, 2020
    Date of Patent: June 15, 2021
    Assignee: NATIONAL CHIAO TUNG UNIVERSITY
    Inventors: Zheng-Chun Huang, Wei-Che Lee, Hung-Chih Liu, Chih-Wei Jen, Shyh-Jye Jou, Yu-Hwai Tseng
  • Publication number: 20210119837
    Abstract: A baseband system includes: an estimation and compensation circuit estimating frequency-independent non-ideal effects based on an original IQ signal pair, and compensating the original IQ signal pair based on a result of the estimation to obtain a compensated IQ signal pair; a channel estimation and equalization circuit performing channel estimation and equalization based on the compensated IQ signal pair to obtain an equalized IQ signal pair; and a tracking and compensation circuit obtaining a result of tracking of residual quantities of the aforesaid non-ideal effects based on the equalized IQ signal pair, and compensating the equalized IQ signal pair based on the result of the tracking to obtain an output IQ signal pair.
    Type: Application
    Filed: June 8, 2020
    Publication date: April 22, 2021
    Applicant: NATIONAL CHIAO TUNG UNIVERSITY
    Inventors: Zheng-Chun HUANG, Wei-Che LEE, Hung-Chih LIU, Chih-Wei JEN, Shyh-Jye JOU, Yu-Hwai TSENG
  • Publication number: 20210119851
    Abstract: A communication system includes a baseband circuit, a transmitting end circuit, and a receiving end circuit is disclosed. The transmitting end circuit includes a digital analog conversion circuit and a transmitting end filtering circuit. The receiving end circuit includes a receiving end amplifying circuit, a receiving end filtering circuit, and an analog digital conversion circuit. A first data signal is transmitted to the analog digital conversion circuit through the digital analog conversion circuit and the transmitting end filtering circuit, so that the baseband circuit obtains a first compensation parameter. A second data signal is transmitted to the receiving end filtering circuit, the receiving end amplifying circuit and the analog digital conversion circuit through the digital analog conversion circuit and the transmitting end filtering circuit, so that the baseband circuit obtains a second compensation parameter.
    Type: Application
    Filed: October 15, 2020
    Publication date: April 22, 2021
    Inventors: Zheng-Chun HUANG, Wei-Che LEE, Hung-Chih LIU, Chih-Wei JEN, Shyh-Jye JOU, Yu-Hwai TSENG
  • Patent number: 10973098
    Abstract: A LED backlight driving circuit includes a plurality of driving integrated circuits coupled to a data transmission line and a plurality of selecting circuits respectively connected to the plurality of driving integrated circuits. In an addressing mode, the plurality of selecting circuits are used to select one driving integrated circuit from the plurality of driving integrated circuits to set an address. The plurality of driving integrated circuits can set addresses via input/output pins connected to LEDs. So a number of pins of the driving integrated circuit can be equal to or less than 4, which will rise a yield of the LED backlight driving circuit setting in a PCB or in a glass board.
    Type: Grant
    Filed: May 12, 2020
    Date of Patent: April 6, 2021
    Assignees: Ananavi Technology Corporation, QChip Technology Limited
    Inventors: Kuan Yu Chen, Hung Chih Liu, Cheng Chung Tsao, Yung Chun Lin
  • Patent number: 10229677
    Abstract: A computer-implemented method and system launches an application with a preferred user interface (UI) language on a device. The method and system receive a voice command from a user to open an application on a device having a computer. The voice command is compared to a stored command language in an audio file device. The system and method initiates opening the application, in response to determining that the voice command matches the stored command language. The application is identified based on the voice command. The system and method determines a preferred language for the software application based on a language file stored on the computer readable medium and the language file being associated with the stored audio file. The method and system opens the application in response to the voice command, and sets the preferred language for a user interface (UI) of the device in response to the determined preferred language.
    Type: Grant
    Filed: April 19, 2016
    Date of Patent: March 12, 2019
    Assignee: International Business Machines Corporation
    Inventors: David S. C. Chen, Pei-Yi Lin, Hung-Chih Liu, Yi-Lin Tsai, Der-Joung Wang, Yen-Min Wu
  • Publication number: 20170301348
    Abstract: A computer-implemented method and system launches an application with a preferred user interface (UI) language on a device. The method and system receive a voice command from a user to open an application on a device having a computer. The voice command is compared to a stored command language in an audio file device. The system and method initiates opening the application, in response to determining that the voice command matches the stored command language. The application is identified based on the voice command. The system and method determines a preferred language for the software application based on a language file stored on the computer readable medium and the language file being associated with the stored audio file. The method and system opens the application in response to the voice command, and sets the preferred language for a user interface (UI) of the device in response to the determined preferred language.
    Type: Application
    Filed: April 19, 2016
    Publication date: October 19, 2017
    Inventors: David S. C. Chen, Pei-Yi Lin, Hung-Chih Liu, Yi-Lin Tsai, Der-Joung Wang, Yen-Min Wu
  • Patent number: 7180933
    Abstract: A squelch circuit for operating at high speed and at high frequencies includes a squelch input unit, a low swing pre-amplifier and a sampling and decision circuit. The squelch input unit pre-processes the positive and negative signals of an input signal to generate four pre-processed signals that are paired and sent to the low swing pre-amplifier. The outputs of the low-swing pre-amplifier are then over-sampled by the sampling and decision circuit. Multi-phase clocks are used to control the over-sampling in the sampling and decision circuit. A logic circuit then determines if the state of the input signal based on multiple samples.
    Type: Grant
    Filed: December 20, 2002
    Date of Patent: February 20, 2007
    Assignee: Silicon Integrated Systems Corporation
    Inventors: Ching-Lin Wu, Hsien-Feng Liu, Hung-Chih Liu
  • Patent number: 6822601
    Abstract: A multiplying digital-to-analog converter (MDAC) stage includes a plurality of second capacitances in parallel selectively connected between an input node and an amplifier input and between a corresponding plurality of digital reference signals, which can include a pseudo-random first calibration signal, and the amplifier input. A pipelined ADC incorporating a series of such MDAC stages includes a multiplier connected to the last MDAC stage of the series, a low-pass filter for filtering output of the multiplier and outputting a DC component, and an encoder for receiving output of the MDAC stages and generating a digital output signal and for compensating the digital output signal with the DC component. Background calibration of the ADC includes applying the first calibration signal to a second capacitance of the MDAC stage during a hold phase, and filtering the first calibration signal from the digital output of the pipelined analog-to-digital converter.
    Type: Grant
    Filed: July 23, 2003
    Date of Patent: November 23, 2004
    Assignee: Silicon Integrated Systems Corp.
    Inventors: Hung-Chih Liu, Jieh-Tsomg Wu, Zwei-Mei Lee
  • Publication number: 20040120389
    Abstract: A squelch circuit for operating at high speed and at high frequencies includes a squelch input unit, a low swing pre-amplifier and a sampling and decision circuit. The squelch input unit pre-processes the positive and negative signals of an input signal to generate four pre-processed signals that are paired and sent to the low swing pre-amplifier. The outputs of the low-swing pre-amplifier are then over-sampled by the sampling and decision circuit. Multi-phase clocks are used to control the over-sampling in the sampling and decision circuit. A logic circuit then determines if the state of the input signal based on multiple samples.
    Type: Application
    Filed: December 20, 2002
    Publication date: June 24, 2004
    Inventors: Ching-Lin Wu, Hsien-Feng Liu, Hung-Chih Liu
  • Patent number: 6650146
    Abstract: A digital frequency comparator includes two double-edge triggered flip-flops and a combination logic. Each of the double-edge triggered flip-flops includes two D-type flip-flops and two multiplexers. The first D-type flip-flop receives a first reference clock pulse and is triggered by a data signal. The second D-type flip-flop receives the first reference clock pulse and is triggered by the reverse of the data signal. The first multiplexer provides the output of the first D-type flip-flop when the data signal is 1 and the output of the second D-type flip-flop when the data signal is 0. The second multiplexer provides the output of the first D-type flip-flop when the data signal is 0 and the output of the second D-type flip-flop when the data signal is 1. The combination logic enables an UP pulse when the data signal transmission clock is faster in frequency than the first reference clock signal.
    Type: Grant
    Filed: December 6, 2001
    Date of Patent: November 18, 2003
    Assignee: Silicon Integrated Systems Corporation
    Inventors: Yin-shang Liu, Kuo-sheng Huang, Hung-chih Liu