Abstract: A semiconductor device includes a semiconductor body and a low K dielectric layer overlying the semiconductor body. A first portion of the low K dielectric layer comprises a dielectric material, and a second portion of the low K dielectric layer comprise an air gap, wherein the first portion and the second portion are laterally disposed with respect to one another. A method for forming a low K dielectric layer is also disclosed and includes forming a dielectric layer over a semiconductor body, forming a plurality of air gaps laterally disposed from one another in the dielectric layer, and forming a capping layer over the dielectric layer and air gaps.

Abstract: A method including providing a semiconductor substrate in a reaction chamber; flowing a first reactant including silicon and oxygen, a boron dopant and a phosphorus dopant into the reaction chamber so that a layer of BPTEOS is deposited on the semiconductor substrate; stopping the flow of the first reactant, boron dopant and phosphorus dopant into the reaction chamber and so that a phosphorus dopant and boron dopant rich film is deposited over the layer of BPTEOS; and reducing the film comprising exposing the film to an O2 plasma.

Abstract: A method including providing a semiconductor substrate in a reaction chamber; flowing a first reactant including silicon and oxygen, a boron dopant and a phosphorus dopant into the reaction chamber so that a layer of BPTEOS is deposited on the semiconductor substrate; stopping the flow of the first reactant, boron dopant and phosphorus dopant into the reaction chamber and so that a phosphorus dopant and boron dopant rich film is deposited over the layer of BPTEOS; and reducing the film comprising exposing the film to an O2 plasma.

Abstract: A structure having a cavity or enclosed space is fabricated by forming a recessed region in a surface of a substrate, and providing a first layer adjacent the recessed region. A liquid mixture including first and second components is supplied to the recessed region. The first component has a higher chemical affinity to the first layer than the second component such that the first component separates from the second component and adheres to an edge portion of the first layer. The substrate may then be heated to remove the second component from the recessed region through evaporation. As a result, the first component remains as a second layer adhering to the edge portion of the first layer and covering the recessed region, thereby defining a cavity or enclosed space with the recessed region. Unique structures including such cavities may be employed to realize a capacitor having a fluid, as opposed to solid, dielectric material, in order to increase the capacitance of the capacitor.

Abstract: A stacked metal-oxide-metal (MOM) capacitor structure and method of forming the same to increase an electrode/capacitor dielectric coupling area to increase a capacitance, the MOM capacitor structure including a plurality of metallization layers in stacked relationship; wherein each metallization layer includes substantially parallel spaced apart conductive electrode line portions having a first intervening capacitor dielectric; and, wherein the conductive electrode line portions are electrically interconnected between metallization layers by conductive damascene line portions formed in a second capacitor dielectric and disposed underlying the conductive electrode line portions.

Abstract: A power supply has a chassis and a safety device. The chassis has a top, a bottom, a rear, a power switch, a mounting slot and an outlet. The outlet is mounted on the rear between the power switch and the mounting slot. The safety device is mounted on the chassis and has a plug bracket and a supply handle. The plug bracket is mounted slidably around the outlet on the rear of the chassis and has two locks. The supply handle is mounted pivotally through the mounting slot in the chassis. The plug bracket slides to an installation position to keep the power switch from turning on and allow a plug to attach to the outlet. Alternatively, the supply handle pivots to a safe position, and the plug bracket slides to a safe position to hold the supply handle and allow the power switch to turn on.

Abstract: Low-k dielectric layer, semiconductor device, and method for fabricating the same. The low-k dielectric layer comprises a hardened sub-layer sandwiched by two low-k dielectric sub-layers. The hardened sub-layer is formed by a method comprising bombarding the underlying low-k dielectric sub-layer utilizing hydrogen plasma or inert gas plasma. The semiconductor device comprises the low-k dielectric layer overlying an etch stop layer overlying a substrate, and a conductive material embedded in the dielectric layer and the etch stop layer, electrically connecting to the substrate.

Abstract: A method for plasma cleaning a CVD reactor chamber including providing a plasma enhanced CVD reactor chamber comprising residual deposited material; performing a first plasma process comprising an oxygen containing plasma; performing a second plasma process comprising an argon containing plasma; and, performing a third plasma process comprising a fluorine containing plasma.

Abstract: An improved damascene process for fabricating a semiconductor device. A dielectric layer comprising at least both fluorine and nitrogen is formed overlying a substrate, in which a nitrogen content in the dielectric layer is about 5% to 10%. The dielectric layer is subsequently pattered to form at least one damascene opening therein. A metal layer is formed overlying the dielectric layer and fills the damascene opening. The excess metal layer on the dielectric layer is removed to leave the metal layer in the damascene opening. A semiconductor device with the same damascene structure is also disclosed.

Abstract: A power supply has a chassis and a safety device. The chassis has a top, a bottom, a rear, a power switch, a mounting slot and an outlet. The outlet is mounted on the rear between the power switch and the mounting slot. The safety device is mounted on the chassis and has a plug bracket and a supply handle. The plug bracket is mounted slidably around the outlet on the rear of the chassis and has two locks. The supply handle is mounted pivotally through the mounting slot in the chassis. The plug bracket slides to an installation position to keep the power switch from turning on and allow a plug to attach to the outlet. Alternatively, the supply handle pivots to a safe position, and the plug bracket slides to a safe position to hold the supply handle and allow the power switch to turn on.

Abstract: A power supply releasing device is a one-piece plate which includes a handle and a fulcrum part on one side of the plate and an engaging piece extends from one of two ends of the plate. A protrusion extends from one surface of the plate. A hole and a curved slot are defined through the plate and a geometric arc formed by the curved slot has a center coincident with the center of the hole. Two rivets respectively extend through the hole and the curved slot and are connected to the power supply. When releasing the power supply, the user simply pivots the plate by pulling the handle to let the fulcrum part contact a vertical surface of the support frame and the power supply is pulled out relative to the support frame by the rivet in the curved slot in the plate.

Abstract: A power supply releasing device is a one-piece plate which includes a handle and a fulcrum part on one side of the plate and an engaging piece extends from one of two ends of the plate. A protrusion extends from one surface of the plate. A hole and a curved slot are defined through the plate and a geometric arc formed by the curved slot has a center coincident with the center of the hole. Two rivets respectively extend through the hole and the curved slot and are connected to the power supply. When releasing the power supply, the user simply pivots the plate by pulling the handle to let the fulcrum part contact a vertical surface of the support frame and the power supply is pulled out relative to the support frame by the rivet in the curved slot in the plate.

Abstract: A method suitable for cleaning the interior surfaces of a process chamber is disclosed. The invention is particularly effective in removing silicon nitride and silicon dioxide residues from the interior surfaces of a chemical vapor deposition (CVD) chamber. The method includes reacting nitrous oxide (N2O) gas with nitrogen trifluoride (NF3) gas in a plasma to generate nitric oxide (NO) and fluoride (F) radicals. Due to the increased density of nitric oxide radicals generated from the nitrous oxide, the etch and removal rate of the residues on the interior surfaces of the chamber is enhanced. Consequently, the quantity of nitrogen trifluoride necessary to efficiently and expeditiously carry out the chamber cleaning process is reduced.

Abstract: A method for plasma cleaning a CVD reactor chamber including providing a plasma enhanced CVD reactor chamber comprising residual deposited material; performing a first plasma process comprising an oxygen containing plasma; performing a second plasma process comprising an argon containing plasma; and, performing a third plasma process comprising a fluorine containing plasma.

Abstract: A inter-metal dielectric layer structure and the method of the same are provided. The method includes the following steps. A process gas is introduced to form a low-k dielectric layer over the substrate. A reactant gas is in situ introduced to etch the low-k dielectric layer back and to react with the process gas to form a dielectric layer containing an extra element on the low-k dielectric layer. The extra element is provided by the reactant gas. A volume ratio of the reactant gas to the process gas is larger than about 2. The reactant gas may be a nitrogen fluoride (NF3) gas for providing extra nitrogen (N) or a carbon fluoride (CxFy) gas for providing extra carbon (C).