Patents by Inventor Hung-Jung Tu

Hung-Jung Tu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10381254
    Abstract: A wafer debonding and cleaning apparatus comprises a wafer debonding module configured to separate a semiconductor wafer from a carrier wafer. The wafer debonding and cleaning apparatus also comprises a first wafer cleaning module configured perform a first cleaning process to clean a surface of the semiconductor wafer. The wafer debonding and cleaning apparatus further comprises an automatic wafer handling module configured to transfer the semiconductor wafer from one of the wafer debonding module or the first wafer cleaning module to the other of the wafer debonding module or the first wafer cleaning module. The semiconductor wafer has a thickness ranging from about 0.20 ?m to about 3 mm.
    Type: Grant
    Filed: September 8, 2014
    Date of Patent: August 13, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wen-Chih Chiou, Yu-Liang Lin, Hung-Jung Tu
  • Patent number: 10068789
    Abstract: A method comprising placing a wafer assembly in a wafer cassette, wherein the wafer assembly includes a wafer and an electrostatic carrier attached to the wafer. In addition, the electrostatic carrier is charged through the wafer cassette, the wafer cassette is transported to a next process stage, and the wafer assembly is removed from the wafer cassette.
    Type: Grant
    Filed: December 21, 2016
    Date of Patent: September 4, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Wen-Chih Chiou, Yung-Chi Lin, Yu-Liang Lin, Hung-Jung Tu
  • Patent number: 9806062
    Abstract: Packaged semiconductor devices are disclosed. In some embodiments, a packaged semiconductor device includes a substrate and a plurality of integrated circuit dies coupled to the substrate. The device also includes a molding material disposed over the substrate between adjacent ones of the plurality of integrated circuit dies. A cap layer is disposed over the molding material and the plurality of integrated circuit dies, wherein the cap layer comprises an electrically conductive material that directly contacts the molding material and each of the plurality of integrated circuit dies.
    Type: Grant
    Filed: July 18, 2016
    Date of Patent: October 31, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shin-Puu Jeng, Wen-Chih Chiou, Tu-Hao Yu, Hung-Jung Tu, Yu-Liang Lin, Shih-Hui Wang
  • Publication number: 20170103910
    Abstract: A method comprising placing a wafer assembly in a wafer cassette, wherein the wafer assembly includes a wafer and an electrostatic carrier attached to the wafer. In addition, the electrostatic carrier is charged through the wafer cassette, the wafer cassette is transported to a next process stage, and the wafer assembly is removed from the wafer cassette.
    Type: Application
    Filed: December 21, 2016
    Publication date: April 13, 2017
    Inventors: Wen-Chih Chiou, Yung-Chi Lin, Yu-Liang Lin, Hung-Jung Tu
  • Patent number: 9570331
    Abstract: A wafer cassette includes a main body having space to hold at least one wafer assembly. Each of the at least one wafer assembly includes a wafer and an electrostatic carrier attached to the wafer. An electrical contact structure inside the main body is arranged to contact an electrical pad of the electrostatic carrier.
    Type: Grant
    Filed: July 30, 2014
    Date of Patent: February 14, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wen-Chih Chiou, Yung-Chi Lin, Yu-Liang Lin, Hung-Jung Tu
  • Publication number: 20160329302
    Abstract: Packaged semiconductor devices are disclosed. In some embodiments, a packaged semiconductor device includes a substrate and a plurality of integrated circuit dies coupled to the substrate. The device also includes a molding material disposed over the substrate between adjacent ones of the plurality of integrated circuit dies. A cap layer is disposed over the molding material and the plurality of integrated circuit dies, wherein the cap layer comprises an electrically conductive material that directly contacts the molding material and each of the plurality of integrated circuit dies.
    Type: Application
    Filed: July 18, 2016
    Publication date: November 10, 2016
    Inventors: Shin-Puu Jeng, Wen-Chih Chiou, Tu-Hao Yu, Hung-Jung Tu, Yu-Liang Lin, Shih-Hui Wang
  • Patent number: 9406650
    Abstract: Methods of packaging semiconductor devices and packaged semiconductor devices are disclosed. In some embodiments, a method of packaging semiconductor devices includes coupling integrated circuit dies to a substrate, and disposing a molding material around the integrated circuit dies. A cap layer is disposed over the molding material and the plurality of integrated circuit dies.
    Type: Grant
    Filed: April 21, 2014
    Date of Patent: August 2, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shin-Puu Jeng, Wen-Chih Chiou, Tu-Hao Yu, Hung-Jung Tu, Yu-Liang Lin, Shih-Hui Wang
  • Patent number: 9390949
    Abstract: This description relates to a wafer debonding and cleaning apparatus including an automatic wafer handling module. The automatic wafer handling module loads a semiconductor wafer into a wafer debonding module for a debonding process. The automatic wafer handling module removes the semiconductor wafer from the debonding module and loads the semiconductor wafer into a wafer cleaning module for a cleaning process.
    Type: Grant
    Filed: November 29, 2011
    Date of Patent: July 12, 2016
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wen-Chih Chiou, Yu-Liang Lin, Hung-Jung Tu
  • Patent number: 9305769
    Abstract: A method includes receiving a carrier with a release layer formed thereon. A first adhesive layer is formed on a wafer. A second adhesive layer is formed over the first adhesive layer or over the release layer. The carrier and the wafer are bonded with the release layer, the first adhesive layer, and the second adhesive layer in between the carrier and the wafer.
    Type: Grant
    Filed: January 16, 2014
    Date of Patent: April 5, 2016
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chen-Hua Yu, Wen-Chih Chiou, Shin-Puu Jeng, Hung-Jung Tu
  • Publication number: 20160035609
    Abstract: A wafer cassette includes a main body having space to hold at least one wafer assembly. Each of the at least one wafer assembly includes a wafer and an electrostatic carrier attached to the wafer. An electrical contact structure inside the main body is arranged to contact an electrical pad of the electrostatic carrier.
    Type: Application
    Filed: July 30, 2014
    Publication date: February 4, 2016
    Inventors: Wen-Chih Chiou, Yung-Chi Lin, Yu-Liang Lin, Hung-Jung Tu
  • Publication number: 20150221611
    Abstract: Methods of packaging semiconductor devices and packaged semiconductor devices are disclosed. In some embodiments, a method of packaging semiconductor devices includes coupling integrated circuit dies to a substrate, and disposing a molding material around the integrated circuit dies. A cap layer is disposed over the molding material and the plurality of integrated circuit dies.
    Type: Application
    Filed: April 21, 2014
    Publication date: August 6, 2015
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shin-Puu Jeng, Wen-Chih Chiou, Tu-Hao Yu, Hung-Jung Tu, Yu-Liang Lin, Shih-Hui Wang
  • Patent number: 9093489
    Abstract: Embodiments of the present disclosure include methods of forming a semiconductor device. An embodiment is a method for forming a semiconductor device, the method including applying a substrate to a carrier with an adhesive layer between the carrier and the substrate, curing a portion of the adhesive layer, the cured portion surrounding an uncured portion of the adhesive layer, removing the carrier from adhesive layer, removing the uncured portion of the adhesive layer, and removing the cured portion of the adhesive layer.
    Type: Grant
    Filed: May 17, 2013
    Date of Patent: July 28, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tu-Hao Yu, Wen-Chih Chiou, Hung-Jung Tu, Yu-Liang Lin
  • Publication number: 20140374031
    Abstract: A wafer debonding and cleaning apparatus comprises a wafer debonding module configured to separate a semiconductor wafer from a carrier wafer. The wafer debonding and cleaning apparatus also comprises a first wafer cleaning module configured perform a first cleaning process to clean a surface of the semiconductor wafer. The wafer debonding and cleaning apparatus further comprises an automatic wafer handling module configured to transfer the semiconductor wafer from one of the wafer debonding module or the first wafer cleaning module to the other of the wafer debonding module or the first wafer cleaning module. The semiconductor wafer has a thickness ranging from about 0.20 ?m to about 3 mm.
    Type: Application
    Filed: September 8, 2014
    Publication date: December 25, 2014
    Inventors: Wen-Chih CHIOU, Yu-Liang LIN, Hung-Jung TU
  • Publication number: 20140261997
    Abstract: Embodiments of the present disclosure include methods of forming a semiconductor device. An embodiment is a method for forming a semiconductor device, the method including applying a substrate to a carrier with an adhesive layer between the carrier and the substrate, curing a portion of the adhesive layer, the cured portion surrounding an uncured portion of the adhesive layer, removing the carrier from adhesive layer, removing the uncured portion of the adhesive layer, and removing the cured portion of the adhesive layer.
    Type: Application
    Filed: May 17, 2013
    Publication date: September 18, 2014
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tu-Hao Yu, Wen-Chih Chiou, Hung-Jung Tu, Yu-Liang Lin
  • Patent number: 8759150
    Abstract: A method includes providing an interposer wafer including a substrate, and a plurality of through-substrate vias (TSVs) extending from a front surface of the substrate into the substrate. A plurality of dies is bonded onto a front surface of the interposer wafer. After the step of bonding the plurality of dies, a grinding is performed on a backside of the substrate to expose the plurality of TSVs. A plurality of metal bumps is formed on a backside of the interposer wafer and electrically coupled to the plurality of TSVs.
    Type: Grant
    Filed: June 4, 2012
    Date of Patent: June 24, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsien-Pin Hu, Chen-Hua Yu, Shin-Puu Jeng, Shang-Yun Hou, Jing-Cheng Lin, Wen-Chih Chiou, Hung-Jung Tu
  • Patent number: 8749027
    Abstract: A die includes a seal-ring structure below a substrate. The seal-ring structure is disposed around at least one substrate region. At least one means for substantially preventing ion diffusion into the substrate region. The at least one means is coupled with the seal-ring structure.
    Type: Grant
    Filed: January 7, 2009
    Date of Patent: June 10, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsien-Wei Chen, Shin-Puu Jeng, Hung-Jung Tu, Wen-Chih Chiou
  • Publication number: 20140130962
    Abstract: A method includes receiving a carrier with a release layer formed thereon. A first adhesive layer is formed on a wafer. A second adhesive layer is formed over the first adhesive layer or over the release layer. The carrier and the wafer are bonded with the release layer, the first adhesive layer, and the second adhesive layer in between the carrier and the wafer.
    Type: Application
    Filed: January 16, 2014
    Publication date: May 15, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chen-Hua YU, Kuo-Ching HSU, Chen-Shien CHEN, Ching-Wen HSIAO, Wen-Chih CHIOU, Shin-Puu JENG, Hung-Jung TU
  • Patent number: 8664749
    Abstract: A method of forming integrated circuits includes laminating a patterned film including an opening onto a wafer, wherein a bottom die in the wafer is exposed through the opening. A top die is placed into the opening. The top die fits into the opening with substantially no gap between the patterned film and the top die. The top die is then bonded onto the bottom die, followed by curing the patterned film.
    Type: Grant
    Filed: April 11, 2011
    Date of Patent: March 4, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Weng-Jin Wu, Hung-Jung Tu, Ku-Feng Yang, Jung-Chih Hu, Wen-Chih Chiou
  • Patent number: 8629066
    Abstract: An integrated circuit structure includes a semiconductor substrate; a through-semiconductor via (TSV) opening extending into the semiconductor substrate; and a TSV liner in the TSV opening. The TSV liner includes a sidewall portion on a sidewall of the TSV opening and a bottom portion at a bottom of the TSV opening. The bottom portion of the TSV liner has a bottom height greater than a middle thickness of the sidewall portion of the TSV liner.
    Type: Grant
    Filed: July 30, 2012
    Date of Patent: January 14, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ching-Yu Lo, Hung-Jung Tu, Hai-Ching Chen, Tien-I Bao, Wen-Chih Chiou, Chen-Hua Yu
  • Publication number: 20130133688
    Abstract: This description relates to a wafer debonding and cleaning apparatus including an automatic wafer handling module. The automatic wafer handling module loads a semiconductor wafer into a wafer debonding module for a debonding process. The automatic wafer handling module removes the semiconductor wafer from the debonding module and loads the semiconductor wafer into a wafer cleaning module for a cleaning process.
    Type: Application
    Filed: November 29, 2011
    Publication date: May 30, 2013
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wen-Chih CHIOU, Yu-Liang LIN, Hung-Jung TU