Patents by Inventor Hung-Lin Chang

Hung-Lin Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240101485
    Abstract: A powder composition includes a first powder, a second powder, and a modified functional group. A particle size range of the first powder is between 1 micron and 100 microns. The second powder and the modified functional group are modified on the first powder. A particle size range of the second powder is between 10 nanometers and 1 micron. A manufacturing method of a powder composition is also provided.
    Type: Application
    Filed: November 15, 2022
    Publication date: March 28, 2024
    Applicant: NAN YA PLASTICS CORPORATION
    Inventors: Te-Chao Liao, Hung-Yi Chang, Chia-Lin Liu
  • Patent number: 11920036
    Abstract: A rubber resin material with high dielectric constant and a metal substrate with high dielectric constant are provided. The rubber resin material with high dielectric constant includes a rubber resin composition with high dielectric constant and inorganic fillers. The rubber resin composition with high dielectric constant includes: 40 wt % to 70 wt % of a liquid rubber, 10 wt % to 30 wt % of a polyphenylene ether resin, and 20 wt % to 40 wt % of a crosslinker. A molecular weight of the liquid rubber ranges from 800 g/mol to 6000 g/mol. A dielectric constant of the rubber resin material with high dielectric constant is higher than or equal to 2.0.
    Type: Grant
    Filed: May 9, 2022
    Date of Patent: March 5, 2024
    Assignee: NAN YA PLASTICS CORPORATION
    Inventors: Te-Chao Liao, Hung-Yi Chang, Chien-Kai Wei, Chia-Lin Liu
  • Patent number: 11912664
    Abstract: Provided herein are methods, systems, kits, and compositions useful for determining small molecule-protein interactions and protein-protein interactions. The photo-click tags provided herein can be conjugated to a small molecule or amino acid analog to provide compounds that can be integrated into a protein through photo-conjugation, allowing for identification of a small molecule-protein interaction or protein-protein interaction to elucidate the small molecules mechanism of action or the protein targeted by the small molecule. In some embodiments, the photo-click tags comprise a photo-conjugation moiety and a click chemistry handle, allowing for the attachment of various functional groups (e.g., affinity tags) to the small molecule or amino acid analog.
    Type: Grant
    Filed: June 6, 2018
    Date of Patent: February 27, 2024
    Assignee: President and Fellows of Harvard College
    Inventors: Christina M. Woo, Jinxu Gao, Yuka Amako, Chia Fu Chang, Zhi Lin, Hung-Yi Wu
  • Patent number: 11659479
    Abstract: A network accessing method includes performing a cell search procedure for a first RAT; receiving first SI from a first cell of the first RAT when the first cell has been found in the cell search procedure; determining whether second SI is scheduled by the first cell according to content of the first SI; receiving the second SI in response to determination of the second SI being scheduled and deriving information regarding a second cell of a second RAT different from the first RAT; searching for the second cell according to the information regarding the second cell; and attempting to access the second cell instead of the first cell when the second cell has been found. The first cell is configured to provide access to a first core network and the second cell is configured to provide access to a second core network different from the first core network.
    Type: Grant
    Filed: August 16, 2021
    Date of Patent: May 23, 2023
    Assignee: MEDIATEK INC.
    Inventor: Hung-Lin Chang
  • Patent number: 11585648
    Abstract: An electromagnetic measuring probe device for measuring a thickness of a dielectric layer of a circuit board and a method thereof are disclosed. The circuit board has at least one dielectric layer, at least two conductive layers and a test area. The test area has a test pattern and a through hole. The electromagnetic measuring probe device has a probe-measuring unit, an external conductive element, plural magnetic powder groups, and a maintaining unit. The probe-measuring unit has a transparent tube and an internal conductive pin. The external conductive element electrically connects with the test pattern. The conductive layers and the internal conductive pin generate a magnetic field while the probe-measuring unit enters into the through hole. The magnetic powder groups magnetically attracted are gathered to positions corresponding to thickness-range positions of the conductive layers and held by the maintaining unit, thus a gap between the two dielectric layers is obtained.
    Type: Grant
    Filed: March 23, 2021
    Date of Patent: February 21, 2023
    Assignee: Unimicron Technology Corporation
    Inventors: Cheng-Jui Chang, Hung-Lin Chang
  • Publication number: 20230048517
    Abstract: A network accessing method includes performing a cell search procedure for a first RAT; receiving first SI from a first cell of the first RAT when the first cell has been found in the cell search procedure; determining whether second SI is scheduled by the first cell according to content of the first SI; receiving the second SI in response to determination of the second SI being scheduled and deriving information regarding a second cell of a second RAT different from the first RAT; searching for the second cell according to the information regarding the second cell; and attempting to access the second cell instead of the first cell when the second cell has been found. The first cell is configured to provide access to a first core network and the second cell is configured to provide access to a second core network different from the first core network.
    Type: Application
    Filed: August 16, 2021
    Publication date: February 16, 2023
    Applicant: MEDIATEK INC.
    Inventor: Hung-Lin Chang
  • Patent number: 11408799
    Abstract: A method for measuring a thickness of a dielectric layer in a circuit board is provided. The method for measuring the thickness of the dielectric layer includes the following steps. First, a circuit board including at least one dielectric layer and at least two circuit layers is provided. The dielectric layer is between the circuit layers, and the circuit board further includes a test area including a test pattern and a through hole. The test pattern includes at least two metal layers. Next, a measuring device including a main body, at least one light source and a lens module is provided. When the main body is moved into the through hole, the light source emits light to the dielectric layer and the metal layer, and the lens module shoots the dielectric layer and the metal layer to form a captured image. The thickness of the dielectric layer is obtained via the captured image.
    Type: Grant
    Filed: March 23, 2021
    Date of Patent: August 9, 2022
    Assignee: Unimicron Technology Corporation
    Inventors: Cheng-Jui Chang, Hung-Lin Chang
  • Patent number: 11408720
    Abstract: A method for measuring thickness of dielectric layer in circuit board includes the following steps: First, circuit board including dielectric layer and circuit layers is provided. The dielectric layer is between the circuit layers, and the circuit board further includes test area including test pattern and through hole. The test pattern includes first conductor and second conductors. The distance between the side of the through hole and the second conductor is less than the distance between the side of the through hole and the first conductor. Next, measuring device including conductive pin and sensing element is provided. Next, the conductive pin is powered, and one end of the conductive pin is electrically connected to the second conductor. Next, the sensing element is moved along the through hole to obtain sensing curve, and the thickness of the dielectric layer is calculated via variations of the sensing curve.
    Type: Grant
    Filed: March 23, 2021
    Date of Patent: August 9, 2022
    Assignee: Unimicron Technology Corporation
    Inventors: Cheng-Jui Chang, Hung-Lin Chang, Jeng-Wey Chiang
  • Publication number: 20220221370
    Abstract: A method for measuring a thickness of a dielectric layer in a circuit board is provided. The method for measuring the thickness of the dielectric layer includes the following steps. First, a circuit board including at least one dielectric layer and at least two circuit layers is provided. The dielectric layer is between the circuit layers, and the circuit board further includes a test area including a test pattern and a through hole. The test pattern includes at least two metal layers. Next, a measuring device including a main body, at least one light source and a lens module is provided. When the main body is moved into the through hole, the light source emits light to the dielectric layer and the metal layer, and the lens module shoots the dielectric layer and the metal layer to form a captured image. The thickness of the dielectric layer is obtained via the captured image.
    Type: Application
    Filed: March 23, 2021
    Publication date: July 14, 2022
    Inventors: Cheng-Jui Chang, Hung-Lin Chang
  • Publication number: 20220221262
    Abstract: A method for measuring thickness of dielectric layer in circuit board includes the following steps: First, circuit board including dielectric layer and circuit layers is provided. The dielectric layer is between the circuit layers, and the circuit board further includes test area including test pattern and through hole. The test pattern includes first conductor and second conductors. The distance between the side of the through hole and the second conductor is less than the distance between the side of the through hole and the first conductor. Next, measuring device including conductive pin and sensing element is provided. Next, the conductive pin is powered, and one end of the conductive pin is electrically connected to the second conductor. Next, the sensing element is moved along the through hole to obtain sensing curve, and the thickness of the dielectric layer is calculated via variations of the sensing curve.
    Type: Application
    Filed: March 23, 2021
    Publication date: July 14, 2022
    Inventors: Cheng-Jui Chang, Hung-Lin Chang, Jeng-Wey Chiang
  • Publication number: 20220221263
    Abstract: An electromagnetic measuring probe device for measuring a thickness of a dielectric layer of a circuit board and a method thereof are disclosed. The circuit board has at least one dielectric layer, at least two conductive layers and a test area. The test area has a test pattern and a through hole. The electromagnetic measuring probe device has a probe-measuring unit, an external conductive element, plural magnetic powder groups, and a maintaining unit. The probe-measuring unit has a transparent tube and an internal conductive pin. The external conductive element electrically connects with the test pattern. The conductive layers and the internal conductive pin generate a magnetic field while the probe-measuring unit enters into the through hole. The magnetic powder groups magnetically attracted are gathered to positions corresponding to thickness-range positions of the conductive layers and held by the maintaining unit, thus a gap between the two dielectric layers is obtained.
    Type: Application
    Filed: March 23, 2021
    Publication date: July 14, 2022
    Inventors: Cheng-Jui Chang, Hung-Lin Chang
  • Publication number: 20220071042
    Abstract: An interface system for functional module and a functional module thereof are provided. The interface system for the functional module includes a main system and a plurality of functional modules. The main system has a mother board. Each of the functional modules has a circuit board, and at least one functional element disposed on the circuit board, and the functional element is an element having various functions and specifications. An expansion assembly is disposed between the mother board of the main system and the circuit board of any of the functional modules, and the expansion assembly is also disposed between the circuit boards of the functional modules. The main system is selectively and electrically connected to the functional modules through each of the expansion assemblies to be connected extendedly.
    Type: Application
    Filed: November 6, 2020
    Publication date: March 3, 2022
    Inventors: Hsiao-Hui LEE, Hung-Lin CHANG
  • Patent number: 11266034
    Abstract: An interface system for functional module and a functional module thereof are provided. The interface system for the functional module includes a main system and a plurality of functional modules. The main system has a mother board. Each of the functional modules has a circuit board, and at least one functional element disposed on the circuit board, and the functional element is an element having various functions and specifications. An expansion assembly is disposed between the mother board of the main system and the circuit board of any of the functional modules, and the expansion assembly is also disposed between the circuit boards of the functional modules. The main system is selectively and electrically connected to the functional modules through each of the expansion assemblies to be connected extendedly.
    Type: Grant
    Filed: November 6, 2020
    Date of Patent: March 1, 2022
    Assignee: SHUTTLE INC.
    Inventors: Hsiao-Hui Lee, Hung-Lin Chang
  • Patent number: 11063451
    Abstract: A battery management system for a main system of an electronic device is provided. The battery management system is electrically connected with plural battery units. The battery management system includes plural insertion slots and a battery detachment protection device. The insertion slots electrically connected with the main system. The plural battery units are docked with the corresponding insertion slots. The battery detachment protection device is electrically connected with the main system. When an external force is applied to the battery detachment protection device, the battery detachment protection device generates a system protection sensing signal. In response to the system protection sensing signal, a power supply condition of at least one battery unit in the corresponding insertion slot is adjusted, and the at least one battery unit in the corresponding insertion slot is permitted to be detached from the corresponding insertion slot or positioned in the corresponding insertion slot.
    Type: Grant
    Filed: September 16, 2019
    Date of Patent: July 13, 2021
    Assignee: FLYTECH TECHNOLOGY CO., LTD
    Inventors: Chiung-Chi Lin, Hung-Lin Chang, Chin-Lung Yang
  • Publication number: 20200395766
    Abstract: A battery management system for a main system of an electronic device is provided. The battery management system is electrically connected with plural battery units. The battery management system includes plural insertion slots and a battery detachment protection device. The insertion slots electrically connected with the main system. The plural battery units are docked with the corresponding insertion slots. The battery detachment protection device is electrically connected with the main system. When an external force is applied to the battery detachment protection device, the battery detachment protection device generates a system protection sensing signal. In response to the system protection sensing signal, a power supply condition of at least one battery unit in the corresponding insertion slot is adjusted, and the at least one battery unit in the corresponding insertion slot is permitted to be detached from the corresponding insertion slot or positioned in the corresponding insertion slot.
    Type: Application
    Filed: September 16, 2019
    Publication date: December 17, 2020
    Inventors: CHIUNG-CHI LIN, HUNG-LIN CHANG, CHIN-LUNG YANG
  • Publication number: 20200053642
    Abstract: Examples pertaining to flexible radio access technology (RAT) selection for 5th Generation (5G) mobile communications are described. A user equipment (UE) may receive, from a network node of a wireless network, information related to a RAT preference with respect to RAT selection by the UE. Based at least in part on the received information, the UE may perform a RAT or Public Land Mobile Network (PLMN) selection procedure. Alternatively, or additionally, the UE may receive, from the network node, information related to ability of one or more neighbor network nodes of one or more RATs in a region. Based at least in part on the received information, the UE may select one of the one or more RATs or one of the one or more neighbor network nodes.
    Type: Application
    Filed: August 8, 2019
    Publication date: February 13, 2020
    Inventors: Chien-Chun Huang-Fu, Hung-Lin Chang, Tsung-Wei Tu, Yen-Chih Yang
  • Publication number: 20190223091
    Abstract: A method of providing assistance information to improve the performance of Public Land Mobile Network (PLMN) selection is proposed. UE starts to perform PLMN selection procedure and searches for the first cell. The first cell can be an LTE cell or an NR cell served by a first base station. UE receives assistance information via system information broadcasted by the first base station. The assistance information comprises frequency band of NR/LTE cells, PLMN ID, subcarrier spacing (SCS) for NR cells, and RAT/system priority. UE then determines its PLMN/RAT preference, e.g., based on the availability of NR cells or LTE ENDC cells. Finally, UE continues the PLMN selection procedure searching for NR cell or LTE cell based on the assistance information.
    Type: Application
    Filed: January 11, 2019
    Publication date: July 18, 2019
    Inventors: Chien-Chun Huang-Fu, Hung Lin Chang
  • Patent number: 10314179
    Abstract: A manufacturing method of a circuit board structure is described as follows. An inner circuit structure including a core layer having an upper and an opposite lower surface, a first patterned circuit layer disposed on the upper surface and a second patterned circuit layer disposed on the lower surface is provided. An insulating material layer is formed on a portion of the first patterned circuit layer. A laser resisting layer is formed on at least a portion of the insulating material layer. A release layer is adhered to the laser resisting layer. A build-up process is performed so as to laminate a first and a second build-up circuit structures on the first and the second patterned circuit layers, respectively. A laser ablation process is performed on the first build-up circuit structure so as to form a cavity at least exposing a portion of the upper surface of the core layer.
    Type: Grant
    Filed: June 21, 2018
    Date of Patent: June 4, 2019
    Assignee: Unimicron Technology Corp.
    Inventors: Hung-Lin Chang, Ming-Hao Wu, Syun-Siao Chang, Cheng-Po Yu, Chi-Min Chang
  • Publication number: 20180302992
    Abstract: A manufacturing method of a circuit board structure is described as follows. An inner circuit structure including a core layer having an upper and an opposite lower surface, a first patterned circuit layer disposed on the upper surface and a second patterned circuit layer disposed on the lower surface is provided. An insulating material layer is formed on a portion of the first patterned circuit layer. A laser resisting layer is formed on at least a portion of the insulating material layer. A release layer is adhered to the laser resisting layer. A build-up process is performed so as to laminate a first and a second build-up circuit structures on the first and the second patterned circuit layers, respectively. A laser ablation process is performed on the first build-up circuit structure so as to form a cavity at least exposing a portion of the upper surface of the core layer.
    Type: Application
    Filed: June 21, 2018
    Publication date: October 18, 2018
    Applicant: Unimicron Technology Corp.
    Inventors: Hung-Lin Chang, Ming-Hao Wu, Syun-Siao Chang, Cheng-Po Yu, Chi-Min Chang
  • Patent number: 10051748
    Abstract: A manufacturing method of a circuit board structure is described as follows. An inner circuit structure including a core layer having an upper and an opposite lower surface, a first patterned circuit layer disposed on the upper surface and a second patterned circuit layer disposed on the lower surface is provided. An insulating material layer is formed on a portion of the first patterned circuit layer. A laser resisting layer is formed on at least a portion of the insulating material layer. A release layer is adhered to the laser resisting layer. A build-up process is performed so as to laminate a first and a second build-up circuit structures on the first and the second patterned circuit layers, respectively. A laser ablation process is performed on the first build-up circuit structure so as to form a cavity at least exposing a portion of the upper surface of the core layer.
    Type: Grant
    Filed: January 18, 2016
    Date of Patent: August 14, 2018
    Assignee: Unimicron Technology Corp.
    Inventors: Hung-Lin Chang, Ming-Hao Wu, Syun-Siao Chang, Cheng-Po Yu, Chi-Min Chang