Patents by Inventor Hung-Pin Chen

Hung-Pin Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210104477
    Abstract: A pad structure includes a conductive layer, a pad layer, a protective layer and a dielectric layer. The conductive layer is located above the substrate. The protective layer covers the pad layer and has an opening to expose a portion of the pad layer. The dielectric layer is formed between the conductive layer and the pad layer and between the conductive layer and the pad layer. The conductive layer includes a number of effective blocks, and a proportion of a block area of a block of the effective blocks to a total block area of the effective blocks ranges between 40%-50%. The block has at least one hollow portion, wherein the hollow portion has a total hollow area, and a ratio of the total hollow area to the block area ranged between 0.1 and 0.5.
    Type: Application
    Filed: October 4, 2019
    Publication date: April 8, 2021
    Inventors: Chih-Ching Eric SHIH, Hung-Chi CHEN, Li-Kuang KUO, Wen-Pin LU
  • Publication number: 20210096392
    Abstract: A space three-dimensional imaging apparatus and a space three-dimensional imaging method are provided. The space three-dimensional imaging apparatus includes a transparent display device, a rotation motor and a processor. The transparent display device has at least one display plane. The rotation motor is configured to drive the transparent display device to rotate along an axis. The processor is coupled to the transparent display device and the rotation motor, and configured to retrieve a three-dimensional virtual image, cut multiple cutting images adapted to be displayed at multiple locations of each display plane after a rotation from the three-dimensional virtual image, and calculate a current location of each display plane during the rotation according to the driving of the rotation motor to control the transparent display device to display the cutting image corresponding to the current location on each display plane.
    Type: Application
    Filed: September 30, 2020
    Publication date: April 1, 2021
    Applicant: Industrial Technology Research Institute
    Inventors: Yi-Hsiang Huang, Kuan-Ting Chen, Shin-Hong Kuo, Chien-Ju Lee, Hung-Pin Shih, Yu-Hsiang Tsai
  • Patent number: 10955970
    Abstract: A direction determination system and a direction determination method are provided. The direction determination system includes a display screen, at least one image capturing device and a processing device. The image capturing device is configured to capture image data including a plurality of users. The processing device is coupled to the display screen and the image capturing device to receive the image data, and detects a plurality of characteristics of the plurality of users according to the image data. The processing device performs corresponding pairing on the characteristics to obtain a characteristic group of each of the users. The processing device determines a pointing direction of each of the users toward the display screen according to at least two characteristics of the characteristic group of each of the users.
    Type: Grant
    Filed: January 10, 2019
    Date of Patent: March 23, 2021
    Assignees: Industrial Technology Research Institute, Intellectual Property Innovation Corporation
    Inventors: Hung-Pin Shih, Chien-Ju Lee, Heng-Yin Chen
  • Patent number: 10932358
    Abstract: A semiconductor device includes a substrate, a die and multiple conductive traces. The die is mounted on the substrate. The conductive traces are routed on the substrate and connected to the die. The conductive traces at least include a plurality of first conductive traces and a plurality of second conductive traces. The second conductive traces are coupled to a predetermined voltage for providing a shielding pattern. The first conductive traces and the second conductive traces are disposed on the substrate in a substantially interlaced pattern.
    Type: Grant
    Filed: August 28, 2018
    Date of Patent: February 23, 2021
    Assignee: MediaTek Inc.
    Inventors: Duen-Yi Ho, Hung-Chuan Chen, Shang-Pin Chen
  • Publication number: 20200348513
    Abstract: An optical element including a first pattern is provided. The first pattern includes a film and a plurality of light deflection regions arranged on the film, wherein each light deflection region comprises a diffraction structure having two or more than two amplitudes.
    Type: Application
    Filed: July 20, 2020
    Publication date: November 5, 2020
    Inventors: Hsin-Wen CHANG, Hung-Yu LIN, Yung-Pin CHEN
  • Patent number: 10752673
    Abstract: Disclosed herein are methods for high-throughput screening of a functional antibody fragment for an immunoconjugate that targets a protein antigen. The method combines a phage-displayed synthetic antibody library and high-throughput cytotoxicity screening of non-covalently assembled immunotoxins or cytotoxic drug to identify highly functional synthetic antibody fragments for delivering toxin payloads.
    Type: Grant
    Filed: June 12, 2017
    Date of Patent: August 25, 2020
    Assignee: ACADEMIA SINICA
    Inventors: An-Suei Yang, Hong-Sen Chen, Chung-Ming Yu, Shin-Chen Hou, Wei-Ying Kuo, Yi-Kai Chiu, Yueh-Liang Tsou, Hung-Ju Hsu, Hwei-Jiung Wang, Shih-Hsien Chuang, Chao-Pin Lee
  • Patent number: 10746986
    Abstract: An optical element including a first pattern is provided. The first pattern includes a plurality of light deflection regions arranged along at least one set of first tracks in a first direction, and each first track is a waveform track having a first period T1 and a first amplitude A1.
    Type: Grant
    Filed: April 27, 2018
    Date of Patent: August 18, 2020
    Assignee: CM VISUAL TECHNOLOGY CORPORATION
    Inventors: Hsin-Wen Chang, Hung-Yu Lin, Yung-Pin Chen
  • Patent number: 10734551
    Abstract: The invention provides an LED including a first-type semiconductor layer, an emitting layer, a second-type semiconductor layer, a first electrode, a second electrode, a Bragg reflector structure, a conductive layer and insulation patterns. The first electrode and the second electrode are located on the same side of the Bragg reflector structure. The conductive layer is disposed between the Bragg reflector structure and the second-type semiconductor layer. The insulation patterns are disposed between the conductive layer and the second-type semiconductor layer. Each insulating layer has a first surface facing toward the second-type semiconductor layer, a second surface facing away from the second-type semiconductor layer, and an inclined surface. The inclined surface connects the first surface and the second surface and is inclined with respect to the first surface and the second surface.
    Type: Grant
    Filed: October 21, 2019
    Date of Patent: August 4, 2020
    Assignee: Genesis Photonics Inc.
    Inventors: Yi-Ru Huang, Tung-Lin Chuang, Yan-Ting Lan, Sheng-Tsung Hsu, Chih-Ming Shen, Jing-En Huang, Teng-Hsien Lai, Hung-Chuan Mai, Kuan-Chieh Huang, Shao-Ying Ting, Cheng-Pin Chen, Wei-Chen Chien, Chih-Chin Cheng, Chih-Hung Tseng
  • Patent number: 10677841
    Abstract: A composite product testing system including a main management system, a test equipment and a burn-in apparatus is disclosed. The test equipment and the burn-in apparatus are both arranged in a burn-in chamber of the testing system. First, multiple tested products are respectively inserted in multiple gauges of the burn-in chamber, and a burn-in procedure is activated for providing an aging environment. The main management system controls one of the gauges to connect with the test equipment for the test equipment to perform testing on the tested product upon the connected gauge. After the testing is completed, the main management system then controls the gauge to disconnect from the test equipment and re-connect with the burn-in apparatus, so as to monitor the tested product upon the gauge during the burn-in procedure.
    Type: Grant
    Filed: January 3, 2018
    Date of Patent: June 9, 2020
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Chien-Chung Chang, Hung-Pin Yu, Yu-Jen Chen, Wen-Jen Lo, Chih-Yen Liu
  • Publication number: 20200073509
    Abstract: A direction determination system and a direction determination method are provided. The direction determination system includes a display screen, at least one image capturing device and a processing device. The image capturing device is configured to capture image data including a plurality of users. The processing device is coupled to the display screen and the image capturing device to receive the image data, and detects a plurality of characteristics of the plurality of users according to the image data. The processing device performs corresponding pairing on the characteristics to obtain a characteristic group of each of the users. The processing device determines a pointing direction of each of the users toward the display screen according to at least two characteristics of the characteristic group of each of the users.
    Type: Application
    Filed: January 10, 2019
    Publication date: March 5, 2020
    Applicants: Industrial Technology Research Institute, Intellectual Property Innovation Corporation
    Inventors: Hung-Pin Shih, Chien-Ju Lee, Heng-Yin Chen
  • Patent number: 10562976
    Abstract: Disclosed herein is an immunoconjugate comprising an antibody, a functional motif, and a linker connecting the functional motif to the antibody. According to embodiments of the present disclosure, the antibody may recognize tumor-associated antigens (TAAs), and serves as a targeting module for delivering the functional motif connected therewith to the tumor cells thereby inhibiting tumor growth or detecting the distribution of tumor cells. Also disclosed herein are methods of treating cancers and methods of diagnosing cancers by use of the present immunoconjugate.
    Type: Grant
    Filed: October 22, 2018
    Date of Patent: February 18, 2020
    Assignee: Academia Sinica
    Inventors: An-Suei Yang, Wei-Ying Kuo, Hung-Ju Hsu, Hong-Sen Chen, Yu-Chi Chou, Yueh-Liang Tsou, Hung-Pin Peng, Jhih-Wei Jian, Chung-Ming Yu, Yi-Kai Chiu, Ing-Chein Chen, Chao-Ping Tung, Michael Hsiao, Hwei-Jiung Wang
  • Publication number: 20200052159
    Abstract: The invention provides an LED including a first-type semiconductor layer, an emitting layer, a second-type semiconductor layer, a first electrode, a second electrode, a Bragg reflector structure, a conductive layer and insulation patterns. The first electrode and the second electrode are located on the same side of the Bragg reflector structure. The conductive layer is disposed between the Bragg reflector structure and the second-type semiconductor layer. The insulation patterns are disposed between the conductive layer and the second-type semiconductor layer. Each insulating layer has a first surface facing toward the second-type semiconductor layer, a second surface facing away from the second-type semiconductor layer, and an inclined surface. The inclined surface connects the first surface and the second surface and is inclined with respect to the first surface and the second surface.
    Type: Application
    Filed: October 21, 2019
    Publication date: February 13, 2020
    Applicant: Genesis Photonics Inc.
    Inventors: Yi-Ru Huang, Tung-Lin Chuang, Yan-Ting Lan, Sheng-Tsung Hsu, Chih-Ming Shen, Jing-En Huang, Teng-Hsien Lai, Hung-Chuan Mai, Kuan-Chieh Huang, Shao-Ying Ting, Cheng-Pin Chen, Wei-Chen Chien, Chih-Chin Cheng, Chih-Hung Tseng
  • Patent number: 10473843
    Abstract: A backlight module includes a light source, a light guide plate and a light-adjusting member. A light source chromaticity is measured from light generated by the light source. The light guide plate has a light-incident surface and a light-emitting surface. Light generated by the light source enters the light guide plate and emits out from the light-emitting surface. With the light-adjusting member, a first light guide plate chromaticity is measured from the light-emitting surface. There is a first difference value between the first light guide plate chromaticity and the light source chromaticity. Without the light-adjusting member, a second light guide plate chromaticity is measured from the light-emitting surface. There is a second difference value between the second light guide plate chromaticity and the light source chromaticity. The first difference value is different from the second difference value.
    Type: Grant
    Filed: October 11, 2018
    Date of Patent: November 12, 2019
    Assignees: Radiant Opto-Electronics (Suzhou) Co., Ltd., Radiant Opto-Electronics Corporation
    Inventors: Jui-Lin Chen, Chao-Min Su, Jing-Siang Jhang, Hung-Pin Cheng, Wei-Hsiang Chiu, Bo-Lan Fang, Wei Yi, Kuan-Tun Chen, Li-Hui Chen, Wei-Chung Lu
  • Patent number: 10453999
    Abstract: The invention provides an LED including a first-type semiconductor layer, an emitting layer, a second-type semiconductor layer, a first electrode, a second electrode, a Bragg reflector structure, a conductive layer and insulation patterns. The first electrode and the second electrode are located on the same side of the Bragg reflector structure. The conductive layer is disposed between the Bragg reflector structure and the second-type semiconductor layer. The insulation patterns are disposed between the conductive layer and the second-type semiconductor layer. Each insulating layer has a first surface facing toward the second-type semiconductor layer, a second surface facing away from the second-type semiconductor layer, and an inclined surface. The inclined surface connects the first surface and the second surface and is inclined with respect to the first surface and the second surface.
    Type: Grant
    Filed: May 16, 2018
    Date of Patent: October 22, 2019
    Assignee: Genesis Photonics Inc.
    Inventors: Yi-Ru Huang, Tung-Lin Chuang, Yan-Ting Lan, Sheng-Tsung Hsu, Chih-Ming Shen, Jing-En Huang, Teng-Hsien Lai, Hung-Chuan Mai, Kuan-Chieh Huang, Shao-Ying Ting, Cheng-Pin Chen, Wei-Chen Chien, Chih-Chin Cheng, Chih-Hung Tseng
  • Patent number: 10415033
    Abstract: Disclosed herein is a phage-displayed single-chain variable fragment (scFv) library, which comprises a plurality of phage-displayed scFvs characterized in having a specific CS combination and a specific sequence in each CDR. The present scFv library is useful in efficiently producing different antibodies with binding affinity to different antigens. Accordingly, the present disclosure provides a potential means to generate different antigen-specific antibodies promptly in accordance with the need in experimental researches and/or clinical applications.
    Type: Grant
    Filed: November 28, 2018
    Date of Patent: September 17, 2019
    Assignee: Academia Sinica
    Inventors: An-Suei Yang, Jhih-Wei Jian, Hong-Sen Chen, Yi-Kai Chiu, Hung-Pin Peng, Chao-Ping Tung, Chung-Ming Yu, Wei-Ying Kuo, Hung-Ju Hsu
  • Patent number: 10297691
    Abstract: A semiconductor device is provided and includes a semiconductor fin protruding from a semiconductor substrate. The semiconductor fin includes plural pairs of semiconductor layers on the semiconductor substrate, each pair of semiconductor layers consists of a first semiconductor layer of a first conductivity type, and a second semiconductor layer of a second conductivity type. The second semiconductor layer is stacked on and contacts the first semiconductor layer.
    Type: Grant
    Filed: November 6, 2017
    Date of Patent: May 21, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Hung-Pin Chen, Chi-Cherng Jeng, Ru-Shang Hsiao, Li-Yi Chen
  • Patent number: 9929268
    Abstract: A method of fabricating a FinFET includes at last the following steps. A <551> direction is determined by tilting 8.05±2 degrees from a normal vector of a (110) lattice plane of a semiconductor substrate. The semiconductor substrate is patterned along a lattice plane perpendicular to the <551> direction, so as to form a plurality of trenches in the semiconductor substrate and at least one semiconductor fin having sidewalls disposed on a (551) lattice plane. Insulators are in the trenches. A gate stack is formed over portions of the semiconductor fin and over portions of the insulators. Strained material portions are formed over the semiconductor fins revealed by the gate stack.
    Type: Grant
    Filed: April 15, 2016
    Date of Patent: March 27, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chii-Ming Wu, Ru-Shang Hsiao, Hung Pin Chen, Sen-Hong Syue, Chi-Cherng Jeng
  • Publication number: 20180076314
    Abstract: A semiconductor device is provided and includes a semiconductor fin protruding from a semiconductor substrate. The semiconductor fin includes plural pairs of semiconductor layers on the semiconductor substrate, each pair of semiconductor layers consists of a first semiconductor layer of a first conductivity type, and a second semiconductor layer of a second conductivity type. The second semiconductor layer is stacked on and contacts the first semiconductor layer.
    Type: Application
    Filed: November 6, 2017
    Publication date: March 15, 2018
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Hung-Pin CHEN, Chi-Cherng JENG, Ru-Shang HSIAO, Li-Yi CHEN
  • Patent number: 9842932
    Abstract: A semiconductor device is provided and includes a semiconductor fin protruding from a semiconductor substrate. The semiconductor fin includes plural pairs of semiconductor layers on the semiconductor substrate, each pair of semiconductor layers consists of a first semiconductor layer of a first conductivity type, and a second semiconductor layer of a second conductivity type. The second semiconductor layer is stacked on and contacts the first semiconductor layer.
    Type: Grant
    Filed: December 1, 2016
    Date of Patent: December 12, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Hung-Pin Chen, Chi-Cherng Jeng, Ru-Shang Hsiao, Li-Yi Chen
  • Publication number: 20170345923
    Abstract: A semiconductor device is provided and includes a semiconductor fin protruding from a semiconductor substrate. The semiconductor fin includes plural pairs of semiconductor layers on the semiconductor substrate, each pair of semiconductor layers consists of a first semiconductor layer of a first conductivity type, and a second semiconductor layer of a second conductivity type. The second semiconductor layer is stacked on and contacts the first semiconductor layer.
    Type: Application
    Filed: December 1, 2016
    Publication date: November 30, 2017
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Hung-Pin CHEN, Chi-Cherng JENG, Ru-Shang HSIAO, Li-Yi CHEN